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Patent # Description
US-9,158,616 Method and system for error management in a memory device
A method and system for error management in a memory device. In one embodiment of the invention, the memory device can handle commands and address parity errors...
US-9,158,498 Optimizing fixed point divide
Systems, apparatus and methods are described related to optimizing fixed point divide.
US-9,158,495 Codec control
A method and system for a software driver of a graphics controller to work with a display codec. The software driver may be configured to work with different...
US-9,158,363 Power management for a system on a chip (SoC)
In one embodiment, the present invention includes a method for sending a first link handshake signal between a first subsystem and a power management unit (PMU)...
US-9,158,357 System and method for conveying service latency requirements for devices connected to low power input/output...
In at least one embodiment described herein, an apparatus is provided that can include means for communicating a latency tolerance value for a device connected...
US-9,158,351 Dynamic power limit sharing in a platform
A method and apparatus for dynamic power limit sharing among the modules in the platform. In one embodiment of the invention, the platform comprises a processor...
US-9,157,991 Mechanism for proximity detection based on Wi-Fi signals
A mechanism is described for proximity detection based on Wi-Fi signals. A method of embodiments of the invention includes determining strength of one or more...
US-D740,801 Electronic device
US-9,155,097 Methods and arrangements for beam refinement in a wireless network
In some embodiments a beamforming method is disclosed. The method can include transmitting a beam having a channel defined by a maximum ratio transmission...
US-9,155,088 Delivery edge profile aggregation
A system and method for aggregating subscriber information at a delivery edge is disclosed. The method comprises interfacing a user profile aggregation device...
US-9,155,082 Interference mitigation in the context of heterogeneous networks with coordinated transmission points with a...
Technology is discussed for extending frequency and time based approaches, such as Inter-Cell Interference Coordination (ICIC) and enhanced ICIC (eICIC), to...
US-9,155,046 Optimizing semi-active workloads
Devices and methods for optimizing semi-active workloads are described herein. A network interface device may be configured to offload data packet...
US-9,154,978 Coverage adjustment in E-UTRA networks
Embodiments of systems and techniques for coverage adjustment in evolved universal terrain radio access networks (E-UTRANs) are described. In some embodiments,...
US-9,154,959 Systems and methods for securing near field communications
Systems and methods to secure near field communications (NFC) are disclosed. An NFC polling device may detect a change in voltage when attempting to communicate...
US-9,154,442 Concurrent linked-list traversal for real-time hash processing in multi-core, multi-thread network processors
Described embodiments process hash operation requests of a network processor. A hash processor determines a job identifier, a corresponding hash table, and a...
US-9,154,421 Network based data traffic detection and control
A network-based apparatus for imposing a minimum transmit latency on data packets of a prescribed data type on a network includes at least one processor. The...
US-9,154,279 Uplink coordinated multi-point
Disclosed embodiments may include an apparatus having one or more processors coupled to one or more computer-readable storage media. The one or more processors...
US-9,154,267 Sounding reference signal (SRS) mechanism for intracell device-to-device (D2D) communication
Technology for device discovery using a device-to-device (D2D) sounding reference signal (SRS) and device discovery using D2D SRS in a channel measurement group...
US-9,154,264 Device, system and method of wireless communication between circuits
Some demonstrative embodiments include devices, systems and/or methods of wireless communication between circuits. For example, an integrated chip may include a...
US-9,154,251 Signaling for downlink coordinated multipoint in a wireless communication system
Embodiments herein describe apparatuses, systems, and methods for signaling to support downlink coordinated multipoint (CoMP) communications with a user...
US-9,154,201 Adaptation techniques in MIMO
A method of the multiple input multiple output feedback is disclosed. In accordance with an embodiment of the invention, the multiple input multiple output...
US-9,154,169 Fractional symbol based phase noise mitigation
Fractional symbol based phase noise mitigation, including methods and systems to determine phase noise trajectory, or indication of phase noise, for each of...
US-9,154,168 Signal peak-to-average power ratio (PAR) reduction
A method of reducing a peak to average power ratio (PAR) of a signal may include generating an in-band error signal indicating in-band distortion of a...
US-9,154,157 Search unit to accelerate variable length compression/decompression
Systems and methods to accelerate compression and decompression with a search unit implemented in the processor core. According to an embodiment, a search unit...
US-9,154,078 Device, system and method of wireless communication over a plurality of wireless communication frequency channels
Some demonstrative embodiments include devices, systems and/or methods of wireless communication over a plurality of wireless communication frequency channels....
US-9,154,026 Bridge driver for a switching voltage regulator which is operable to soft-switch and hard-switch
Described is an apparatus which comprises: a low-side switch coupled to an output node for providing regulated voltage supply; and a first driver operable to...
US-9,153,671 Techniques for forming non-planar germanium quantum well devices
Techniques are disclosed for forming a non-planar germanium quantum well structure. In particular, the quantum well structure can be implemented with group IV...
US-9,153,583 III-V layers for N-type and P-type MOS source-drain contacts
Techniques are disclosed for forming transistor devices having reduced parasitic contact resistance relative to conventional devices. In some example...
US-9,153,552 Bumpless build-up layer package including an integrated heat spreader
An example includes a die package including a microelectronic die having a lower die surface, an upper die surface parallel to the lower die surface, and a die...
US-9,153,547 Integrated inductor structure and method of fabrication
An inductor structure comprised of a magnetic section and a single turn solenoid. The single turn solenoid to contain within a portion of the magnetic section...
US-9,153,477 Directed self assembly of block copolymers to form vias aligned with interconnects
A method of an aspect includes forming an interconnect line etch opening in a hardmask layer. The hardmask layer is over a dielectric layer that has an...
US-9,153,320 Programming memory cells using a program pulse
Described herein are techniques related to one or more systems, apparatuses, methods, etc. for programming a memory cell through the use of a program pulse.
US-9,153,296 Methods and apparatuses for dynamic memory termination
Described herein are a method and an apparatus for dynamically switching between one or more finite termination impedance value settings to a memory...
US-9,153,201 Real-time order-independent transparent rendering
A method and system for producing an image to be displayed are disclosed herein. The image includes a plurality of pixels. An example of the method includes...
US-9,153,077 Systems and methods for collecting vehicle evidence
Systems and methods to request and collect evidence elements from one or more evidence systems responsive to a triggering event are disclosed. An evidence...
US-9,153,064 Grouping pixels to be textured
A region or group of pixels may be textured as a unit, using a range specifier and one or more anchor pixels to define the group. In some embodiments,...
US-9,153,008 Caching for reduced depth and/or color buffer bandwidth
In accordance with some embodiments, caching may be improved for tiles on shared edges between triangles. In some embodiments, the technique may be used for...
US-9,152,819 Cloud based real time app privacy dashboard
A method of operating an electronic device comprises detecting access to private information stored in memory of the electronic device. The detecting is...
US-9,152,793 Methods, systems and apparatus to self authorize platform code
Methods and apparatus are disclosed to self authorize platform code. A disclosed example method includes storing a hash of a first public key in a policy data...
US-9,152,777 Electronic authentication document system and method
In one embodiment a controller comprises logic configured to receive a document copy, wherein the document copy comprises an identifier which uniquely...
US-9,152,673 Non-deterministic finite automaton (NFA) overflow recovery that ejects an end of scan set of active states into...
Disclosed is a method of recovering from overflow of a hardware dynamically reconfigurable NFA cell array, to find matches within a symbol stream to regular...
US-9,152,663 Fast approach to finding minimum and maximum values in a large data set using SIMD instruction set architecture
Systems and methods may determine a boundary value data unit in a large data set in parallel with determining an associated index of the determined boundary...
US-9,152,596 Architected protocol for changing link operating mode
In one embodiment, a device having a link training state machine including a reconfiguration logic to perform a dynamic link reconfiguration of a physical link...
US-9,152,572 Translation lookaside buffer for multiple context compute engine
Some implementations disclosed herein provide techniques and arrangements for an specialized logic engine that includes translation lookaside buffer to support...
US-9,152,564 Early cache eviction in a multi-flow network processor architecture
Described embodiments provide an input/output interface of a network processor that generates a request to store received packets to a system cache. If an entry...
US-9,152,561 Maintaining processor resources during architectural events
In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second...
US-9,152,473 Table driven multiple passive trip platform passive thermal management
Methods and apparatus relating to table driven multiple passive trip, platform passive thermal management are described. In one embodiment, the power...
US-9,152,440 User events/behaviors and perceptual computing system emulation
Methods, apparatuses and storage medium associated with engineering perceptual computing systems that includes user intent modeling are disclosed herewith. In...
US-9,152,432 System and method to accelerate access to network data using a networking unit accessible non-volatile storage
In some embodiments, the invention involves a network controller having a pattern matching unit to identify whether boot file requested from a network...
US-9,152,428 Alternative boot path support for utilizing non-volatile memory devices
Embodiments of the invention describe apparatuses, systems and method for particularly to providing alternative boot paths for computing devices. In embodiments...
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