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| Patent # | Description |
|---|---|
| US-9,496,630 |
Integrated package insertion and loading mechanism (iPILM) A holding member and system including a first and a second holding member, wherein each of the first holding member and the second holding member are coupled to... |
| US-9,496,592 |
Rack level pre-installed interconnect for enabling cableless
server/storage/networking deployment Apparatus and methods for rack level pre-installed interconnect for enabling cableless server, storage, and networking deployment. Plastic cable waveguides are... |
| US-9,496,486 |
Perpendicular spin transfer torque memory (STTM) device having offset
cells and method to form same Perpendicular spin transfer torque memory (STTM) devices having offset cells and methods of fabricating perpendicular STTM devices having offset cells are... |
| US-9,496,231 |
Bypass ring to improve noise isolation of coils and inductors An integrated circuit (IC) comprises a plurality of metal layers; a seal ring arranged around a perimeter of the IC and included in at least a portion of the... |
| US-9,496,211 |
Logic die and other components embedded in build-up layers Embodiments of the present disclosure are directed towards package assemblies, as well as methods for forming package assemblies and systems incorporating... |
| US-9,496,209 |
High density organic bridge device and method Embodiments that allow multi-chip interconnect using organic bridges are described. In some embodiments an organic package substrate has an embedded organic... |
| US-9,496,173 |
Thickened stress relief and power distribution layer An embodiment includes a semiconductor structure comprising: a frontend portion including a device layer; a backend portion including a bottom metal layer, a... |
| US-9,496,161 |
Methods and devices for securing and transporting singulated die in high
volume manufacturing A method includes identifying a wafer position for a plurality of die on a wafer, storing the wafer position for each of the plurality of die in a database,... |
| US-9,495,967 |
Collaborative audio conversation attestation Disclosed in some examples are systems, methods, devices, and machine readable mediums which may produce an audio recording with included verification from the... |
| US-9,495,797 |
Hardware accelerated simulation of atmospheric scattering A method and system may include a hardware texture unit having logic to receive parameters of a view ray for a pixel of a graphical scene, and determine an... |
| US-9,495,593 |
Method and apparatus for controlling content capture of prohibited content Embodiments of methods, apparatuses, and storage mediums associated with controlling content capture of prohibited content on remote devices, are disclosed. In... |
| US-9,495,540 |
Method and system for monitoring calls to an application program interface
(API) function A method and device for monitoring calls to an application program interface (API) function includes monitoring for a memory permission violation of a computing... |
| US-9,495,397 |
Sensor associated data of multiple devices based computing Computer-readable storage media, apparatus and method associated with storing a copy of local data in a historical data store, among other embodiments, are... |
| US-9,495,324 |
Efficient distribution of subnet administration data over an RDMA network One embodiment provides a method for receiving subnet administration (SA) data using a remote direct memory access (RDMA) transfer. The method includes... |
| US-9,495,320 |
Removing upstream dead cycles in a data communications bus Dead cycles are removed from an upstream side of a data communications bus. In one example, data symbols are received on clock cycles from lanes of a peripheral... |
| US-9,495,303 |
Fine grained address remapping for virtualization Address remapping technologies are described. A method can include receiving, at a paging device of a system memory, a first physical address of an input/output... |
| US-9,495,233 |
Error framework for a microprocesor and system In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for implementing an error... |
| US-9,495,232 |
Error correcting (ECC) memory compatibility Host device platforms developed based on older ECC (Error Correcting Code) designs may not be equipped to handle the enhanced error correction capabilities in... |
| US-9,495,177 |
Techniques for pre-OS image rewriting to provide cross-architecture
support, security introspection, and... Methods and apparatus relating to pre-OS (pre Operating System) image rewriting to provide cross-architecture support, security introspection, and/or... |
| US-9,495,168 |
Allocation of alias registers in a pipelined schedule In an embodiment, a system includes a processor including one or more cores and a plurality of alias registers to store memory range information associated with... |
| US-9,495,166 |
Method and apparatus for performing a shift and exclusive or operation in
a single instruction Method and apparatus for performing a shift and XOR operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In... |
| US-9,495,165 |
Method and apparatus for performing a shift and exclusive or operation in
a single instruction Method and apparatus for performing a shift and XOR operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In... |
| US-9,495,162 |
Apparatus and method for performing a permute operation An apparatus and method are described for permuting data elements with masking. For example, a method according to one embodiment includes the following... |
| US-9,495,160 |
Instruction and logic for processing text strings Method, apparatus, and program means for performing a string comparison operation. An apparatus includes execution resources to execute a first instruction. In... |
| US-9,495,159 |
Two level re-order buffer In response to detecting one or more conditions are met, a checkpoint of a current state of a thread may be created. One or more incomplete instructions may be... |
| US-9,495,155 |
Methods, apparatus, instructions and logic to provide population count
functionality for genome sequencing and... Instructions and logic provide SIMD vector population count functionality. Some embodiments store in each data field of a portion of n data fields of a vector... |
| US-9,495,153 |
Methods, apparatus, and instructions for converting vector data A computer processor includes a decoder for decoding machine instructions and an execution unit for executing those instructions. The decoder and the execution... |
| US-9,495,103 |
Read training a memory controller Provided are a device and computer readable storage medium for programming a memory module to initiate a training mode in which the memory module transmits... |
| US-9,495,082 |
Service in support of browser for multi-media content Methods, apparatuses and storage medium associated with a multi-media service configured to support a browser for rendering multi-media content are disclosed.... |
| US-9,495,017 |
Computing systems for peripheral control Embodiments of computing systems, and related methods, are disclosed herein. In some embodiments, a computing system may include a peripheral device (e.g., an... |
| US-9,495,002 |
Apparatuses, methods, and systems for providing a dynamic bias voltage to
one or more transistors of a transceiver Embodiments include apparatuses, methods, and systems for providing a dynamic bias voltage to one or more transistors of a transceiver. In embodiments, a... |
| US-9,495,001 |
Forcing core low power states in a processor In an embodiment, a processor includes a plurality of cores each to independently execute instructions, a power delivery logic coupled to the plurality of... |
| US-9,494,998 |
Rescheduling workloads to enforce and maintain a duty cycle In an embodiment, a processor includes a plurality of cores to independently execute instructions, at least one graphics engine to independently execute... |
| US-9,494,996 |
Processor having frequency of operation information for guaranteed
operation under high temperature events A processor is described having a semiconductor chip having non volatile storage circuitry. The non volatile storage circuitry has information identifying a... |
| US-9,494,981 |
Retractable support mechanism for an electronic device Particular embodiments described herein provide for an electronic device, such as an accessory to a tablet that includes a first housing. The first housing may... |
| US-9,494,750 |
Optical connector assembly Methods, apparatuses, and systems related to optical connector assemblies are described. In some embodiments, the connector assemblies may include an optical... |
| US-9,494,736 |
Technologies for generating a broadband optical output Technologies for generating a broadband optical output include a plurality of narrowband optical sources formed in a silicon substrate to generate a narrowband... |
| US-9,494,680 |
Radar based interpretation of 3D codes Systems and methods may provide for transmitting an outbound radar signal via an antenna structure and receiving a reflected radar signal via the antenna... |
| US-9,494,415 |
Object position determination In embodiments, apparatuses, methods and storage media for human-computer interaction are described. In embodiments, an apparatus may include one or more light... |
| US-9,493,340 |
MEMS devices utilizing a thick metal layer of an interconnect metal film
stack A MEMS device, such as an accelerometer or gyroscope, fabricated in interconnect metallization compatible with a CMOS microelectronic device. In embodiments, a... |
| US-9,491,881 |
Microelectronic socket comprising a substrate and an insulative insert
mated with openings in the substrate A microelectronic socket having a two piece construction, wherein a first piece comprises a conductive socket substrate and the second piece comprises an... |
| US-9,491,797 |
Methods and systems for multi-directional time preservation distribution
in multi-communication core devices A system and method for the distribution of time signals is available for devices with multiple communication cores. An embodiment may or may not use a... |
| US-9,491,776 |
Systems and methods for scheduling communication between wireless devices
to reduce interference associated... Certain embodiments herein relate to scheduling interference between wireless devices in a manner that reduced interference associated with full duplex... |
| US-9,491,725 |
User equipment and methods for device-to-device communication over an LTE
air interface Embodiments of a UE to operate in accordance with a device-to-device (D2D) communication mode are disclosed herein. The UE may include hardware processing... |
| US-9,491,673 |
Method and apparatus for M2M device subscription An apparatus may include a processor circuit and a machine type communication (MTC) device setup module operable on the processor circuit to determine when the... |
| US-9,491,661 |
Cloud spectrum management system This disclosure is directed to a cloud spectrum management system. In general, an example cloud spectrum management system may match requests from spectrum... |
| US-9,491,634 |
Signal buffering for licensed shared access (LSA) technology Described herein are technologies related to an implementation of reducing a time cost of accessing a Licensed Shared Access (LSA) during a transmission... |
| US-9,491,601 |
Dynamic visual profiles Systems and methods may provide for identifying one or more phrases in a conversation between a first user and a second user. In addition, a first visual... |
| US-9,491,524 |
Leap second support in content timestamps In embodiments, apparatuses, methods and storage media are described that are associated with support for leap seconds for provision of media content. In... |
| US-9,491,493 |
Unified content posting Methods, apparatuses and systems to provide a unified content posting mechanism. |
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