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Patent # Description
US-9,191,326 Physical uplink control channel (PUCCH) resource allocation (RA) for a hybrid automatic retransmission...
Technology to provide physical uplink control channel (PUCCH) resource allocation in time division duplex (TDD) for a hybrid automatic retransmission...
US-9,191,248 Digital wideband closed loop phase modulator with modulation gain calibration
One embodiment of the present invention relates to a modulation system having a phase locked loop and an adaptive control. The phased lock loop is configured to...
US-9,191,192 Digital NRZI signal for serial interconnect communications between the link layer and physical layer
Systems and methods of operating a serial interconnect interface provide for generating a pulse in response to a state change in a data signal of the serial...
US-9,191,178 Enhanced node B and method for RRC connection establishment for small data transfers
Embodiments of an enhanced Node B (eNB) and method for RRC connection establishment for small-data transfers in a 3GPP LTE network are generally described...
US-9,191,169 Communication device and method for packet-based OFDM communications with differing length cyclic prefixes
A network communication device is receive packet-based orthogonal frequency division multiplexed (OFDM) transmissions from one or more other devices in a...
US-9,191,131 Method for control channel detection in wireless communications systems
A method of detecting a control channel includes receiving data transmitted via a control channel. A path metric and a correction term is computed based on the...
US-9,191,108 Techniques for low power visual light communication
Various embodiments are generally directed to techniques for reducing the consumption of electric power in decoding VLC frame patterns by selectively decoding...
US-9,191,097 Techniques for transmitting data via relay communication links
Examples are disclosed for transmitting data via a relay communication links. In some examples, a wireless device may receive a packet having a physical layer...
US-9,190,991 Apparatus, system, and method for re-synthesizing a clock signal
Described herein are apparatus, method, and system for re-synthesizing a clock signal. The apparatus comprises: a first logic unit to detect a rising edge of an...
US-9,190,983 Digital filter
A first stage of a digital filter receives input data to be filtered, the first stage of a digital filter operating at a first clock; a second stage of the...
US-9,190,959 Circuit, transceiver and mobile communication device
A circuit for providing a bias signal for a power amplifier includes a first input, a second input and an output. The first input is configured to receive an...
US-9,190,906 Digital event generator, comparator, switched mode energy converter and method
A digital event generator includes a counter configured to provide at least one count value based on a clock signal, and a comparator configured to evaluate a...
US-9,190,700 Reduced size cavity filter for PICO base stations
An improved microwave cavity filter used in cellular communication systems such as base stations is disclosed. The cavity filter has a conductive housing...
US-9,190,518 Nonplanar device with thinned lower body portion and method of fabrication
A nonplanar semiconductor device having a semiconductor body formed on an insulating layer of a substrate. The semiconductor body has a top surface opposite a...
US-9,190,490 Local buried channel dielectric for vertical NAND performance enhancement and vertical scaling
A non-volatile memory device and a method for forming the non-volatile memory device are disclosed. The memory device utilizes a local buried channel dielectric...
US-9,190,388 Using an optically transparent solid material as a support structure for attachment of a semiconductor material...
Electronic devices and methods for fabricating electronic devices are described. One method includes attaching an optically transparent solid material to a body...
US-9,190,380 High density substrate routing in BBUL package
Discussed generally herein are devices that include high density interconnects between dice and techniques for making and using those devices. In one or more...
US-9,190,315 Enabling package-on-package (PoP) pad surface finishes on bumpless build-up layer (BBUL) package
A bumpless build-up layer (BBUL) integrated circuit package and method of manufacturing are presented. In some embodiments, the package-on-package (PoP) pads of...
US-9,190,173 Generic data scrambler for memory circuit test engine
A generic data scrambler is provided for a built-in self-test (BIST) engine of a stacked memory device. The stacked memory device includes a memory stack of one...
US-9,190,124 Multi-level memory with direct access
Embodiments of a method, device, and system for implementing multi-level memory with direct access are disclosed. In one embodiment, the method includes...
US-9,189,945 Visual indicator and adjustment of media and gaming attributes based on battery statistics
Systems and methods may provide for identifying an amount of time associated with a user based activity with respect to a battery powered device, and...
US-9,189,837 Method and device for processing digital image, and computer-readable recording medium for processing digital image
There is provided a method of processing a digital image including: (a) obtaining a plurality of images; (b) converting the plurality of images into histograms;...
US-9,189,620 Protecting a software component using a transition point wrapper
Embodiments of apparatuses, articles, methods, and systems for protecting software components using transition point wrappers are generally described herein. In...
US-9,189,617 Apparatus and method for implementing zero-knowledge proof security techniques on a computing platform
An apparatus and method for zero knowledge proof security techniques within a computing platform. One embodiment includes a security module executed on a...
US-9,189,445 Method and device for synchronizing data broadcasts for system-on-chip
A method and a device for synchronizing broadcast of streaming data by a transmitting data processing unit to a plurality of receiving data processing units is...
US-9,189,441 Dual casting PCIE inbound writes to memory and peer devices
Methods and apparatus for supporting dual casting of inbound system memory writes from PCIe devices to memory and a peer PCIe device. An inbound system memory...
US-9,189,439 Interface logic for a multi-core system-on-a-chip (SoC)
In one embodiment, the present invention includes a system-on-a-chip (SoC) with first and second cores, interface logic coupled to the cores, chipset logic...
US-9,189,426 Protected access to virtual memory
Embodiments of techniques and systems for protected access to virtual memory are described. In embodiments, a protected memory management architecture ("PMMA")...
US-9,189,411 Logging in secure enclaves
Embodiments of an invention for logging in secure enclaves are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The...
US-9,189,398 Apparatus and method for memory-mapped register caching
A processor is described comprising: an architectural register file implemented as a combination of a register file cache and an architectural register region...
US-9,189,373 Automated top down process to minimize test configurations for multi-feature products
Systems and methods of conducting interoperability assessments provide for generating a feature interoperability matrix based on feature data and...
US-9,189,360 Processor that records tracing data in non contiguous system memory slices
A method is described that involves referring to first information from a directory table in system memory. The first information includes location information...
US-9,189,302 Technique for monitoring activity within an integrated circuit
A technique to monitor events within a computer system or integrated circuit. In one embodiment, a software-accessible event monitoring storage and...
US-9,189,296 Caching agent for deadlock prevention in a processor by allowing requests that do not deplete available...
Disclosed herein is a caching agent for preventing deadlock in a processor. The caching agent includes a receiver configured to receive a request from a core of...
US-9,189,258 Reconfigurable sensing platform for software defined instrumentation
A reconfigurable sensor front-end includes a logic block having a storage circuit to store hardware description information and a reconfigurable block including...
US-9,189,246 Method and apparatus to support separate operating systems in partitions of a processing system
A processing system with multiple processing units may support separate operating systems (OSs) in separate partitions. During an initialization process, a...
US-9,189,240 Split-word memory
Method, process, and apparatus to efficiently store, read, and/or process syllables of word data. A portion of a data word, which includes multiple syllables,...
US-9,189,238 Bitstream buffer manipulation with a SIMD merge instruction
Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises...
US-9,189,237 Bitstream buffer manipulation with a SIMD merge instruction
Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises...
US-9,189,236 Speculative non-faulting loads and gathers
According to one embodiment, a processor includes an instruction decoder to decode an instruction to read a plurality of data elements from memory, the...
US-9,189,233 Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to...
Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program into multiple parallel threads are described. For...
US-9,189,230 Method and system to provide concurrent user-level, non-privileged shared resource thread creation and execution
A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming...
US-9,189,073 Transition mechanism for computing system utilizing user sensing
A transition mechanism for a computing system utilizing user sensing. An embodiment of an apparatus includes a sensing element to sense a presence or movement...
US-9,189,056 Mixed cell type battery module and uses thereof
Various embodiments are generally directed to operation of a computing device powered with first and second sets of energy storage cells, the cells of the first...
US-9,189,046 Performing cross-domain thermal control in a processor
In an embodiment, a processor includes a first domain with at least one core to execute instructions and a second domain coupled to the first domain and...
US-9,189,014 Sequential circuit with error detection
Sequential circuits with error-detection are provided. They may, for example, be used to replace traditional master-slave flip-flops, e.g., in critical path...
US-9,188,753 Optical connector assembly
Methods, apparatuses, and systems related to optical connector assemblies are described. In some embodiments, the connector assemblies may include an optical...
US-9,188,446 Agile acquisition of location services in a device
Aspects of the disclosure permit agile acquisition of a location service in a device. In one aspect of such acquisition, the device can rely on location signals...
US-9,186,909 Method and system of lens shading color correction using block matching
A system, article, and method to provide lens shading color correction using block matching.
US-D743,334 Wireless charging device
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