Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: intel





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-9,270,400 Determining proximity of user equipment for device-to-device communication
Embodiments of apparatus, packages, computer-implemented methods, systems, devices, and computer-readable media (transitory and non-transitory) are described...
US-9,270,386 Error detecting and correcting structured light patterns
Techniques are disclosed for detecting image depth in three-dimensional (3-D) surface imaging. The disclosed techniques can be used, for example, to provide...
US-9,270,339 Method, apparatus and system of recovering an operating system on a portable communication device
A device, method and system for recovering an operating system may comprise a near field communication module; a high speed wireless communication module; and a...
US-9,270,326 Adaptive clock spreading for platform RFI mitigation
An apparatus, system, and method, the method including receiving clock frequency parameter information for at least one clock source; receiving radio parameter...
US-9,270,278 Spin transfer torque based memory elements for programmable device arrays
Disclosed herein are semiconductor device arrays, such as, Field Programmable Gate Arrays (FPGAs) and Complex Programmable Logic Arrays (CPLAs) that use...
US-9,269,701 Localized high density substrate routing
Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus...
US-9,269,686 Debond interconnect structures
The present subject matter relates to the field of fabricating microelectronic devices. In at least one embodiment, the present subject matter relates to...
US-9,269,676 Through silicon via guard ring
The present disclosure relates to forming a plurality of through silicon vias guard rings proximate the scribes streets of a microelectronic device wafer. The...
US-9,269,652 Chemically altered carbosilanes for pore sealing applications
A method including forming a dielectric material including a surface porosity on a circuit substrate including a plurality of devices; chemically modifying a...
US-9,269,630 Patterning of vertical nanowire transistor channel and gate with directed self assembly
Directed self-assembly (DSA) material, or di-block co-polymer, to pattern features that ultimately define a channel region a gate electrode of a vertical...
US-9,269,596 Narrow-gap flip chip underfill composition
An underfill composition comprises a curable resin, a plurality of filler particles loaded within the resin, the filler particles comprising at least 50 weight...
US-9,269,490 Non-contact power transmission apparatus
A non-contact power transmission apparatus accurately determines the kind of object that is placed on the charging deck of the non-contact power transmission...
US-9,269,438 System and method for intelligently flushing data from a processor into a memory subsystem
A system and method are described for intelligently flushing data from a processor cache. For example, a system according to one embodiment of the invention...
US-9,269,436 Techniques for determining victim row addresses in a volatile memory
Examples are disclosed for determining a logical address of one or more victim rows of a volatile memory based on a logical address of an aggressor row and...
US-9,269,417 Memory refresh management
Apparatus, systems, and methods to manage memory refresh operations are described. In one embodiment, an electronic device comprises a processor and memory...
US-9,269,409 Bit cell write-assistance
Methods and systems to provide bit cell write-assist, including equalization of voltages of Bit and Bit nodes of a bit cell prior to a write operation....
US-9,269,180 Computer graphics processor and method for rendering a three-dimensional image on a display screen
A computer graphics processor and a method for rendering a three-dimensional image on a display screen. The computer graphics processor comprises a rasterizer...
US-9,269,121 Techniques for managing system power using deferred graphics rendering
An apparatus may include a memory to store one or more graphics rendering commands in a queue after generation. The apparatus may also include a processor...
US-9,269,120 Dynamically rebalancing graphics processor resources
According to some embodiments, performance bottlenecks that arise in particular resources within a graphic processor unit may be alleviated by dynamically...
US-9,268,995 Smile detection techniques
Techniques are disclosed that involve the detection of smiles from images. Such techniques may employ local-binary pattern (LBP) features and/or multi-layer...
US-9,268,948 Secure access enforcement proxy
Efficient architecture for a secure access enforcement proxy is described. The proxy interfaces with multiple subsystems and multiple shared resources. The...
US-9,268,893 Photolithography mask synthesis for spacer patterning
Photolithography mask synthesis is disclosed for spacer patterning masks. In one example, backbone features are extracted from a target layout of a mask design....
US-9,268,881 Child state pre-fetch in NFAs
Disclosed is a method and apparatus for pre-fetching child states in an NFA cell array. A pre-fetch depth value is determined for each transition in an NFA...
US-9,268,742 Reconfigurable variable length fir filters for optimizing performance of digital repeater
The invention addresses the problem of parameter optimization for best filter performance and, in particular, the influence from the requirements on radio or...
US-9,268,731 Controlling devices via advance notice signaling
Generally this disclosure describes methods and systems for controlling device operation in a processing system. A method may include receiving information...
US-9,268,724 Configuration of data strobes
Disclosed embodiments may include a circuit having a plurality of data terminals, no more than two pairs of differential data strobe terminals associated with...
US-9,268,723 Dram compression scheme to reduce power consumption in motion compensation and display refresh
Systems and methods of operating a memory controller may provide for receiving a write request from a motion compensation module, wherein the write request...
US-9,268,712 Method, system and apparatus for region access control
Techniques and mechanisms for providing access to a storage device of a computer platform. In an embodiment, an agent executing on the platform may be...
US-9,268,707 Low overhead paged memory runtime protection
Methods and apparatus relating to low overhead paged memory runtime protection are described. In an embodiment, permission information for guest physical...
US-9,268,697 Snoop filter having centralized translation circuitry and shadow tag array
A processor is described that includes a plurality of processing cores. The processor includes an interconnection network coupled to each of said processing...
US-9,268,691 Fast mechanism for accessing 2n.+-.1 interleaved memory system
A mechanism implemented by a controller enables efficient access to an interleaved memory system that includes M modules, M being (2.sup.n+1) or (2.sup.n-1), n...
US-9,268,686 Background reordering--a preventive wear-out control mechanism with limited overhead
Embodiments of the present disclosure describe background reordering techniques and configurations to prevent wear-out of an integrated circuit device such as a...
US-9,268,631 Adaptive moving read references for memory cells
Examples are disclosed for generating or providing a moving read reference (MRR) table for recovering from a read error of one or more memory cells of a...
US-9,268,626 Apparatus and method for vectorization with speculation support
An apparatus and method are described for detecting and responding to fault conditions in a processor. For example, one embodiment of a method comprises:...
US-9,268,611 Application scheduling in heterogeneous multiprocessor computing platform based on a ratio of predicted...
Methods and apparatus to schedule applications in heterogeneous multiprocessor computing platforms are described. In one embodiment, information regarding...
US-9,268,596 Instruction and logic to test transactional execution status
Novel instructions, logic, methods and apparatus are disclosed to test transactional execution status. Embodiments include decoding a first instruction to start...
US-9,268,595 Scheduling thread execution based on thread affinity
In accordance with some embodiments, spatial and temporal locality between threads executing on graphics processing units may be analyzed and tracked in order...
US-9,268,594 Processor extensions for execution of secure embedded containers
Methods and apparatus relating to processor extensions for execution of secure embedded containers are described. In an embodiment, a scalable solution for...
US-9,268,570 DFA compression and execution
A character class (CCL) memory containing simple CCLs represented by encoding contained symbols or minimum and maximum symbols of a range, complex CCLs...
US-9,268,568 Method and apparatus for agent interfacing with pipeline backbone to locally handle transactions while obeying...
In accordance with embodiments disclosed herein, there are provided methods, systems, and apparatuses for enabling an agent interfacing with a pipelined...
US-9,268,567 Instruction and logic for boyer-moore search of text strings
Instructions and logic provide extended vector suffix comparisons for Boyer-Moore searches. Some embodiments, responsive to an instruction specifying: a pattern...
US-9,268,565 Method and apparatus for performing logical compare operations
A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In...
US-9,268,564 Vector and scalar based modular exponentiation
An embodiment includes a method for computing operations, such as modular exponentiation, using a mix of vector and scalar instructions to accelerate various...
US-9,268,545 Connecting mobile devices, internet-connected hosts, and cloud services
Applications are downloaded to a device from a cloud-based service by establishing trust with between the device and a host system. The host system and the...
US-9,268,541 Methods and systems to vectorize scalar computer program loops having loop-carried dependences
Methods and systems to convert scalar computer program loops having loop carried dependences to vector computer program loops are disclosed. One example method...
US-9,268,393 Enforcing a power consumption duty cycle in a processor
In an embodiment, a processor includes a plurality of cores each to independently execute instructions, a plurality of graphics engines each to independently...
US-9,268,378 Techniques and system for managing platform temperature
In one embodiment an apparatus includes a temperature sensor to perform a multiplicity of junction temperature measurements for a component in a platform, a...
US-9,268,377 Electronic device having a passive heat exchange device
An electronic device is provided that includes a base having a first side and a second side, and a lid having a first side and a second side. A hinge device may...
US-9,267,944 Biosensor utilizing a resonator having a functionalized surface
Systems and methods for detecting the presence of biomolecules in a sample using biosensors that incorporate resonators which have functionalized surfaces for...
US-9,266,723 Misalignment correction for embedded microelectronic die applications
The present disclosure relates to the field of integrated circuit packaging and, more particularly, to packages using embedded microelectronic die applications,...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.