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Patent # Description
US-9,787,188 High-frequency on-package voltage regulator
An on-package voltage regulation system includes a platform controller hub (PCH), a driver metal-oxide-semiconductor field-effect transistor (DRMOS) control...
US-9,787,028 Improving signaling performance in connector design
Apparatus and methods of arranging ground pins and signal pins in a card connector includes arranging a signal pins and ground pins in a card connector into at...
US-9,786,985 Apparatus, system and method of beamforming training
Some demonstrative embodiments include apparatuses, devices, systems and methods of beamforming training. For example, an apparatus may include a transmitter, a...
US-9,786,786 Non-planar quantum well device having interfacial layer and method of forming same
Techniques are disclosed for forming a non-planar quantum well structure. In particular, the quantum well structure can be implemented with group IV or III-V...
US-9,786,783 Transistor architecture having extended recessed spacer and source/drain regions and method of making same
Techniques are disclosed for forming transistor architectures having extended recessed spacer and source/drain (S/D) regions. In some embodiments, a recess can...
US-9,786,769 Complementary tunneling FET devices and method for forming the same
Described is an apparatus forming complementary tunneling field effect transistors (TFETs) using oxide and/or organic semiconductor material. One type of TFET...
US-9,786,667 Floating body memory cell having gates favoring different conductivity type regions
A method for fabricating floating body memory cells (FBCs), and the resultant FBCs where gates favoring different conductivity type regions are used is...
US-9,786,581 Through-silicon via (TSV)-based devices and associated techniques and configurations
Embodiments of the present disclosure are directed toward through-silicon via (TSV)-based devices and associated techniques and configurations. In one...
US-9,786,559 Process and material for preventing deleterious expansion of high aspect ratio copper filled through silicon...
Techniques are disclosed for forming through-silicon vias (TSVs) implementing a negative thermal expansion (NTE) material such as zirconium tungstate...
US-9,786,517 Ablation method and recipe for wafer level underfill material patterning and removal
Introducing an underfill material over contact pads on a surface of an integrated circuit substrate; and ablating the introduced underfill material to expose an...
US-9,786,375 Multiple blocks per string in 3D NAND memory
Embodiments describe techniques and configurations for an apparatus including a three-dimensional (3D) memory array having a plurality of strings of memory...
US-9,786,353 Reconfigurable clocking architecture
Described is an apparatus which comprises: a comparator to be clocked by a clock signal to be provided by a clocking circuit, wherein the clocking circuit...
US-9,786,338 Multiple register memory access instructions, processors, methods, and systems
A processor includes N-bit registers and a decode unit to receive a multiple register memory access instruction. The multiple register memory access instruction...
US-9,786,230 Device for projecting an image
According to the present invention there is provided a projection device, which is configured to project an image which is co-operable with images projected by...
US-9,786,205 Techniques for enforcing a depth order policy for graphics in a display scene
Various embodiments are generally directed an apparatus and method for processing an encrypted graphic with a decryption key associated with a depth order...
US-9,785,964 Micro digital signage hardware integration
A system to display information using a display shelf of a retailer may include a first display configured to be attached to a first edge portion of the display...
US-9,785,801 Management of authenticated variables
An embodiment includes an apparatus comprising: an out-of-band cryptoprocessor coupled to secure non-volatile storage; and at least one storage medium having...
US-9,785,800 Non-tracked control transfers within control transfer enforcement
A processor includes an execution unit and a processing logic operatively coupled to the execution unit, the processing logic to: enter a first execution state;...
US-9,785,766 Automated password management
An embodiment includes an automatic policy managed password management system. One embodiment manages changing the password (with little to no user interaction)...
US-9,785,606 Systems, methods, and devices for media agnostic USB packet scheduling
Example systems, methods, and devices are disclosed for scheduling traffic by a media agnostic universal serial bus protocol adaptive layer. In one embodiment,...
US-9,785,604 Preset evaluation to improve input/output performance in high-speed serial interconnects
Methods and apparatus for utilization of preset evaluation to improve input/output performance in high-speed serial interconnects are described. In some...
US-9,785,576 Hardware-assisted virtualization for implementing secure video output path
Systems and methods for employing hardware-assisted virtualization for implementing a secure video output path. An example processing system comprises: a...
US-9,785,556 Cross-die interface snoop or global observation message ordering
Methods and apparatus relating to techniques for Cross-Die Interface (CDI) snoop and/or go (or completion) message ordering are described. In one embodiment,...
US-9,785,485 Virtualization event processing in a layered virtualization architecture
Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an...
US-9,785,463 Using per task time slice information to improve dynamic performance state selection
Methods and apparatus for using per task time slice information to improve dynamic performance state selection are described. In one embodiment, a new...
US-9,785,462 Registering a user-handler in hardware for transactional memory event handling
A method and apparatus for registering a user-handler in hardware for transactional memory is herein described. A user-accessible register is to hold a...
US-9,785,447 System standby emulation with fast resume
Systems and methods may provide for assuming control over a processor in response to an operating system (OS) request to transition the processor into a...
US-9,785,442 Systems, apparatuses, and methods for data speculation execution
Systems, methods, and apparatuses for data speculation execution (DSX) are described. In some embodiments, a hardware apparatus for performing DSX comprises a...
US-9,785,437 Method and apparatus for performing a vector bit reversal and crossing
An apparatus and method for performing a vector bit reversal and crossing. For example, one embodiment of a processor comprises: a first source vector register...
US-9,785,436 Apparatus and method for efficient gather and scatter operations
An apparatus and method are described for performing efficient gather operations in a pipelined processor. For example, a processor according to one embodiment...
US-9,785,433 Three source operand floating-point addition instruction with operand negation bits and intermediate and final...
A processor includes a decode unit to decode a three source floating point addition instruction indicating a first source operand having a first floating point...
US-9,785,413 Methods and apparatus to eliminate partial-redundant vector loads
Methods, apparatus, systems and articles of manufacture are disclosed to eliminate partial-redundant vector loads. An example apparatus includes a node group to...
US-9,785,359 Sending packets using optimized PIO write sequences without sfences and out of order credit returns
Methods and apparatus for sending packets using optimized PIO write sequences without sfences and out-of-order credit returns. Sequences of Programmed...
US-9,785,261 Near field communications (NFC)-based active stylus
Described herein are architectures, platforms and methods for NFC-based operations in a stylus device.
US-9,785,234 Analysis of ambient light for gaze tracking
Technologies for gaze tracking by ambient light include a mobile compute device to capture a first image of a user of the mobile compute device by a first...
US-9,785,226 Operating point management in multi-core architectures
For one disclosed embodiment, a processor comprises a plurality of processor cores to operate at variable performance levels. One of the plurality of processor...
US-9,785,223 Power management in an uncore fabric
In an example, a shared uncore memory fabric of a system-on-a-chip (SoC) is configured to provide real-time power management. The SoC may include a power...
US-9,785,198 Hinge configuration for an electronic device
Particular embodiments described herein provide for an electronic device, such as a notebook computer or laptop, that includes a circuit board coupled to a...
US-9,785,194 Spill resistant chassis for electronic device
In one example an electronic device comprises at least one electronic component and a body formed from a rigid material and comprising a first major surface and...
US-9,785,143 Electronic device having a motion detector
A computer is provided that includes a lid having a display and a motion detector to detect motion or movement of a user.
US-9,785,136 PCH thermal sensor dynamic shutdown
Particular embodiments described herein provide for a system, such as a computing system, that includes a processor operable to execute instructions associated...
US-9,785,123 Digital analog display with rotating bezel
A wearable device is described herein. The wearable device includes a display. The display can be a digital display with analog components. The wearable device...
US-9,784,967 Suppression of undesired harmonics in MEMS mirror projector display
Disclosed herein are devices and methods to generate a drive signal to actuate a MEMS mirror system. A controller can generate the drive signal to comprise a...
US-9,784,791 Apparatus and method to debug a voltage regulator
Described is an apparatus which comprises: a first voltage regulator (VR) having a reference input node; and a first multiplexer to provide a reference voltage...
US-9,781,701 Radio communication device and method for operating a radio communication device
According to an aspect of this disclosure, a radio communication device is provided including a first transceiver configured to transmit and receive signals in...
US-9,781,657 Methods, wireless communication station, and system for WLAN channel selection through beacon requests
Embodiments of a user station (STA) and methods for WLAN channel selection through beacon requests are generally described herein. In some embodiments, a STA...
US-9,781,638 Method of enhanced interference measurements for channel state information (CSI) feedback
Embodiments of providing enhanced interference measurements for CSI feedback are generally described herein. In some embodiments, CSI-IM resources are used by...
US-9,781,634 Techniques for 40 megahertz(MHz) channel switching
Embodiments of the invention include methods, articles, and apparatuses to provide information related to channels transmitted and received according to a...
US-9,781,612 Correlation-based self-interference suppression
Representative implementations of devices and techniques provide self-interference suppression for a transceiver of a wireless communication system. To minimize...
US-9,781,575 Autonomous semantic labeling of physical locations
A portable electronic device may generate a (RF) radio frequency fingerprint that includes information representative of at least a portion of RF signals...
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