Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: intel





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-9,651,672 Systems and methods for time synchronization
A method and system for time synchronization in a mobile device are disclosed. The method includes negotiating a synchronization schedule. The synchronization...
US-9,651,610 Visible laser probing for circuit debug and defect analysis
Visible laser probing is described. In one example a probe device has a laser configured to provide a laser beam at a visible wavelength, an objective lens...
US-9,648,733 Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning...
A method of fabricating a substrate core structure comprises: providing first and second patterned conductive layers defining openings therein on each side of a...
US-9,648,602 Fast switching of forward link in wireless system
A technique for distributing channel allocation information in a demand access communication system. Multiple access codes are used that have a defined code...
US-9,648,589 Multiple radio devices for implementing dynamic band access background
A system and method are provided to implement dynamic spectrum access with individual multi-mode devices that incorporate multiple radios in a single device. A...
US-9,648,582 RAN paging mechanism to enable enhanced coverage mode
Devices and methods of enhanced coverage (EC) paging are generally described. An evolved Node-B (eNB) may transmit multiple EC paging messages to user equipment...
US-9,648,555 Techniques for wireless network discovery and selection support
Techniques for wireless network discovery and selection support are described. In one embodiment, for example, an evolved packet core (EPC) node may comprise a...
US-9,648,476 Methods and arrangements for sensors
Generally, smart sensors, logic to process messages from smart sensors, and smart sensor systems are described herein. Embodiments may comprise logic such as...
US-9,648,457 Multi-signal geometric location sensing for access control
Various embodiments are generally directed to the provision and use of geometric location based security systems that use multiple beacons for determining a...
US-9,648,338 Video codec and motion estimation method
The invention provides a video codec. In one embodiment, the video codec is coupled to an outer memory storing a reference frame, and comprises an interface...
US-9,647,863 Techniques to manage dwell times for pilot rotation
Techniques to manage dwell times for pilot rotation are described. An apparatus may comprise a memory configured to store a data structure with a set of...
US-9,647,831 Flexible architecture and instruction for advanced encryption standard (AES)
A flexible aes instruction set for a general purpose processor is provided. The instruction set includes instructions to perform a "one round" pass for aes...
US-9,647,818 Apparatus and method for single-tone device discovery in wireless communication networks
Embodiments of wireless communication devices and methods for device discovery is generally described herein. Some of these embodiments describe an apparatus...
US-9,647,804 Multi-carrier configuration, activation and scheduling
Embodiments of block acknowledgements request apparatus, systems, and methods are generally described herein. Other embodiments may be described and claimed. An...
US-9,647,735 Hybrid digital and analog beamforming for large antenna arrays
A hybrid digital and analog beamforming device for a node operable with an antenna array is disclosed. In an example, the hybrid digital and analog beamforming...
US-9,647,678 Method for operating radio frequency digital to analog conversion circuitry in the event of a first and a...
A method for operating a radio frequency digital to analog conversion circuitry with a number of cells if a first input sample and a subsequent second input...
US-9,647,636 Piezoelectric package-integrated delay lines for radio frequency identification tags
Embodiments of the invention include delay line circuitry that is integrated with an organic substrate. Organic dielectric material and a plurality of...
US-9,647,363 Techniques and configurations to control movement and position of surface mounted electrical devices
Embodiments of the present disclosure are directed towards techniques and configurations to control movement and position of surface mounted electrical devices....
US-9,647,208 Low voltage embedded memory having conductive oxide and electrode stacks
Low voltage embedded memory having conductive oxide and electrode stacks is described. For example, a material layer stack for a memory element includes a first...
US-9,646,970 Floating body memory cell having gates favoring different conductivity type regions
A method for fabricating floating body memory cells (FBCs), and the resultant FBCs where gates favoring different conductivity type regions are used is...
US-9,646,953 Integrated circuit packaging techniques and configurations for small form-factor or wearable devices
Embodiments of the present disclosure are directed toward integrated circuit (IC) packaging techniques and configurations for small form-factor or wearable...
US-9,646,952 Microelectronic package debug access ports
A microelectronic package may be fabricated with debug access ports formed either at a side or at a bottom of the microelectronic package. In one embodiment,...
US-9,646,910 Integrated heat spreader that maximizes heat transfer from a multi-chip package
In at least some embodiments, an electronic package to maximize heat transfer comprises a plurality of components on a substrate. A stiffener plate is installed...
US-9,646,903 Thermoset polymides for microelectronic applications
Dendrimer/hyperbranched materials are combined with polyimide to form a low CTE material for use as a dielectric substrate layer or an underfill. In the...
US-9,646,890 Replacement metal gates to enhance transistor strain
Some embodiments of the present invention include apparatuses and methods relating to NMOS and PMOS transistor strain.
US-9,646,856 Method of manufacturing a semiconductor device including removing a relief layer from back surface of...
A method of manufacturing a device includes providing a semiconductor chip having a first face and a second face opposite to the first face with a contact pad...
US-9,646,854 Embedded circuit patterning feature selective electroless copper plating
Embodiments describe the selective electroless plating of dielectric layers. According to an embodiment, a dielectric layer is patterned to form one or more...
US-9,646,851 Embedded semiconductive chips in reconstituted wafers, and systems containing same
A reconstituted wafer includes a rigid mass with a flat surface and a base surface disposed parallel planar to the flat surface. A plurality of dice are...
US-9,646,822 Active regions with compatible dielectric layers
A method to form a semiconductor structure with an active region and a compatible dielectric layer is described. In one embodiment, a semiconductor structure...
US-9,646,720 Self-repair logic for stacked memory architecture
Self-repair logic for stacked memory architecture. An embodiment of a memory device includes a memory stack having one or more memory die elements, including a...
US-9,646,660 Selectable memory access time
The present disclosure relates to selectable memory access time. An apparatus includes a memory controller. The memory controller is configured to select a...
US-9,646,657 Power loss capacitor test using voltage ripple
These present disclosure provides techniques to determine the capacitance of a power loss capacitor based on voltage ripple. The power loss capacitor may be a...
US-9,646,630 Voice recognition via wide range adaptive beam forming and multi-channel audio data
An apparatus, system, and computer readable media for data pre-processing and processing for voice recognition are described herein. The apparatus includes...
US-9,646,570 Mechanism for facilitating improved copying of graphics data on computing devices
A mechanism is described for facilitating improved copying of graphics data at computing devices according to one embodiment. A method of embodiments, as...
US-9,646,522 Enhanced information delivery using a transparent display
Information is delivered about a particular external environment using a transparent display. In one embodiment, a method includes determining a position of a...
US-9,646,426 Methods and devices for determining a location estimate
Generally discussed herein are systems and apparatuses for managing a plurality of location providers and/or assigning a location provider to provide a location...
US-9,646,216 Multiple user biometric for authentication to secured resources
Various embodiments are generally directed to the provision and use of multiple person biometric authentication systems. An apparatus including a processor...
US-9,646,153 Securing content from malicious instructions
A method and system is provided for securing content from malicious shaders. The method includes determining the content the shader is to execute. A signature...
US-9,646,144 Extending user authentication across a trust group of smart devices
Particular embodiments described herein provide for a wearable electronic device with a biometric sensor and logic. At least a portion of the logic is...
US-9,645,965 Apparatus, system, and method for improving equalization with a hardware driven algorithm
A system and method comprising, in response to a first component and a link partner of the first component, undergoing equalization, the first component is to...
US-9,645,942 Method for pinning data in large cache in multi-level memory system
A method to request memory from a far memory cache and implement, at an operating system (OS) level, a fully associative cache on the requested memory. The...
US-9,645,939 Hardware apparatuses and methods for distributed durable and atomic transactions in non-volatile memory
Hardware apparatuses and methods for distributed durable and atomic transactions in non-volatile memory are described. In one embodiment, a hardware apparatus...
US-9,645,938 Cache operations for memory management
In accordance with the present description, cache operations for a memory-sided cache in front of a backing memory such as a byte-addressable non-volatile...
US-9,645,930 Dynamic home tile mapping
Technologies for dynamic home tile mapping are described. an address request can be received from a processing core, the processing core being associated with a...
US-9,645,884 Performing a cyclic redundancy checksum operation responsive to a user-level instruction
In one embodiment, the present invention includes a method for receiving incoming data in a processor and performing a checksum operation on the incoming data...
US-9,645,864 Technologies for operating system transitions in multiple-operating-system environments
Technologies for transitioning between operating systems include a computing device having a main memory and a data storage device. The computing device...
US-9,645,829 Techniques to communicate with a controller for a non-volatile dual in-line memory module
Examples may include communicating with a controller for a non-volatile dual in-line memory module through a system management bus (SMBus) interface. In some...
US-9,645,826 Coalescing adjacent gather/scatter operations
According to one embodiment, a processor includes an instruction decoder to decode a first instruction to gather data elements from memory, the first...
US-9,645,821 Instruction and logic for processing text strings
A processor includes a decoder logic to decode a compare instruction, and an execution unit to execute the compare instruction. The compare instruction is to...
US-9,645,820 Apparatus and method to reserve and permute bits in a mask register
An apparatus and method are described for performing a bit reversal and permutation on mask values. For example, a processor is described to execute an...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.