Easy To Use Patents Search & Patent Lawyer Directory
At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.
Searching: intel
Search by keyword, patent number, inventor, assignee, city or state:
| Patent # | Description |
|---|---|
| US-9,788,145 |
Detection of device motion and nearby object motion In accordance with various aspects of the disclosure, a system, method, and device for detecting motion based on channel fading characteristics are presented.... |
| US-9,788,075 |
Techniques for augmenting a digital on-screen graphic In an embodiment, a digital on-screen graphic may be identified within a multimedia stream for an electronic display. An augmentation overlay may be determined... |
| US-9,787,991 |
Analytics assisted encoding Video analytics may be used to assist video encoding by selectively encoding only portions of a frame and using, instead, previously encoded portions.... |
| US-9,787,990 |
Content adaptive parametric transforms for coding for next generation
video Techniques related to content adaptive parametric transforms for coding video are described. |
| US-9,787,986 |
Techniques for parallel video transcoding Various embodiments are directed to techniques for dividing compressed video data into portions for load balancing or redundancy among multiple video... |
| US-9,787,967 |
Signaling three-dimensional video information in communication networks Embodiments of the present disclosure describe devices, methods, computer-readable media and systems configurations for signaling stereoscopic three-dimensional... |
| US-9,787,959 |
Method and device for projecting an image with improved safety A projection device comprising a MEMS mirror which oscillates about one or more oscillation axes to scan light from one or more lasers, across a display screen,... |
| US-9,787,742 |
Optimizing synchronization of audio and network tasks in voice over packet
switched networks A user equipment device (UE) comprises physical layer circuitry configured to transmit and receive radio frequency electrical signals with one or more nodes of... |
| US-9,787,595 |
Evolved node-B and mobility management entity and user equipment and
methods for supporting attended and... Embodiments of an Evolved Node-B (eNB) to support packet-switched (PS) services according to EPS bearers are disclosed herein. The eNB may receive an EPS bearer... |
| US-9,787,571 |
Link delay based routing apparatus for a network-on-chip A router of a network-on-chip receives delay information associated with a plurality of links of the network-on-chip. The router determines at least one link of... |
| US-9,787,538 |
Wireless gigabit-enabled device configuration A wireless high frequency directed communication-enabled device configured to determine a relative direction of a wireless high frequency directed... |
| US-9,787,459 |
Non-linear interference cancellation for wireless transceivers Non-linear interference cancellation techniques are provided for wireless transceivers. Non-linear reduction of interference of a transmit signal on a received... |
| US-9,787,446 |
Method and device for processing resource blocks A method (700) for processing resource blocks in a receiver may include receiving (701) a signal comprising transmissions from a plurality of radio cells,... |
| US-9,787,444 |
Enhanced node B and methods for network assisted interference cancellation
with reduced signaling Embodiments of an enhanced node B (eNB) and methods for network-assisted interference cancellation with reduced signaling in a 3GPP LTE network are generally... |
| US-9,787,406 |
Power management implementation in an optical link An optical link power management scheme takes the best advantage of a dynamic connection environment, where ports may be connected and disconnected at any time,... |
| US-9,787,376 |
Systems, methods, and devices for hybrid full-dimensional multiple-input
multiple-output According UE is configured to receive a channel state information reference signal (CSI-RS) from an evolved Universal Terrestrial Radio Access Network (E-UTRAN)... |
| US-9,787,366 |
Near field communication detection in wireless charging systems This disclosure describes systems, methods, and apparatus related to near field communication (NFC) detection. A device may determine a first device in... |
| US-9,787,336 |
Device and method of pre-distortion of power amplifier input signals Embodiments of a mobile communication device and method for digital pre-distortion (DPD) are disclosed herein. The mobile communication device may scale a... |
| US-9,787,332 |
Error-checking compressed streams in heterogeneous compression
accelerators A compression engine may be designed for more efficient error checking of a compressed stream, to include adaptation of a heterogeneous design that includes... |
| US-9,787,308 |
Reference voltage generating device and method A reference voltage generating device including a reference voltage source, a charge supplying source, a first switch, a second switch, a charge storage unit... |
| US-9,787,264 |
Configurable transceiver circuit architecture Techniques and mechanisms for providing signal communication with a configurable transceiver circuit. In an embodiment, an integrated circuit comprises... |
| US-9,787,188 |
High-frequency on-package voltage regulator An on-package voltage regulation system includes a platform controller hub (PCH), a driver metal-oxide-semiconductor field-effect transistor (DRMOS) control... |
| US-9,787,028 |
Improving signaling performance in connector design Apparatus and methods of arranging ground pins and signal pins in a card connector includes arranging a signal pins and ground pins in a card connector into at... |
| US-9,786,985 |
Apparatus, system and method of beamforming training Some demonstrative embodiments include apparatuses, devices, systems and methods of beamforming training. For example, an apparatus may include a transmitter, a... |
| US-9,786,786 |
Non-planar quantum well device having interfacial layer and method of
forming same Techniques are disclosed for forming a non-planar quantum well structure. In particular, the quantum well structure can be implemented with group IV or III-V... |
| US-9,786,783 |
Transistor architecture having extended recessed spacer and source/drain
regions and method of making same Techniques are disclosed for forming transistor architectures having extended recessed spacer and source/drain (S/D) regions. In some embodiments, a recess can... |
| US-9,786,769 |
Complementary tunneling FET devices and method for forming the same Described is an apparatus forming complementary tunneling field effect transistors (TFETs) using oxide and/or organic semiconductor material. One type of TFET... |
| US-9,786,667 |
Floating body memory cell having gates favoring different conductivity
type regions A method for fabricating floating body memory cells (FBCs), and the resultant FBCs where gates favoring different conductivity type regions are used is... |
| US-9,786,581 |
Through-silicon via (TSV)-based devices and associated techniques and
configurations Embodiments of the present disclosure are directed toward through-silicon via (TSV)-based devices and associated techniques and configurations. In one... |
| US-9,786,559 |
Process and material for preventing deleterious expansion of high aspect
ratio copper filled through silicon... Techniques are disclosed for forming through-silicon vias (TSVs) implementing a negative thermal expansion (NTE) material such as zirconium tungstate... |
| US-9,786,517 |
Ablation method and recipe for wafer level underfill material patterning
and removal Introducing an underfill material over contact pads on a surface of an integrated circuit substrate; and ablating the introduced underfill material to expose an... |
| US-9,786,375 |
Multiple blocks per string in 3D NAND memory Embodiments describe techniques and configurations for an apparatus including a three-dimensional (3D) memory array having a plurality of strings of memory... |
| US-9,786,353 |
Reconfigurable clocking architecture Described is an apparatus which comprises: a comparator to be clocked by a clock signal to be provided by a clocking circuit, wherein the clocking circuit... |
| US-9,786,338 |
Multiple register memory access instructions, processors, methods, and
systems A processor includes N-bit registers and a decode unit to receive a multiple register memory access instruction. The multiple register memory access instruction... |
| US-9,786,230 |
Device for projecting an image According to the present invention there is provided a projection device, which is configured to project an image which is co-operable with images projected by... |
| US-9,786,205 |
Techniques for enforcing a depth order policy for graphics in a display
scene Various embodiments are generally directed an apparatus and method for processing an encrypted graphic with a decryption key associated with a depth order... |
| US-9,785,964 |
Micro digital signage hardware integration A system to display information using a display shelf of a retailer may include a first display configured to be attached to a first edge portion of the display... |
| US-9,785,801 |
Management of authenticated variables An embodiment includes an apparatus comprising: an out-of-band cryptoprocessor coupled to secure non-volatile storage; and at least one storage medium having... |
| US-9,785,800 |
Non-tracked control transfers within control transfer enforcement A processor includes an execution unit and a processing logic operatively coupled to the execution unit, the processing logic to: enter a first execution state;... |
| US-9,785,766 |
Automated password management An embodiment includes an automatic policy managed password management system. One embodiment manages changing the password (with little to no user interaction)... |
| US-9,785,606 |
Systems, methods, and devices for media agnostic USB packet scheduling Example systems, methods, and devices are disclosed for scheduling traffic by a media agnostic universal serial bus protocol adaptive layer. In one embodiment,... |
| US-9,785,604 |
Preset evaluation to improve input/output performance in high-speed serial
interconnects Methods and apparatus for utilization of preset evaluation to improve input/output performance in high-speed serial interconnects are described. In some... |
| US-9,785,576 |
Hardware-assisted virtualization for implementing secure video output path Systems and methods for employing hardware-assisted virtualization for implementing a secure video output path. An example processing system comprises: a... |
| US-9,785,556 |
Cross-die interface snoop or global observation message ordering Methods and apparatus relating to techniques for Cross-Die Interface (CDI) snoop and/or go (or completion) message ordering are described. In one embodiment,... |
| US-9,785,485 |
Virtualization event processing in a layered virtualization architecture Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an... |
| US-9,785,463 |
Using per task time slice information to improve dynamic performance state
selection Methods and apparatus for using per task time slice information to improve dynamic performance state selection are described. In one embodiment, a new... |
| US-9,785,462 |
Registering a user-handler in hardware for transactional memory event
handling A method and apparatus for registering a user-handler in hardware for transactional memory is herein described. A user-accessible register is to hold a... |
| US-9,785,447 |
System standby emulation with fast resume Systems and methods may provide for assuming control over a processor in response to an operating system (OS) request to transition the processor into a... |
| US-9,785,442 |
Systems, apparatuses, and methods for data speculation execution Systems, methods, and apparatuses for data speculation execution (DSX) are described. In some embodiments, a hardware apparatus for performing DSX comprises a... |
| US-9,785,437 |
Method and apparatus for performing a vector bit reversal and crossing An apparatus and method for performing a vector bit reversal and crossing. For example, one embodiment of a processor comprises: a first source vector register... |
File A Patent Application
- Protect your idea -- Don't let someone else file first. Learn more.
- 3 Easy Steps -- Complete Form, application Review, and File. See our process.
- Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.