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Patent # Description
US-1,041,7531 Techniques for encapsulating metadata in contextual data streams
A method for encapsulating metadata in a contextual data stream is described. The method may include receiving sensor data from a sensor. The method may include...
US-1,041,7510 System, methods, and apparatus for in-vehicle fiducial mark tracking and interpretation
Certain embodiments of the invention may include systems, methods, and apparatus for in-vehicle fiducial mark tracking and interpretation According to an...
US-1,041,7504 Smart mirror mechanism
A system is described. The system includes one or more sensing devices to acquire depth image data, scan logic to scan the depth image data for moving objects,...
US-1,041,7445 Context-aware privacy meter
Technologies are presented that provide context-aware privacy metering regarding establishments, such as consumer establishments. A method of rating privacy of...
US-1,041,7280 Assigning global edge IDs for evolving graphs
A method, computing system, and computer-readable medium for assigning global edge IDs for evolving graphs are described herein. The method includes selecting a...
US-1,041,7218 Techniques to achieve ordering among storage device transactions
Various embodiments are generally directed to an apparatus, method and other techniques to receiving a sequence of transactions, each transaction including a...
US-1,041,7175 Apparatus, methods, and systems for memory consistency in a configurable spatial accelerator
Methods and apparatuses relating to consistency in an accelerator are described. In one embodiment, request address file (RAF) circuits are coupled to a spatial...
US-1,041,7170 Device, system and method for packet processing to facilitate circuit testing
Techniques and mechanisms to modify packet information in support of on-chip test functionality. In an embodiment, an integrated circuit (IC) chip includes a...
US-1,041,7149 Self-aligning a processor duty cycle with interrupts
In an embodiment, a processor includes a plurality of cores to independently execute instructions, at least one graphics engine to independently execute...
US-1,041,7135 Near memory miss prediction to reduce memory access latency
Systems, apparatuses and methods may provide for technology to maintain a prediction table that tracks missed page addresses with respect to a first memory. If...
US-1,041,7070 Techniques for handling errors in persistent memory
Examples may include a basic input/output system (BIOS) for a computing platform communicating with a controller for a non-volatile dual in-line memory module...
US-1,041,7001 Physical register table for eliminating move instructions
Embodiments of an invention for a physical register table for eliminating move instructions are disclosed. In one embodiment, a processor includes a physical...
US-1,041,7000 Method for a delayed branch implementation by using a front end track table
A method for a delayed branch implementation by using a front end track table. The method includes receiving an incoming instruction sequence using a global...
US-1,041,6999 Processors, methods, and systems with a configurable spatial accelerator
Systems, methods, and apparatuses relating to a configurable spatial accelerator are described. In one embodiment, a processor includes a core with a decoder to...
US-1,041,6998 Instruction for determining histograms
A processor is described having a functional unit of an instruction execution pipeline. The functional unit has comparison bank circuitry and adder circuitry....
US-1,041,6997 Method and apparatus for performing logical compare operations
A method and apparatus for including in processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In...
US-1,041,6912 Efficiently training memory device chip select control
A chip select training mode (CSTM) enables a memory subsystem to train a chip select signal separately from command bus training. A memory device and a memory...
US-1,041,6900 Technologies for addressing data in a memory
Technologies for addressing data in a memory include an apparatus that includes a memory and a controller. The memory is to store sub-blocks of data in a data...
US-1,041,6890 Application execution enclave memory page cache management method and apparatus
Apparatuses, methods and storage medium associated with application execution enclave cache management, are disclosed herein. In embodiments, an apparatus may...
US-1,041,6565 Display device having integrated metamaterial lens
Embodiments related to emissive display device structures having an emissive display element and a metamaterial lens having a plurality of nanoparticles over an...
US-1,041,6378 Chip-to-chip interconnect with embedded electro-optical bridge structures
Techniques and mechanisms for providing a bridge between integrated circuit (IC) chips. In an embodiment, the bridge device comprises a semiconductor substrate...
US-1,041,6311 Systems and techniques for geofence crossing-based control
Geofence crossing-based control systems and techniques are described herein. For example, a geofence crossing control technique may include receiving a location...
US-1,041,6282 Method and device for radar signal detection
This disclosure relates to a method for radar signal detection, the method comprising: scanning a radio channel by a scanning filter in a first frequency...
US-1,041,6241 Battery life estimation based on multiple locations
In embodiments, an apparatus may include a battery life monitor. The battery life monitor may, in some embodiments, receive a battery level indicator indicative...
US-1,041,6217 On-chip test circuit for magnetic random access memory (MRAM)
Embodiments include a test circuit to test one or more magnetic tunnel junctions (MTJs) of a magnetic random access memory (MRAM). The test circuit may measure...
US-D860,210 Computer Dock
US-D860,209 Computer dock for a backpack
US-D860,208 Monitor docking station having multiple docks for multiple tablet devices
US-1,041,2754 Resource access in device to device communication
A wireless communication device is configured to perform resource access in device-to-device (D2D) communication. A user equipment (UE) is provided with...
US-1,041,2696 Methods and arrangements for frame transmissions
Logic to "loosely" manage synch frame transmissions in a synch network via the devices synched to the network that implement the logic. Logic may distributedly...
US-1,041,2636 Channel management for an enhanced directional multi-gigabit station
Embodiments of a user station (STA) and methods for operating in a millimeter-wave basic service set (BSS) are generally described herein. In some embodiments,...
US-1,041,2592 Evolved node-B, spectrum access system (SAS) controller and method for communication in shared spectrum
Embodiments of an Evolved Node-B (eNB), Private Spectrum Access System (SAS) controller, and methods for communication in shared spectrum are generally...
US-1,041,2560 Mobile device cooling and performance management
Disclosed is a mobile device. The mobile device may be located proximate a mobile terminal and controlled by the mobile terminal. The mobile device may include...
US-1,041,2372 Dynamic baseline depth imaging using multiple drones
Systems and methods may include a drone or multiple drones to capturing depth information, which may be used to create a stereoscopic map. The drone may capture...
US-1,041,1980 Proactive path quality reporting in packet transmission
An originated packet is to be forward-propagated along a path to a destination device, with the path including one or more intermediary node devices. A path...
US-1,041,1958 Automatic device configuration
Various systems and methods for automatic device configuration are described herein. A system for automatic device configuration comprises a performance monitor...
US-1,041,1942 Techniques for using a modulation and coding scheme for downlink transmissions
Examples include techniques for using a modulation and coding scheme (MCS) for downlink transmissions. In some examples information elements (IEs) for either a...
US-1,041,1914 Data detection in MIMO systems with demodulation and tracking reference signals
What is disclosed is a method for wireless communication comprising receiving a wireless communication via a receiver of the mobile communication device,...
US-1,041,1905 Public key infrastructure using blockchains
Techniques for implementing public key infrastructure using blockchains are described. An apparatus may receive, from a introducee principal, a proof-of-work....
US-1,041,1889 Chaotic-based synchronization for secure network communications
In an embodiment, an apparatus includes a first logic to receive from a first node a synchronization portion of a message and to generate a set of state...
US-1,041,1845 Internet protocol interface selection for routing data traffic
A technology for a user equipment (UE) that is operable to select an internet protocol (IP) interface in a communications network is disclosed. Local policy...
US-1,041,1828 Methods, systems, and devices for modulation and coding scheme signaling for common control channel
Embodiments of the present disclosure describe methods, systems, and devices for modulation and coding scheme signaling for a common control channel. Various...
US-1,041,1785 Receive beam indication for 5G systems
Systems and technologies described herein provide functionality for a cellular base station to dynamically indicate a reception (Rx) beam to be used by a user...
US-1,041,1729 Technologies for allocating ephemeral data storage among managed nodes
Technologies for allocating ephemeral data storage among managed nodes include an orchestrator server to receive ephemeral data storage availability information...
US-1,041,1492 Wireless power transmitter shield with capacitors
Techniques for focusing the energy radiated by a wireless power transmitting unit are described. An example power transmitting unit includes a transmitter coil...
US-1,041,1122 Semiconductor device having group III-V material active region and graded gate dielectric
Semiconductor devices having group III-V material active regions and graded gate dielectrics and methods of fabricating such devices are described. In an...
US-1,041,1090 Hybrid trigate and nanowire CMOS device architecture
Hybrid trigate and nanowire CMOS device architecture, and methods of fabricating hybrid trigate and nanowire CMOS device architecture, are described. For...
US-1,041,1068 Electrical contacts for magnetoresistive random access memory devices
Disclosed herein are electrical contacts for magnetoresistive random access memory (MRAM) devices and related memory structures, devices, and methods. For...
US-1,041,1067 Integrated RF frontend structures
Techniques are disclosed for forming a monolithic integrated circuit semiconductor structure that includes a radio frequency (RF) frontend portion and may...
US-1,041,1007 High mobility field effect transistors with a band-offset semiconductor source/drain spacer
Monolithic FETs including a channel region in a first semiconductor material disposed over a substrate. While a mask, such as a gate stack or sacrificial gate...
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