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Method and apparatus for iteratively calculating a value
A method and an apparatus are described which determine at least one output value based on at least one input value. The input value is provided to a processing...
Credit based power management
An embodiment may include circuitry to determine whether to issue at least one credit to at least one sender of at least one packet. The credit(s) may be to...
Controlling processor consumption using on-off keying having a maximum off
In an embodiment, a processor includes a logic to cause at least one core to operate with a power control cycle including a plurality of on times and a...
Enabling a non-core domain to control memory bandwidth in a processor
In one embodiment, the present invention includes a processor having multiple domains including at least a core domain and a non-core domain that is transparent...
Providing energy efficient turbo operation of a processor
In one embodiment, a multicore processor includes cores that can independently execute instructions, each at an independent voltage and frequency. The processor...
Protected power management mode in a processor
In an embodiment, a processor includes a plurality of cores. Each core includes a core power unit to detect one or more power management events, and in response...
System and method for causing reduced power consumption associated with
Particular embodiments described herein can offer a method that includes receiving a signal indicating whether at least one device is in a low power mode,...
In one embodiment chassis for an electronic device comprises a first section and a second section and an assembly to connect the first section of the chassis to...
Head mounted information systems and related methods
A head mounted information system comprises a frame configured to be worn by a user, a sensor unit coupled to the frame, and a processor unit coupled to the...
Modular heads-up display system removable from a headgear frame
A Heads-Up Display (HUD) system comprises a processor, a power source, and one or more sensors coupled to a frame connector. The processor is configured to...
Datacenter optics (DCO) edge mount transceiver assembly and plug connector
Embodiments include a high bandwidth optical connection system suitable for interconnecting servers, for example within a rack of a datacenter. An edge mount...
Composite wire probe test assembly
An examples includes a substrate, including a conductive trace and a layer disposed on top of the conductive trace, the layer defining at least one cavity...
Highly selective coated-electrode nanogap transducers for the detection of
Highly selective coated-electrode nanogap transducers for the detection of redox molecules are described. In an example, an analyte detection system includes...
Smart variable torque display
In one example an electronic device comprises a controller, a chassis comprising a first section and a second section, and a hinge assembly to connect the first...
Reflected signal absorption in interconnect
Embodiments of the present disclosure are directed toward techniques and configurations for electrical signal absorption in an interconnect stub. In one...
Apparatus, system and method of bluetooth communication
Some demonstrative embodiments include apparatuses, systems and/or methods of Bluetooth communication. For example, an apparatus may include a wireless...
Device, system and method of communicating during a contention based
Some demonstrative embodiments include devices, systems and/or methods of communicating during a Contention-Based-Access-Period (CBAP). For example, a device...
Mapping an enhanced physical downlink control channel
Technology for mapping an enhanced physical downlink control channel to physical resource blocks in a radio frame is disclosed. One method comprises mapping...
Timing synchronization for downlink (DL) transmissions in coordinated
multipoint (CoMP) systems
Technology for adjusting a receiver timing of a wireless device in a Coordinated MultiPoint (CoMP) system is disclosed. One method can include the wireless...
Moving ad hoc network small cell relay handover
A mobile small station including a transceiver, a processor, and a memory having instructions for execution by the processor to exchange measurement information...
Opportunistic device-to-device communication
Embodiments of computer-implemented methods, systems, computing devices, and computer-readable media are described herein for opportunistically transitioning...
Method, apparatus and system of managing an encoder output rate based upon
wireless communication link feedback
Machine-readable media, methods, apparatus and system for managing an encoder output rate at least partially based upon wireless communication link feedback are...
Apparatus for end-user transparent utilization of computational, storage,
and network capacity of mobile...
Mobile devices, systems, and methods for end-user transparent utilization of computational, storage, and network capacity of mobile device are described herein....
A device, method and/or system for a wireless communications device with a memory, a processor, and a group management module to receive information indicating...
Peer-based collaborative discovery and signaling of another device in
Generally, this disclosure describes a method and system for peer-based collaborative discovery and signaling of another device in limited signal areas. A...
Video pipeline with direct linkage between decoding and post processing
In general, in one aspect, a decode order for a group of picture (GOP) frame structure for a video stream is modified to include regenerated P frames. The...
System and method for providing update information
A system and a method for providing update information. The system includes a client computer which is operably connected to a program information server. The...
Apparatus, system and method of controlling wireless transmission of video
Some demonstrative embodiments include apparatuses, systems and/or methods of controlling wireless transmission of video streams. For example, an apparatus may...
Dynamically assigning packet flows
In general, in one aspect, the disclosure describes a method includes accessing data of an egress packet belonging to a flow, storing data associating the flow...
Detection and handling of virtual network appliance failures
Techniques for detection and handling of virtual appliance failures. In one aspect, a method is implemented on a host platform on which a hypervisor (aka...
Low power digital phase interpolator
Described herein is an apparatus, method and system corresponding to relate to a low power digital phase interpolator (PI). The apparatus comprises: a digital...
Wireless communication device using time-variant antenna module
Embodiments of the present disclosure describe methods, apparatuses, and systems related to a wireless communication device using time-variant antenna. Other...
Digital phase-locked loop supply voltage control
Some embodiments include apparatuses and methods having a digitally controlled oscillator (DCO) in a digital phase-locked loop (PLL) and a control loop. The DCO...
High-voltage power gating
Power gating circuits. A transistor stack is coupled between a voltage supply to provide a gated supply voltage. The supply voltage is greater than the maximum...
Combline-cavity duplexer, duplexing apparatus, and antenna system for
frequency division duplexing operation
The present disclosure relates to microwave cavity filters used in cellular communication systems. More specifically, in one aspect, the present disclosure...
Selective germanium P-contact metalization through trench
Techniques are disclosed for forming transistor devices having reduced parasitic contact resistance relative to conventional devices. The techniques can be...
Method for making high density substrate interconnect using inkjet
Generally discussed herein are systems and apparatuses that include a dense interconnect bridge and techniques for making the same. According to an example a...
Integrated WLUF and SOD process
This disclosure relates generally to a wafer having a plurality of semiconductor chips having a major surface, a metal contact positioned on one of the...
Interconnect wires including relatively low resistivity cores
A dielectric layer and a method of forming thereof. An opening defined in a dielectric layer and a wire deposited within the opening, wherein the wire includes...
Security cable for a mobile platform with electronically controlled lock
Generally, this disclosure provides devices, systems and methods for securing a mobile platform with a security cable, employing an electronically controlled...
Symmetric keying and chain of trust
The present disclosure is directed to sealing data using chain of trust key derivation. In at least one embodiment, a chain of trust may be used to derive...
Range based user identification and profile determination
An embodiment includes a main compute node that detects the physical presence of a first user and subsequently loads a profile for the first user. The main...
Adaptive data striping and replication across multiple storage clouds for
high availability and performance
Technologies for adaptively striping data across multiple storage clouds include receiving user constraints corresponding one or more cloud storage providers,...
Device disconnect detection
Systems and methods for operating a universal serial bus are described herein. The method includes sending packet data from a USB2 device to a USB2 host on a...
Accessing private data about the state of a data processing machine from
storage that is publicly accessible
According to an embodiment of the invention, a method for operating a data processing machine is described in which data about a state of the machine is written...
Balanced P-LRU tree for a "multiple of 3" number of ways cache
In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for implementing a balanced P-LRU...
Technologies for efficient synchronization barriers with work stealing
Technologies for multithreaded synchronization and work stealing include a computing device executing two or more threads in a thread team. A thread executes...
Coalescing adjacent gather/scatter operations
According to one embodiment, a processor includes an instruction decoder to decode a first instruction to gather data elements from memory, the first...
Core switching acceleration in asymmetric multiprocessor system
An asymmetric multiprocessor system (ASMP) may comprise computational cores implementing different instruction set architectures and having different power...