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Patent # Description
US-9,830,284 Memory mapping in a processor having multiple programmable units
The disclosure includes, in general, among other aspects, an apparatus having multiple programmable units integrated within a processor. The apparatus has...
US-9,830,272 Cache memory staged reopen
An apparatus is described. The apparatus includes a cache memory having two or more memory blocks and a central processing unit (CPU), coupled to the cache...
US-9,830,223 Methods for repairing a corrupted database to a new, correct state
A corrupted database is returned to a correct state by rolling forward or backward through a change queue and applying changes to the database in a selective...
US-9,830,196 Methods and apparatus to manage concurrent predicate expressions
Methods, apparatus, systems and articles of manufacture are disclosed to manage concurrent predicate expressions. An example method discloses inserting a first...
US-9,830,189 Multi-threaded queuing system for pattern matching
A multi-threaded processor may support efficient pattern matching techniques. An input data buffer may be provided, which may be shared between a fast path and...
US-9,830,178 Dynamic reassignment for multi-operating system devices
The present application is directed to dynamic reassignment for multi-OS devices. An example device may comprise equipment, at least two operating systems, a...
US-9,830,162 Technologies for indirect branch target security
Technologies for indirect branch target security include a computing device having a processor to execute an indirect branch instruction. The processor may...
US-9,830,154 Method, apparatus and system for data stream processing with a programmable accelerator
Techniques and mechanisms for programming an accelerator device to enable performance of a data processing algorithm. In an embodiment, an accelerator of a...
US-9,830,151 Method and apparatus for vector index load and store
An apparatus and method for performing vector index loads and stores. For example, one embodiment of a processor comprises: a vector index register to store a...
US-9,830,093 Method and apparatus for improving immunity to defects in a non-volatile memory
Methods and apparatus related to a rotated planar XOR scheme for Varied-Sector-Size (VSS) enablement in flat indirection systems are described. In one...
US-9,830,068 Dual configuration computer
In general, in one aspect, a laptop computer that maintains at least a subset of its operational capability (e.g., some display visibility, some user interface...
US-9,829,965 Distribution of tasks among asymmetric processing elements
Techniques are disclosed to control power and processing among a plurality of asymmetric cores. In one embodiment, a multi-core processor includes first and...
US-9,829,963 Framework for runtime power monitoring and management
Systems and methods of managing power in a computing platform may involve monitoring a runtime power consumption of two or more of a plurality of hardware...
US-9,829,957 Performance scalability prediction
A processing device implementing performance scalability prediction is disclosed. A processing device of the disclosure includes a first counter to increment...
US-9,829,951 Enhanced system sleep state support in servers using non-volatile random access memory
A non-volatile random access memory (NVRAM) is used in a computer system to enhance support to sleep states. The computer system includes a processor, a...
US-9,829,949 Adaptive interrupt coalescing for energy efficient mobile platforms
Methods and apparatus relating to adaptive interrupt coalescing for energy efficient mobile platforms are discussed herein. In one embodiment, one or more...
US-9,829,915 Modular printed circuit board
Described are apparatuses for modular printed circuit boards (PCB) and methods for producing modular PCBs. An apparatus may include a first PCB module with a...
US-9,829,902 Systems and methods for dynamic temporal power steering
Apparatus, systems, and methods provide dynamic power steering that includes determining a sequence of phases of an application in a node. The sequence...
US-9,829,335 Virtual breadcrumbs for indoor location wayfinding
Technologies for directional wayfinding include a mobile computing device having one or more local location sensors to generate data indicative of movement of...
US-9,827,756 Separation apparatus, separation system, and separation method
A separation apparatus for separating a superposed substrate in which a processing target substrate and a supporting substrate are joined together with an...
US-9,826,907 Wearable electronic device for determining user health status
Particular embodiments described herein provide for a wearable electronic device, such as a bracelet, coupled to a plurality of electronic components (which may...
US-9,826,656 Moveable server rack
The present disclosure describes embodiments of apparatuses and methods related to a moveable server rack in a data center. The server rack may include a...
US-9,826,572 Wireless enhanced projector
Described herein are techniques related to a wireless enhanced projector (WEP) that is utilized by one or more devices, such as a mobile phone, a cellular...
US-9,826,513 Uplink requests for communication resources
Uplink requests for bandwidth and/or other types of communication resources are provided. In some embodiments, a communication device can access a mapping...
US-9,826,397 System and method for transferring wireless network access passwords
The present disclosure provides an access node for transferring and/or assigning network passwords. The access node includes a first interface for sending and...
US-9,825,387 Linear edge connector with a cable retention mechanism having a body with a groove with an indentation to...
Embodiments of the present disclosure are directed to a linear edge connector assembly and corresponding bolster plate features for receiving and securing a...
US-9,825,130 Leakage reduction structures for nanowire transistors
A nanowire device of the present description may include a highly doped underlayer formed between at least one nanowire transistor and the microelectronic...
US-9,825,095 Hybrid phase field effect transistor
An insulating layer is deposited over a transistor structure. The transistor structure comprises a gate electrode over a device layer on a substrate. The...
US-9,824,991 Organic thin film passivation of metal interconnections
Electronic assemblies and their manufacture are described. One embodiment relates to a method including depositing an organic thin film layer on metal bumps on...
US-9,824,962 Local dense patch for board assembly utilizing laser structuring metallization process
Methods of forming microelectronic package structures are described. Those methods/structures may include forming a high density region on a board comprising a...
US-9,824,901 Complex cavity formation in molded packaging structures
Molded electronics package cavities are formed by placing a sacrificial material in the mold and then decomposing, washing, or etching away this sacrificial...
US-9,824,767 Methods and apparatus to reduce threshold voltage drift
A disclosed example to reduce a threshold voltage drift of a selector device of a memory cell includes providing an applied voltage to the selector device of...
US-9,824,754 Techniques for determining victim row addresses in a volatile memory
Examples are disclosed for determining a logical address of one or more victim rows of a volatile memory based on a logical address of an aggressor row and...
US-9,824,743 Memory refresh operation with page open
Embodiments are generally directed to memory refresh operation with page open. An embodiment of a memory device includes a memory array including a plurality of...
US-9,824,737 Memory circuit and method for operating a first and a second set of memory cells in direct memory access mode...
A memory circuit (100), comprises a first set of memory cells (102a; 202a) configured to operate in a direct access mode or in a refresh mode and a second set...
US-9,824,642 Rendering techniques for textured displays
Rendering techniques are disclosed for displays capable of adjusting/changing the angle of individual pixels (or pixel groups), referred to herein as textured...
US-9,824,571 Alerting on proximity of items
An apparatus alerts on a distance between items. The apparatus includes a radio for communicating with an internet of things (IoT) tag on an item. A locator...
US-9,824,502 Sketch selection for rendering 3D model avatar
Examples of systems and methods for three-dimensional model customization for avatar animation using a sketch image selection are generally described herein. A...
US-9,824,461 Projector distortion compensation in structured light depth reconstruction
A method and apparatus for projector distortion compensation in structured light depth reconstruction are described. In one embodiment, the apparatus comprises...
US-9,824,421 Content-aware image resizing using superpixels
Illustrative embodiments of methods, machine-readable media, and computing devices that provide content-aware image resizing using superpixels are disclosed. In...
US-9,824,414 Thread dispatching for graphics processors
Techniques to dispatch threads of a graphics kernel for execution to increase the interval between dependent threads and the associated are disclosed. The...
US-9,824,413 Sort-free threading model for a multi-threaded graphics pipeline
Methods and apparatus relating to sort-free threading model for a multi-threaded graphics pipeline are described. In an embodiment, draw requests, corresponding...
US-9,824,412 Position-only shading pipeline
In position-only shading, two geometry pipes exist, a trimmed down version called the Cull Pipe and a full version called the Replay Pipe. Thus, the Cull Pipe...
US-9,824,226 Anti-theft in firmware
Methods, systems and storage media are disclosed for enhanced system boot processing that authenticates boot code based on biometric information of the user...
US-9,824,063 Method, apparatus and instructions for parallel data conversions
Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding...
US-9,824,062 Method, apparatus and instructions for parallel data conversions
Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding...
US-9,824,061 Method, apparatus and instructions for parallel data conversions
Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding...
US-9,824,047 Discovery mechanisms for universal serial bus (USB) protocol adaptation layer
A WiFi serial bus (WSB) attribute for use in Wi-Fi Alliance defined point-to-point (P2P) discovery mechanism includes a plurality of fields disposed in the...
US-9,824,038 Memory mapping in a processor having multiple programmable units
The disclosure includes, in general, among other aspects, an apparatus having multiple programmable units integrated within a processor. The apparatus has...
US-9,824,037 Memory mapping in a processor having multiple programmable units
The disclosure includes, in general, among other aspects, an apparatus having multiple programmable units integrated within a processor. The apparatus has...
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