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Location-based application recommendation
Described herein are techniques related to location-aware application recommendations in wireless devices. For example, an application recommendation alert may...
Configurable performance motion estimation for video encoding
A motion estimation engine may be implemented to include a skip checking module, an integer search module, a macroblock partitioning module, a fractional search...
Network device selection
An embodiment may include circuitry that may be capable of selecting, from network devices, at least one network device to which at least one packet is to be...
Apparatus, system, and method for providing attribute identity control
associated with a processor
Described herein are an apparatus, system, and method for attribute identity control in a processor. The apparatus comprises a logic unit including a...
Hybrid automatic repeat-request combination for wireless transmissions
In one embodiment, a method for data communication may include receiving a first set of soft bit values in a Hybrid Automatic Repeat-Request (HARQ) buffer using...
Transmission arrangement and method for analyzing an amplified
A transmission arrangement is disclosed having an amplifier which is set up to amplify a transmission signal and to provide it as an amplified transmission...
HARQ timing design for a TDD system
Disclosed are methods and apparatuses related to receiving one or more indications of time division duplex (TDD) uplink/downlink (UL/DL) configurations for two...
Feedback calibration of digital to time converter
This document discusses apparatus and methods for compensating non-linearity of digital-to-time converters (DTCs). In an example, a wireless device can include...
Multi-phase signal generator and multi-phase signal generating method
A multi-phase signal generator and a multi-phase signal generating method thereof. The multi-phase signal generator includes a signal generator, a first...
Chip package incorporating interfacial adhesion through conductor
This disclosure relates generally to an electronic device and method having can include a method of making a chip package. An insulator layer comprising an...
Multi-component integrated heat spreader for multi-chip packages
A multi-component heat spreader comprising a top component having a first surface and an opposing second surface with either a cavity extending therein from the...
Methods of promoting adhesion between underfill and conductive bumps and
structures formed thereby
Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include...
Conformal low temperature hermetic dielectric diffusion barriers
Conformal hermetic dielectric films suitable as dielectric diffusion barriers over 3D topography. In embodiments, the dielectric diffusion barrier includes a...
Method of manufacturing inductors for integrated circuit packages
A process of making inductors for integrated circuit packages may involve forming an inductor upon a magnetic film on a package substrate. Conductors coupled...
Dynamic window to improve NAND endurance
Methods and apparatus to provide dynamic window to improve NAND (Not And) memory endurance are described. In one embodiment, a program-erase window associated...
Non-volatile latch using spin-transfer torque memory device
Described is an apparatus of a non-volatile logic (NVL), the apparatus comprises: a sensing circuit to sense differential resistance; a first ...
Method and apparatus for dynamically adjusting voltage reference to
optimize an I/O system
Described herein is an apparatus for dynamically adjusting a voltage reference level for optimizing an I/O system to achieve a certain performance metric. The...
Techniques for adding interactive features to videos
Techniques are disclosed for adding interactive features to videos to enable users to create new media using a dynamic blend of motion and still imagery. The...
Avatar facial expression techniques
A method and apparatus for capturing and representing 3D wireframe, color and shading of facial expressions are provided, wherein the method includes the...
Augmented reality creation using a real scene
The creation of augmented reality is described using a real scene. In one example, a process includes observing a real scene through a camera of a device,...
Method and system for modeling subjects from a depth map
A method for modeling and tracking a subject using image depth data includes locating the subject's trunk in the image depth data and creating a...
Data distribution fabric in scalable GPUs
In on embodiment, a hybrid fabric interconnects multiple graphics processor cores within a processor. The hybrid fabric interconnect includes multiple data...
Content management with hierarchical content rules
Computing apparatus, computer-readable storage medium, and method associated with application of content rules to content. The computing apparatus may have a...
Providing notifications of messages for consumption
Embodiments of apparatus, packages, computer-implemented methods, systems, devices, and computer-readable media (transitory and non-transitory) are described...
Method and article of manufacture for ensuring fair access to information
using propagation delays to determine...
Locks placed on corresponding objects held in a plurality of databases located at different nodes in a network during replication are released in accordance...
Controlled access to functionality of a wireless device
Various embodiments of the invention may be used to verify that a person being authorized by biometric techniques to use a device is a living person and not...
Grouping and compressing similar photos
Systems and methods may provide for assigning a subset of a plurality of photos to a group and selecting a reference photo from the group. Additionally, the...
Crosstalk aware encoding for a data bus
Techniques for encoding data are described herein. An example of a device in accordance with the present techniques includes a signaling module coupled to a...
Instruction and logic for a binary translation mechanism for control-flow
A processor includes a front end, an execution pipeline, and a binary translator. The front end includes logic to receive an instruction and to dispatch the...
Register access white listing
A system employs a white list of authorized transactions to control access to system registers. In an embodiment, the white list is loaded into filter registers...
Power logic for memory address conversion
In an embodiment, a processor includes a plurality of cores. Each core includes conversion power logic to receive an instruction including an untranslated...
Synchronizing a translation lookaside buffer with an extended paging table
A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest...
System, apparatus, and method for transparent page level instruction
Detailed herein are systems, apparatuses, and methods for transparent page level instruction translation. Exemplary embodiments include an instruction...
Technologies for determining binary loop trip count using dynamic binary
Technologies for binary loop trip count computation include a computing device that dynamically instruments binary code, executes the instrumented code, and...
Redundant execution for reliability in a super FMA ALU
A system, processor and method to increase computational reliability by using underutilized portions of a data path with a SuperFMA ALU. The method allows the...
Resilient register file circuit for dynamic variation tolerance and method
of operating the same
The disclosed system and method detect and correct register file read path errors that may occur as a result of reducing or eliminating supply voltage...
Hetergeneous processor apparatus and method
A heterogeneous processor architecture is described. For example, a processor according to one embodiment of the invention comprises: a first set of one or more...
Managing generated trace data for a virtual machine
A processing device with tracing functionality for a virtual machine is described. The processing device includes a tracing register to store a value indicative...
Context control and parameter passing within microcode based instruction
A processor includes a microcode storage to store a first microcode subroutine and a microcode caller of the first microcode subroutine. The processor further...
SIMD sign operation
Method, apparatus, and program means for nonlinear filtering and deblocking applications utilizing SIMD sign and absolute value operations. The method of one...
Mechanism for facilitating dynamic and efficient fusion of computing
instructions in software programs
A mechanism is described for facilitating dynamic and efficient fusion of computing instructions according to one embodiment. A method of embodiments, as...
Intelligent parametric scratchap memory architecture
An electronic apparatus may be provided that includes a processor to perform operations, and a memory subsystem including a plurality of parallel memory banks...
Eye tracking with detection of adequacy of lighting
Apparatuses, methods and storage media for track an eye of a user are described. In one instance, an apparatus may include an image capturing device to generate...
Apparatus and method for selectively disabling one or more analog circuits
of a processor during a low power...
A disable module may be coupled to an analog circuit of an electronic circuit. The disable module may detect an input voltage that is supplied to the analog...
Block-level sleep logic
In one embodiment, a processor includes at least one sleep block and a central sleep controller. The at least one sleep block may include at least one execution...
Apparatus, method, and system for predicitve power delivery noise
An apparatus and method is described herein for reducing noise in a power distribution network for an interface. The power distribution network is ...
Power management for data ports
According to some embodiments, a communication interface 110 may include a biasing circuit 140 and a logic unit 130. The biasing circuit 140 may be configured...
Techniques for computing device cooling using a self-pumping fluid
Techniques for computing device cooling using a self-pumping cooling fluid are described. For example, an apparatus may comprise one or more heat-generating...
Universal serial bus hybrid footprint design
A universal serial bus hybrid footprint design is described herein. The design includes an outer row of one or more surface mount technology (SMT) contacts and...
User equipment and method for reducing delay in a radio access network
Embodiments of user equipment and methods for reducing delay in a radio-access network (RAN) are generally described herein. Embodiments disclosed herein...