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| Patent # | Description |
|---|---|
| US-9,418,471 |
Compact depth plane representation for sort last architectures In accordance with some embodiments, a full per sample coverage mask may be used for a subset of the pixels in the tile, thereby enabling pixels that belong to... |
| US-9,418,438 |
Networked capture and 3D display of localized, segmented images Systems, devices and methods are described including receiving a source image having a foreground portion and a background portion, where the background portion... |
| US-9,418,390 |
Determining and communicating user's emotional state related to user's
physiological and non-physiological data According to various aspects of the present disclosure, a system and associated method and functions to determine an emotional state of a user are disclosed. In... |
| US-9,418,352 |
Image-augmented inventory management and wayfinding Systems and methods may provide for receiving a query regarding an establishment, retrieving an output image from an image database in response to the query,... |
| US-9,418,035 |
High performance interconnect physical layer Re-initialization of a link can take place without termination of the link, where the link includes, a transmitter and a receiver are to be coupled to each lane... |
| US-9,418,030 |
Inter-component communication including posted and non-posted transactions Component apparatuses with inter-component communication capabilities, and system having such component apparatuses are disclosed herein. In embodiments, such a... |
| US-9,418,024 |
Apparatus and method for efficient handling of critical chunks An apparatus and method for efficient handling of critical chunks. For example, one embodiment of an apparatus comprises a plurality of agents to perform a... |
| US-9,418,016 |
Method and apparatus for optimizing the usage of cache memories A method and apparatus to reduce unnecessary write backs of cached data to a main memory and to optimize the usage of a cache memory tag directory. In one... |
| US-9,418,013 |
Selective prefetching for a sectored cache A memory subsystem includes memory hierarchy that performs selective prefetching based on prefetch hints. A lower level memory detects a cache miss for a... |
| US-9,418,011 |
Region based technique for accurately predicting memory accesses In one embodiment, the present invention includes a processor comprising a page tracker buffer (PTB), the PTB including a plurality of entries to store an... |
| US-9,418,009 |
Inclusive and non-inclusive tracking of local cache lines to avoid near
memory reads on cache line memory... A processor may include a memory controller to interface with a system memory having a near memory and a far memory. The processor may include logic circuitry... |
| US-9,418,000 |
Dynamically compensating for degradation of a non-volatile memory device Apparatus, systems, and methods to implement dynamic memory management in nonvolatile memory devices are described. In one example, a controller comprises logic... |
| US-9,417,880 |
Instruction for performing an overload check A processor is described having a functional unit within an instruction execution pipeline. The functional unit having circuitry to determine whether... |
| US-9,417,879 |
Systems and methods for managing reconfigurable processor cores Systems and methods for managing reconfigurable processor cores. An example processing system comprises a plurality of processor cores; a control register... |
| US-9,417,873 |
Apparatus and method for a hybrid latency-throughput processor An apparatus and method are described for executing both latency-optimized execution logic and throughput-optimized execution logic on a processing device. For... |
| US-9,417,855 |
Instruction and logic to perform dynamic binary translation A micro-architecture may provide a hardware and software co-designed dynamic binary translation. The micro-architecture may invoke a method to perform a dynamic... |
| US-9,417,847 |
Low depth combinational finite field multiplier A method for generating a design of a multiplier is disclosed. The method generally includes steps (A) to (C). Step (A) may generate a first circuit comprising... |
| US-9,417,821 |
Presentation of direct accessed storage under a logical drive model In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for presentation of direct... |
| US-9,417,801 |
Virtual general-purpose I/O controller Technologies for virtual general purpose I/O (GPIO) include a computing device having a virtual GPIO controller driver, a virtual GPIO controller firmware... |
| US-9,417,726 |
Supporting keyboard and mouse over embedded displayport without using a
universal serial bus A human interface sink device may be selectively enabled with at least one of an embedded keyboard, embedded mouse, touch-based keyboard, a touch-based mouse... |
| US-9,417,684 |
Mechanism for facilitating power and performance management of
non-volatile memory in computing devices A mechanism is described for facilitating power governance of non-volatile memory devices using a power governing mechanism employed at a computing device... |
| US-9,417,681 |
Mechanism to provide workload and configuration-aware deterministic
performance for microprocessors One embodiment of an apparatus includes a semiconductor chip having a processor and an on-die non-volatile storage resource. The on-die non-volatile storage may... |
| US-9,417,676 |
Individual core voltage margining Example embodiments of core voltage margining apparatus include a plurality of voltage offset blocks disposed on a multi-core processor with each voltage offset... |
| US-9,417,654 |
Method and apparatus for hardware-assisted secure real time clock
management Embodiments of a system and method for secure clock management in a mobile device, or user equipment, are generally described herein. A timer offset may be... |
| US-9,417,450 |
Projection apparatus using telecentric optics The present invention provides a projection system (10), preferably for a head-up display e.g. on board a vehicle, comprising a laser source (1), a diffuser (3)... |
| US-9,414,484 |
Thermal expansion compensators for controlling microelectronic package
warpage The present description relates to the field of fabricating microelectronic packages, wherein a microelectronic device may be attached to a microelectronic... |
| US-9,414,408 |
Multi-radio controller and methods for preventing interference between
co-located transceivers Embodiments of a multi-radio controller and methods for preventing interference between co-located transceivers are generally described herein. In some... |
| US-9,414,392 |
Apparatus, system and method of user-equipment (UE) centric access network
selection Some demonstrative embodiments include devices, systems of User Equipment (UE) centric access network selection. For example, a cellular node may include a... |
| US-9,414,380 |
Millimeter-wave communication station and method for multiple-access
beamforming in a millimeter-wave... Embodiments of a millimeter-wave communication station and method for multiple-access beamforming in a millimeter-wave network are generally described herein.... |
| US-9,414,360 |
Multi-mode device (MMD) middleware for cloud spectrum services spectrum
allocation A platform to facilitate transferring spectrum rights is provided that includes a database to ascertain information regarding available spectrum for use in... |
| US-9,414,309 |
Mobile terminal A mobile terminal is provided comprising a component to be supplied with power having a power input terminal, a radio receiver configured to receive... |
| US-9,414,306 |
Device-to-device (D2D) preamble design This application discusses, among other things, methods and apparatus for providing more efficient ways to enable D2D discovery and D2D communication... |
| US-9,414,304 |
Method and related mobile device for cell searching with low memory
requirement The present solution relates to a method for searching for a cell in a cellular mobile communication system having low memory requirement. The method comprises:... |
| US-9,414,125 |
Remote control device An apparatus may include a housing that has a substantially equiaxed shape. The apparatus may include a motion sensor that detects a rotational state of the... |
| US-9,413,765 |
Multinode hubs for trusted computing Embodiments of multinode hubs for trust operations are disclosed herein. In some embodiments, a multinode hub may include a plurality of memory regions, a... |
| US-9,413,583 |
Calibrating RF path delay and IQ phase imbalance for polar transmit system A method of calibrating parameters for a polar transmitter (Polar TX) system includes receiving phase information derived from transmission information in a... |
| US-9,413,446 |
Method, apparatus and communication unit A method, an apparatus and a communication unit for generating precoding feedback information in a multiple frequency radio transmission system are disclosed. A... |
| US-9,413,434 |
Cancellation of interfering audio on a mobile device Generally, this disclosure provides devices, systems and methods for cancelling an interfering audio signal. The system may include a mobile device including a... |
| US-9,413,402 |
Dynamic low IF injection side selection A low IF receiver for operation at an intermediate frequency (IF), comprises an antenna port configured to receive a receive signal comprising a wanted RF... |
| US-9,413,365 |
Oscillator with controllable frequency Apparatuses are disclosed which comprise a coarse tuning circuitry, a fine tuning circuitry and at least one switchable capacitance. |
| US-9,413,364 |
Apparatus and method for clock synchronization for inter-die synchronized
data transfer Described is an apparatus for clock synchronization. The apparatus comprises a pair of interconnects; a first die including a first phase interpolator having an... |
| US-9,413,326 |
Second-order filter with notch for use in receivers to effectively
suppress the transmitter blockers The disclosed invention relates to a transceiver system comprising a notch filter element configured to suppress transmitter blockers (i.e., transmitter... |
| US-9,413,299 |
Systems and methods utilizing adaptive envelope tracking A communication system utilizing adaptive envelope tracking includes a transmit path, a feedback receiver, a parameter component and an envelope tracking... |
| US-9,413,097 |
High density cabled midplanes and backplanes A cabled midplane includes a first support plate along a plane between a first connector set and a second connector set that connect to line cards on either... |
| US-9,413,079 |
Single-package phased array module with interleaved sub-arrays Embodiments of the present disclosure are directed to a single-package communications device that includes an antenna module with a plurality of independently... |
| US-9,412,872 |
N-type and P-type tunneling field effect transistors (TFETs) Tunneling field effect transistors (TFETs) for CMOS architectures and approaches to fabricating N-type and P-type TFETs are described. For example, a tunneling... |
| US-9,412,860 |
Multi-layer gate dielectric A transistor gate dielectric including a first dielectric material having a first dielectric constant and a second dielectric material having a second... |
| US-9,412,821 |
Stacked thin channels for boost and leakage improvement A hollow-channel memory device comprises a source layer, a first hollow-channel pillar structure formed on the source layer, and a second hollow-channel pillar... |
| US-9,412,702 |
Laser die backside film removal for integrated circuit (IC) packaging Embodiments of the present disclosure are directed to die adhesive films for integrated circuit (IC) packaging, as well as methods for forming and removing die... |
| US-9,412,625 |
Molded insulator in package assembly Embodiments of the present disclosure describe techniques and configurations for package assembly including an embedded element and a molded insulator material.... |
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