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| Patent # | Description |
|---|---|
| US-9,564,616 |
Shielding layer of battery cell structure A battery cell structure may include a battery cell, a first pouch layer to substantially surround the battery cell, a second pouch layer to substantially... |
| US-9,564,522 |
Nanowire structures having non-discrete source and drain regions Nanowire structures having non-discrete source and drain regions are described. For example, a semiconductor device includes a plurality of vertically stacked... |
| US-9,564,490 |
Apparatus and methods for forming a modulation doped non-planar transistor Embodiments of an apparatus and methods for providing three-dimensional complementary metal oxide semiconductor devices comprising modulation doped transistors... |
| US-9,564,430 |
Macro-transistor devices Macro-transistor structures are disclosed. In some cases, the macro-transistor structures have the same number of terminals and properties similar to... |
| US-9,564,412 |
Shaped and oriented solder joints The present description relates to the field of fabricating microelectronic assemblies, wherein a microelectronic device may be attached to a microelectronic... |
| US-9,564,408 |
Space transformer An apparatus including a planar semiconductor substrate including a plurality of devices and a first pattern of electrical contacts formed on the first surface... |
| US-9,564,407 |
Crosstalk polarity reversal and cancellation through substrate material Transmission lines with a first dielectric material separating signal traces and a second dielectric material separating the signal traces from a ground plane.... |
| US-9,564,400 |
Methods of forming stacked microelectronic dice embedded in a
microelectronic substrate Embodiments of the present description include stacked microelectronic dice embedded in a microelectronic substrate and methods of fabricating the same. In one... |
| US-9,564,381 |
Apparatus and method to monitor die edge defects Described is an apparatus comprising: an input pad; an output pad; a wire, coupled to the input pad and the output pad, the wire positioned at a periphery of a... |
| US-9,564,245 |
Integrated circuit defect detection and repair In accordance with the present description, a device includes an internal defect detection and repair circuit which includes a self-test logic circuit built in... |
| US-9,564,201 |
Method, apparatus and system for responding to a row hammer event Techniques and mechanisms to facilitate an operational mode of a memory device to prepare for a targeted refresh of a row in memory. In an embodiment, the... |
| US-9,564,117 |
Limiting peak audio power in mobile devices Systems and methods of limiting peak audio power in mobile devices may include a high pass filter and a burst module to detect a burst load condition in a... |
| US-9,563,956 |
Efficient free-space finger recognition Systems and techniques for efficient free-space finger recognition are herein described. A surface in a depth image may be identified. One or more blobs in the... |
| US-9,563,932 |
Techniques to request stored data from memory Techniques are described to generate an index for a texture. The index can be used to retrieve a portion of one or more textures from a cache. The index can be... |
| US-9,563,930 |
Techniques for clearing a shared surface Various embodiments are generally directed to an apparatus, method and other techniques to determine that a shared surface is shared between a first application... |
| US-9,563,855 |
Using a generic classifier to train a personalized classifier for wearable
devices Systems and methods may provide for using one or more generic classifiers to generate self-training data based on a first plurality of events associated with a... |
| US-9,563,821 |
Method, apparatus and computer readable recording medium for detecting a
location of a face feature point using... The present disclosure relates to detecting the location of a face feature point using an Adaboost learning algorithm. According to some embodiments, a method... |
| US-9,563,775 |
Security co-processor boot performance Technologies for improving platform initialization on a computing device include beginning initialization of a platform of the computing device using a basic... |
| US-9,563,768 |
Methods and apparatus to manage password security Methods, apparatus, systems and articles of manufacture are disclosed to manage password security. An example apparatus includes an alarm action engine to... |
| US-9,563,643 |
Automatic metatagging in images Various systems and methods for implementing automatic image metatagging are described herein. A system for metatagging media content comprises a camera system;... |
| US-9,563,579 |
Method, apparatus, system for representing, specifying and using deadlines In an embodiment, a shared memory fabric is configured to receive memory requests from multiple agents, where at least some of the requests have an associated... |
| US-9,563,570 |
System and methods exchanging data between processors through concurrent
shared memory A method and apparatus for matching parent processor address translations to media processors' address translations and providing concurrent memory access to a... |
| US-9,563,564 |
Cache allocation with code and data prioritization Systems and methods for cache allocation with code and data prioritization. An example system may comprise: a cache; a processing core, operatively coupled to... |
| US-9,563,561 |
Initiation of cache flushes and invalidations on graphics processors Methods and systems may provide for receiving, at a graphics processor, a workload from a host processor and using a kernel on the graphics processor to issue a... |
| US-9,563,557 |
Instruction and logic for flush-on-fail operation A processor includes a memory management unit and a front end including a decoder. The decoder includes logic to receive a flush-on-commit (FoC) instruction to... |
| US-9,563,477 |
Performing concurrent rehashing of a hash table for multithreaded
applications In one embodiment, the present invention includes a method for allocating a second number of buckets for a hash table shared concurrently by a plurality of... |
| US-9,563,466 |
Method and apparatus for supporting programmable software context state
execution during hardware context... A method and apparatus for supporting programmable software context state execution during hardware context restore flow is described. In one example, a context... |
| US-9,563,455 |
Virtualization exceptions Embodiments of an invention for virtualization exceptions are disclosed. In one embodiment, a processor includes instruction hardware, control logic, and... |
| US-9,563,437 |
Technologies for pre-memory phase initialization of a computing device Technologies for pre-memory phase initialization include a computing device having a processor with a cache memory. The computing device may determine whether a... |
| US-9,563,431 |
Techniques for cooperative execution between asymmetric processor cores Various embodiments are generally directed to techniques for cooperation between a higher function core and a lower power core to minimize the effects of... |
| US-9,563,429 |
Coalescing adjacent gather/scatter operations According to one embodiment, a processor includes an instruction decoder to decode a first instruction to gather data elements from memory, the first... |
| US-9,563,425 |
Instruction and logic to provide pushing buffer copy and store
functionality Instructions and logic provide pushing buffer copy and store functionality. Some embodiments include a first hardware thread or processing core, and a second... |
| US-9,563,263 |
Graphics processor sub-domain voltage regulation Voltage regulation of processor sub-domains supplied by a same voltage domain power supply rail. Voltage to certain logic units within the voltage domain may be... |
| US-9,563,260 |
Systems, apparatuses, and methods for synchronizing port entry into a low
power state Systems, apparatuses, and method for synchronizing port entry into a lowest power state are described. All logic of a port placed into an intermediate state... |
| US-9,563,256 |
Processor hiding its power-up latency with activation of a root port and
quickly sending a downstream cycle Particular embodiments described herein can offer a method that includes powering down a root port; initiating a first downstream cycle by a central processing... |
| US-9,563,254 |
System, method and apparatus for energy efficiency and energy conservation
by configuring power management... According to one embodiment of the invention, an integrated circuit device at least one compute engine and a control unit. Coupled to the compute engine(s), the... |
| US-9,563,253 |
Techniques for power saving on graphics-related workloads Various embodiments are generally directed to an apparatus, method and other techniques for monitoring a task of a graphics processing unit (GPU) by a graphics... |
| US-9,563,251 |
Representing a cache line bit pattern via meta signaling A cache controller with a pattern recognition mechanism can identify patterns in cache lines. Instead of transmitting the entire data of the cache line to a... |
| US-9,563,236 |
Adjustable tension wrap end hinge Embodiments are generally directed an adjustable tension wrap end hinge. A hinge assembly includes a first wrap end component and a second wrap end component; a... |
| US-9,560,760 |
Reduction of resonance in connectors Techniques for reducing resonance in contact fingers of a connector are described herein. An example of a device in accordance with the present techniques... |
| US-9,560,690 |
Interrupted handoff reconnection for licensed shared access A proposed 3GPP LTE protocol enhancement disclosed herein realizes the full benefit of proposed dynamic frequency sharing systems by enhancing current handoff... |
| US-9,560,684 |
Mitigation of traffic congestion in dual connectivity systems Technology for mitigating traffic congestion is disclosed. A master evolved node B (MeNB) can identify service data unit (SDU) packets that are dropped in a... |
| US-9,560,590 |
Discontinuous reception (DRX) controller and method for DRX operation Embodiments of a context-retention controller and method for retaining context in a wireless access network are generally described herein. In some embodiments,... |
| US-9,560,574 |
User equipment and method for transmit power control for D2D tranmissions Embodiments of user equipment (UE) and methods for transmit power control for device-to-device (D2D) discovery operations and D2D communication in a cellular... |
| US-9,560,571 |
Method for performing mobile communications and mobile radio communication
terminal device A method for performing mobile communications may include receiving a first multimedia broadcast or multicast stream from a serving cell; determining whether or... |
| US-9,560,560 |
User equipment and methods for handover using measurement reporting based
on multiple events Embodiments of a User Equipment (UE) to support inter-frequency handover are disclosed herein. The UE may receive, from an Evolved Node-B (eNB), a measurement... |
| US-9,560,558 |
Reduced handover latency for licensed shared access A proposed 3GPP LTE protocol enhancement disclosed herein enables an Evolved Node B (eNB) to perform a mass handoff of User Equipment from Licensed Shared... |
| US-9,560,522 |
Tap-to-wake and tap-to-login near field communication (NFC) device Described herein are techniques related to a tap-to-wake and tap-to-login system. This Abstract is submitted with the understanding that it will not be used to... |
| US-9,560,512 |
Reporting of user plane congestion (UPCON) using a UPCON container Technology for reporting radio access network (RAN) user plane congestion (UPCON) is disclosed. In an example, a core network (CN) device can include computer... |
| US-9,560,487 |
Method and apparatus for wireless location tracking A method and apparatus for wireless location tracking by a wireless device. In one embodiment of the invention, the wireless device has logic to determine the... |
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