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Systems and methods for account recovery using a platform attestation
Described herein is technology for restoring access to a user account. In particular, systems and methods for account recovery using a platform attestation...
Technologies for managing security threats to a computing system utilizing
Technologies for managing security threats on a computing system include detecting a security threat to the computing system, determining a plurality of...
Barcode authentication for resource requests
Mobile device, client device and server associated with client-server authentication are described. In embodiments, the mobile device may comprise a camera and...
Vector move instruction controlled by read and write masks
A processor executes a vector move instruction to move data elements from a second vector register to a first vector register under the control of a first mask...
Scalable computing array
A method and apparatus for providing a scalable computing array are provided herein. The method includes determining a width of a processor based on a software...
Apparatus and method to maximize buffer utilization in an I/O controller
An apparatus and method for maximizing buffer utilization in an I/O controller using credit management logic contained within the I/O controller. The credit...
Identifying devices in a topology of devices for audio/video streaming
Resources may be managed in a topology for audio/video streaming. The topology includes audio/video sources and sinks and intervening branch devices. Messages...
High performance interconnect physical layer
A serial data link is to be adapted during initialization of the link. Adaptation of the link is to include receiving a pseudorandom binary sequence (PRBS) from...
Interrupt return instruction with embedded interrupt service functionality
An instruction pipeline implemented on a semiconductor chip is described. The semiconductor chip includes an execution unit having the following to execute an...
Method to accelerate message signaled interrupt processing
Methods to accelerate a message signaled interrupt (MSI) are described herein. An embodiment of the invention includes an interrupt controller to receive a...
Adaptive hierarchical cache policy in a microprocessor
A method for determining an inclusion policy includes determining a ratio of a capacity of a large cache to a capacity of a core cache in a cache subsystem of a...
Apparatus and method for implementing a multi-level memory hierarchy
having different operating modes
A system and method are described for integrating a memory and storage hierarchy including a non-volatile memory tier within a computer system. In one...
Autonomous initialization of non-volatile random access memory in a
A non-volatile random access memory (NVRAM) is used in a computer system to store information that allows the NVRAM to autonomously initialize itself at...
Dynamic memory page policy
Mechanisms for predicting whether a memory access may be a page hit or a page miss and applying different page policies (e.g., an open page policy or a close...
Instruction and logic for run-time evaluation of multiple prefetchers
A processor includes a cache, a prefetcher module to select information according to a prefetcher algorithm, and a prefetcher algorithm selection module. The...
Apparatus and method of efficient vector roll operation
A machine readable storage medium containing program code is described that when processed by a processor causes a method to be performed. The method includes...
Technologies for remotely controlling a computing device via a wearable
Technologies for remotely controlling a separate computing device includes a wearable computing device to receive sensor data from an optical sensor of the...
Adaptively limiting a maximum operating frequency in a multicore processor
In an embodiment, a processor includes a plurality of cores each to independently execute instructions, and a power control unit coupled to the plurality of...
Restricting clock signal delivery based on activity in a processor
In an embodiment, a processor has a core to execute instructions which includes a first cache memory, a clock generation logic to receive and distribute a first...
Technologies for utilizing a plurality of displays include a computing device and a plurality of detachable display units physically coupled to the computing...
Two-dimensional, high-density optical connector
An optical connector includes a two-dimensional array of lenses to couple optical signals between an optical integrated circuit and an optical fiber. The...
Thermal interface material handling for thermal control of an electronic
component under test
Thermal interface material handing is described for thermal control of an electronic component under test. In one example, a thermal control unit is adapted to...
Optical perspiration sensor using frustrated total internal reflection
Systems and methods may provide for receiving an electrical measurement signal from a first photodetector coupled to a first waveguide and determining a total...
Non-contact power charging system and control method thereof
A non-contact power charging, in which power transmission can be interrupted when foreign materials are deposited on a charge plate of the non-contact power...
Licensed shared access for long term evolution
A proposed 3GPP LTE protocol enhancement disclosed herein, enables an eNB to interface with its network core to achieve optimal resource reallocations and...
Dynamic hybrid automatic repeat request-acknowledgement (HARQ-ACK)
transmission with enhanced physical downlink...
Embodiments of a system and method for providing dynamic hybrid automatic repeat request-acknowledgement (HARQ-ACK) transmission with enhanced physical downlink...
Maintaining network services across multiple physical interfaces
In one embodiment, the present invention includes an apparatus having a central processing unit (CPU) to execute instructions, a hub coupled to the CPU, and...
Enhanced node B, user equipment and methods for discontinuous reception in
inter-eNB carrier aggregation
Embodiments of user equipment (UE) and methods for enhanced discontinuous reception (DRX) operations for inter eNB carrier aggregation (CA) in an LTE network...
Communication devices and methods for network signaling
A communication device is described comprising a detector configured to detect, based on the reception of radio signals from another communication device,...
Mobile communication station having selectable position latency for
position estimation in a wireless network
Mobile communication stations (STA) and a method for position estimation in a wireless network having access points (APs) are disclosed. The STA is configured...
Use of digital TV bandwidth for web cache pre-loading
Generally, this disclosure provides systems, devices, methods and computer readable media for the use of digital TV (DTV) bandwidth for web cache pre-loading. A...
Interactive visual advertisement service
In accordance with embodiments disclosed herein, there are provided systems, apparatuses, and methods for implementing an interactive visual advertisement...
Optical micro-projection system and projection method
An optical micro-projection system comprising the following components: at least one laser light source (200, 400, 402, 600); at least one movable mirror (102,...
Image signal processor with a block checking circuit
An image signal processor is described. The image signal processor includes a block checking circuit. The block checking circuit comprises comparison circuitry...
Wearable imaging sensor for communications
A wearable image sensor is described. In one example, an apparatus includes a camera to capture images with a wide field of view, a data interface to send...
Apparatus, system and method of supporting streaming over a protocol
adaptation layer (PAL)
Some demonstrative embodiments include apparatuses, systems and/or methods of supporting streaming over a Protocol Adaptation Layer (PAL). For example, an...
Wireline receiver circuitry having collaborative timing recovery
Some embodiments include apparatus and methods having an input to receive an input signal, additional inputs to receive clock signals having different phases to...
Receiver circuit and method performed by a receiver circuit for
determining a channel estimate
A method includes a step of correlating a received signal with a pilot sequence to determine a correlation result. The method further includes a step of...
Method, apparatus, and system for measurement of noise statistics and bit
error ratio estimation
A sample voltage is received from a device at a first slicer element and a second slicer element. A decision by the first slicer element based on the sample...
Methods and arrangements for direct current estimation of a wireless
Logic for direct current (DC) estimation of a wireless communication packet. Logic may determine a first DC estimation based upon a first set of sequences in a...
Semiconductor package with optical port
Described herein are technologies related to a semiconductor package that is installed in a portable device for data communications. More particularly, the...
Coverage extension level for coverage limited device
Generally discussed herein are systems, apparatuses, and methods that can provide a coverage enhancement to a coverage limited device. According to an example a...
Multiband RF device
A device or system for transmission and reception for voice or data communication applications. The device or system is capable of duplex operation and adapted...
I/O driver transmit swing control
A transmission line interface circuit includes a voltage regulator to control a voltage swing of the transmission line interface circuit for signal...
Nonplanar III-N transistors with compositionally graded semiconductor
A III-N semiconductor channel is compositionally graded between a transition layer and a III-N polarization layer. In embodiments, a gate stack is deposited...
Stacked microelectronic dice embedded in a microelectronic substrate
Embodiments of the present description include stacked microelectronic dice embedded in a microelectronic substrate and methods of fabricating the same. In one...
Methods and apparatuses to form self-aligned caps
At least one conductive line in a dielectric layer over a substrate is recessed to form a channel. The channel is self-aligned to the conductive line. The...
Apparatus to reduce retention failure in complementary resistive memory
Described is an apparatus which comprises: a complementary resistive memory bit-cell; and a sense amplifier coupled to the complementary resistive memory...
Method and apparatus for dynamically adjusting voltage reference to
optimize an I/O system
Described herein is an apparatus for dynamically adjusting a voltage reference level for optimizing an I/O system to achieve a certain performance metric. The...
Direct viewer projection
Techniques are disclosed for direct viewer projection, which involves having each pixel's emitted light aimed at or otherwise provided directly to the target...