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Patent # Description
US-1,007,5265 Enhanced node B and methods for network assisted interference cancellation with reduced signaling
Embodiments of an enhanced node B (eNB) and methods for network-assisted interference cancellation with reduced signaling in a 3GPP LTE network are generally...
US-1,007,5248 Preamble-based transmission power detection
Described herein are technologies related to an implementation of transmission power detection in a communication device. The portion of a data signal, and in...
US-1,007,5224 Golay sequences for wireless networks
This disclosure describes the generation and implementation of Golay sequences and Golay Sequence Sets (GSSs) for channel estimation in wireless networks. In...
US-1,007,5215 Radio communication devices and methods for controlling a radio communication device
A radio communication device is described comprising: a transceiver circuit configured to communicate wirelessly with another device; a tamper-proof circuit...
US-1,007,5206 Customizable wearable electronic devices and methods of assembling the same
Example customizable example customizable wearable electronic devices, and methods of assembling the same are disclosed. An example customizable wearable...
US-1,007,5201 Adaptive nonlinear system control using robust and low-complexity coefficient estimation
An adaptive controller for a nonlinear system includes a Volterra filter having a transfer function defined by P coefficients. The controller includes an...
US-1,007,5175 Apparatus and method for automatic bandwidth calibration for phase locked loop
Described is an apparatus which comprises: a time-to-digital converter (TDC) to receive a reference clock and a feedback clock, wherein the TDC is to generate a...
US-1,007,4920 Interconnect cable with edge finger connector
Embodiments of the present disclosure are directed to an interconnect cable including a edge finger connector, and associated configurations and methods. The...
US-1,007,4919 Board integrated interconnect
Embodiments of the present disclosure may relate to a printed circuit board (PCB) that includes a first outer layer and a second outer layer opposite the first...
US-1,007,4718 Non-planar semiconductor device having group III-V material active region with multi-dielectric gate stack
Non-planar semiconductor devices having group III-V material active regions with multi-dielectric gate stacks are described. For example, a semiconductor device...
US-1,007,4591 System with provision of a thermal interface to a printed circuit board
Embodiments of the present disclosure provide techniques and configurations for providing a thermal interface to a PCB. In some embodiments, the system for...
US-1,007,4573 CMOS nanowire structure
Complimentary metal-oxide-semiconductor nanowire structures are described. For example, a semiconductor structure includes a first semiconductor device. The...
US-1,007,4409 Configurable storage blocks having simple first-in first-out enabling circuitry
An integrated circuit may have configurable storage blocks. A configurable storage block may include a memory array, and arithmetic and control circuitry. The...
US-1,007,4357 Integrated acoustic phase array
A system includes a processor and a phased array, coupled to the processor, having an arrayed waveguide for acoustic waves to enable directional sound...
US-1,007,4213 Adaptive multi-frequency shading
An architecture for pixel shading, enables flexible control of shading rates and automatic shading reuse between triangles in tessellated primitives in some...
US-1,007,4205 Machine creation of program with frame analysis method and apparatus
Methods, apparatus, and systems to create, output, and use animation programs comprising keyframes, objects, object states, and programming elements. Objects,...
US-1,007,4151 Dense optical flow acceleration
Described herein are technologies related to technologies to facilitate real-time computer vision applications, especially those with autonomous or...
US-1,007,4072 Tagged item locator method and apparatus
Apparatus and method to facilitate determination of item locations are disclosed herein. One or more storage medium to store a plurality of initial tag to item...
US-1,007,4034 Image processing including adjoin feature based object detection, and/or bilateral symmetric object segmentation
Apparatuses, methods and storage medium associated with processing an image are disclosed herein. In embodiments, a method for processing one or more images may...
US-1,007,4003 Dynamic control for data capture
This application is directed to dynamic control for data capture. A device may comprise a capture logic module to receive at least one of biometric data from a...
US-1,007,3986 Regulating access to and protecting portions of applications of virtual machines
Embodiments of apparatus, computer-implemented methods, systems, and computer-readable media are described herein for a virtual machine manager, wherein the...
US-1,007,3977 Technologies for integrity, anti-replay, and authenticity assurance for I/O data
Technologies for authenticity assurance for I/O data include a computing device with a cryptographic engine and one or more I/O controllers. A metadata producer...
US-1,007,3964 Secure authentication protocol systems and methods
An input device of a secure authentication protocol system may receive at least one user authentication factor in a pre-boot session. The input device may...
US-1,007,3809 Technologies for scalable remotely accessible memory segments
Technologies for one-side remote memory access communication include multiple computing nodes in communication over a network. A receiver computing node...
US-1,007,3808 Multichip package link
Physical layer logic is provided that is to receive data on one or more data lanes of a physical link, receive a valid signal on another of the lanes of the...
US-1,007,3807 Logic-based decoder for crosstalk-harnessed signaling
A logic-based decoder recovers binary data from ternary Crosstalk-Harnessed Signaling (CHS) streams with lower part cost, complexity and power consumption than...
US-1,007,3796 Sending packets using optimized PIO write sequences without SFENCES
Method and apparatus for sending packets using optimized PIO write sequences without sfences. Sequences of Programmed Input/Output (PIO) write instructions to...
US-1,007,3781 Systems and methods for invalidating directory of non-home locations ways
Systems and methods for invalidating a way of a directory for non-home locations (DNHL) set that stores an identifier of a home location of an address is...
US-1,007,3780 Methods and systems for tracking addresses stored in non-home cache locations
Systems and methods for tracking addresses stored in non-home locations in a cache. A method includes determining if an address that is to be stored in a cache...
US-1,007,3779 Processors having virtually clustered cores and cache slices
A processor of an aspect includes a plurality of logical processors each having one or more corresponding lower level caches. A shared higher level cache is...
US-1,007,3775 Apparatus and method for triggered prefetching to improve I/O and producer-consumer workload efficiency
An apparatus and method are described for a triggered prefetch operation. For example, one embodiment of a processor comprises: a first core comprising a first...
US-1,007,3742 Manageability redundancy for micro server and clustered system-on-a-chip deployments
Technologies for providing manageability redundancy for micro server and clustered System-on-a-Chip (SoC) deployments are presented. A configurable...
US-1,007,3731 Error correction in memory
Apparatus, systems, and methods for error correction in memory are described. In one embodiment, a controller comprises logic to receive a read request from a...
US-1,007,3727 Heap management for memory corruption detection
Memory corruption detection technologies are described. A method can include receiving, from the application, an allocation request for an allocation of one or...
US-1,007,3719 Last branch record indicators for transactional memory
In one embodiment, a processor includes an execution unit and at least one last branch record (LBR) register to store address information of a branch taken...
US-1,007,3718 Systems, methods and devices for determining work placement on processor cores
Apparatuses, methods and storage medium for computing including determination of work placement on processor cores are disclosed herein. In embodiments, an...
US-1,007,3715 Dynamic runtime task management
A dynamic runtime scheduling system includes task manager circuitry capable of detecting a correspondence in at least a portion of the output arguments from one...
US-1,007,3703 Booting an operating system of a system using a read ahead technique
In one embodiment, the present invention includes a method for generating a list of files accessed during an operating system (OS) boot process to profile the...
US-1,007,3695 Floating point round-off amount determination processors, methods, systems, and instructions
A method of an aspect includes receiving a floating point round-off amount determination instruction. The instruction indicates a source of one or more floating...
US-1,007,3659 Power management circuit with per activity weighting and multiple throttle down thresholds
A method is described. The method includes receiving an indication of an activity of load circuitry of a power supply. The method includes, in response to the...
US-1,007,3513 Protected power management mode in a processor
In an embodiment, a processor includes a plurality of cores. Each core includes a core power unit to detect one or more power management events, and in response...
US-1,007,3483 Bandgap reference circuit with capacitive bias
An apparatus is described having a reference voltage circuit. The reference voltage circuit includes a diode to receive first and second currents having first...
US-1,007,3260 Method for reducing speckle
According to the present invention there is provided a method of reducing speckle effects in a projected image which is displayed on a display surface,...
US-1,007,3138 Early detection of reliability degradation through analysis of multiple physically unclonable function circuit...
An apparatus is described that includes a plurality of circuits each designed to exhibit a unique signature code that is determined from manufacturing...
US-1,007,1544 Separation apparatus, separation system, and separation method
A separation apparatus for separating a superposed substrate in which a processing target substrate and a supporting substrate are joined together with an...
US-1,007,0816 Orthotic sensor device
Embodiments of the present disclosure provide techniques and configurations for an orthotic device. In one instance, the device may include an orthotic device...
US-1,007,0598 Intelligent agricultural systems
An agricultural data collection system may include a plurality of self-powered agricultural data collection devices disposed across an agricultural area. The...
US-1,007,0537 Formation of dielectric with smooth surface
Embodiments of the present disclosure are directed towards techniques and configurations for formation of a dielectric with a smooth surface. In one embodiment,...
US-1,007,0526 Connector with structures for bi-lateral decoupling of a hardware interface
Techniques and mechanisms to provide a connector for securing to a first printed circuit board (PCB). In an embodiment, the connector is configured to receive a...
US-1,007,0525 Internal to internal coaxial via transition structures in package substrates
Methods/structures of forming package structures are described. Those methods/structures may include forming a first sub-laminated board comprising a first...
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