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Patent # Description
US-9,532,041 Method and system for automatic focus with self-calibration
A systems, article, and method to provide automatic focus with self-calibration.
US-9,531,916 Preventing pattern recognition in electronic code book encryption
In general, in one aspect, noise is injected into a bitmap associated with content to be presented on a display to create a noisy bitmap. The noisy bitmap is...
US-9,531,888 Intelligent ringer in smartphones
Various systems and methods for an intelligent ringer in smartphones are described herein. A system for implementing intelligent notifications includes a...
US-9,531,863 System and method for gesture-based management
A system includes a first mobile device configured to initiate communication with at least one other mobile device. The first mobile device includes a status...
US-9,531,806 Method and apparatus for requesting media replication in a collaborative communication session, and method and...
In a method for requesting media replication in a collaborative communication session, a message is sent which specifies that a communication medium for a...
US-9,531,777 Distributing intelligence across networks
Methods and apparatus relating to distribution of intelligence across a network are described. In one embodiment, one or more content processors may be provided...
US-9,531,455 Feedback scheme for MU-MIMO
Embodiments of a system and method for managing feedback in a MU-MIMO system. An access point can announce one or more of mobile stations that are to receive...
US-9,531,450 Apparatus, system and method of beam selection for beamformed diversity wireless communication
Some demonstrative embodiments include devices, systems and/or methods of beam selection for beamformed communication. For example, an apparatus may include a...
US-9,531,446 Use of location information in multi-radio devices for mmWave beamforming
A system and method are provided for using location services available from other radios in a multi-radio system to assist a beamforming mechanism, particularly...
US-9,531,443 Techniques for communication with tag devices
Various embodiments are generally directed to techniques for resolving interference in near field communications (NFC) among multiple NFC tag devices...
US-9,531,399 Linearity improvement for high resolution RFDAC
A digital to analog converter (DAC) circuit to convert a digital input signal to an analog output signal, wherein the digital input signal comprises a plurality...
US-9,531,393 Phase frequency detector
Described is an apparatus comprising: a first phase frequency detector (PFD) to determine a coarse phase difference between a first clock signal and a second...
US-9,531,352 Latched comparator circuit
Some embodiments include apparatuses having input nodes to receive input signals, output nodes to provide output signals, a first stage including a first pair...
US-9,531,197 Non-contact power transmission apparatus
A non-contact power transmission apparatus accurately determines the kind of object that is placed on the charging deck of the non-contact power transmission...
US-9,531,076 Electrically tunable miniature antenna
Described herein are architectures, platforms and methods for electrically tuning radiators in a portable device.
US-9,530,878 III-N material structure for gate-recessed transistors
III-N transistors with recessed gates. An epitaxial stack includes a doped III-N source/drain layer and a III-N etch stop layer disposed between a the...
US-9,530,758 3D integrated circuit package with through-mold first level interconnects
3D integrated circuit packages with through-mold first level interconnects and methods to form such packages are described. For example, a semiconductor package...
US-9,530,747 Solder in cavity interconnection structures
The present disclosure relates to the field of fabricating microelectronic packages, wherein cavities are formed in a dielectric layer deposited on a first...
US-9,530,740 3D interconnect structure comprising through-silicon vias combined with fine pitch backside metal...
A 3D interconnect structure and method of manufacture are described in which a through-silicon vias (TSVs) and metal redistribution layers (RDLs) are formed...
US-9,530,733 Forming layers of materials over small regions by selective chemical reaction including limiting enchroachment...
A method of an aspect includes forming a first thicker layer of a first material over a first region having a first surface material by separately forming each...
US-9,530,718 DBF film as a thermal interface material
A die backside film including a matrix material; and an amount of filler particles to render the die backside film thermally conductive, wherein a thermal...
US-9,530,688 Directed self assembly of block copolymers to form vias aligned with interconnects
A method of an aspect includes forming an interconnect line etch opening in a hardmask layer. The hardmask layer is over a dielectric layer that has an...
US-9,530,523 Thermal disturb as heater in cross-point memory
The present disclosure relates to thermal disturb as heater in cross-point memory. An apparatus includes a memory controller. The memory controller is...
US-9,530,513 Methods and apparatus to read memory cells based on clock pulse counts
A disclosed example sense programmed states of memory cells includes starting a counter at a time of activating a plurality of memory cells. Binary values are...
US-9,530,468 Method, apparatus and system to manage implicit pre-charge command signaling
Techniques and mechanisms for exchanging information between a memory controller and a memory device. In an embodiment, a memory controller receives information...
US-9,530,461 Architectures and techniques for providing low-power storage mechanisms
Techniques to utilize a very low power state with a memory subsystem that includes one or more non-volatile memory devices and a volatile memory system. A...
US-9,530,404 System and method of automatic speech recognition using on-the-fly word lattice generation with word histories
A systems, article, and method of automatic speech recognition using on-the-fly word lattice generation with word histories.
US-9,530,387 Adjusting direct memory access transfers used in video decoding
An apparatus having a first memory and a circuit is disclosed. The first memory may be configured to store a list having a plurality of read requests. The read...
US-9,530,386 Methods and apparatus to provide extended graphics processing capabilities
Methods, apparatus, and articles of manufacture to provide extended graphics processing capabilities are disclosed. A disclosed example method involves sending...
US-9,530,294 Methods and apparatus for pairing items for security
An item of value comprises an assembly of parts. The parts comprise a component that has value independent of the item, and an assembly security system that is...
US-9,530,178 Non-volatile storage for graphics hardware
Methods and systems may provide for an apparatus having a graphics processing unit (GPU) and a non-volatile memory dedicated to the GPU. If a request for...
US-9,530,027 Device lock for transit
Generally, this disclosure describes providing theft deterrence for a device while in transit. The system may include lock state circuitry configured to receive...
US-9,530,017 Secure printing between printer and print client device
Systems and methods of operating a computing system may involve securely printing a print document sent from a client device to a target printer. In one...
US-9,529,997 Centralized platform settings management for virtualized and multi OS systems
A processing device may include a first processor executing an operating system including a configurable setting and an isolated execution environment including...
US-9,529,805 Systems and methods for providing dynamic file system awareness on storage devices
Systems and methods for providing awareness of a host file system on a storage device are described. In one embodiment, a storage device includes a host...
US-9,529,802 System and method for generating homogeneous metadata from pre-existing metadata
A method according to one embodiment includes determining the presence of pre-existing metadata associated with at least one local media content file. The...
US-9,529,765 Integrated circuit (IC) with reconfigurable digital voltage regulator fabric
Described is an apparatus which comprises: a plurality of bridges which are operable to drive respective signals for one or more power supply rails; a plurality...
US-9,529,715 Hybrid hardware and software implementation of transactional memory access
Embodiments of the invention relate a hybrid hardware and software implementation of transactional memory accesses in a computer system. A processor including a...
US-9,529,708 Apparatus for configuring partitions within phase change memory of tablet computer with integrated memory...
A non-volatile random access memory (NVRAM) is used in a computer system to perform multiple roles in a platform storage hierarchy, specifically, to replace...
US-9,529,668 Method and system for using NAND page buffers to improve the transfer buffer utilization of a solid state drive
A page data (e.g., upper page data) received from a host is stored in a transfer buffer of a controller of a solid state drive. Another page data (e.g., lower...
US-9,529,665 Double consecutive error correction
Double consecutive error correction is described. An integrated circuit with double consecutive error correction logic includes a data storage structure...
US-9,529,660 Apparatus and method for detecting single flip-error in a complementary resistive memory
Described is an apparatus which comprises: a complementary resistive memory bit-cell; a first sense amplifier coupled to the complementary resistive memory...
US-9,529,645 Methods and apparatus to manage speculative execution of object locks by diverting the speculative execution of...
Example methods and apparatus to manage object locks are disclosed. A disclosed example method includes intercepting a processor request to apply the lock on...
US-9,529,596 Method and apparatus for scheduling instructions in a multi-strand out of order processor with instruction...
In accordance with embodiments disclosed herein, there are provided methods, systems, and apparatuses for scheduling instructions in a multi-strand out-of-order...
US-9,529,592 Vector mask memory access instructions to perform individual and sequential memory access operations if an...
In one embodiment, logic is provided to receive and execute a mask move instruction to transfer a vector data element including a plurality of packed data...
US-9,529,591 SIMD variable shift and rotate using control manipulation
Vector single instruction multiple data (SIMD) shift and rotate instructions are provided specifying: a destination vector register comprising fields to store...
US-9,529,587 Refactoring data flow applications without source code changes or recompilation
Systems and methods may provide refactoring data flow applications without source code changes or recompilation. An apparatus may create a map file that...
US-9,529,583 Single microcontroller based management of multiple compute nodes
An apparatus for compute module management is described herein. The apparatus includes a host system and a logic solution. The host system includes a central...
US-9,529,567 Digital processor having instruction set with complex exponential non-linear function
A digital processor is provided having an instruction set with a complex exponential function. The digital processor evaluates a complex exponential function...
US-9,529,480 Tap zones for near field coupling devices
Described herein are techniques related to near field coupling and more particularly using near field coupling related taps to indicate user selections on...
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