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Methods and apparatus for keyword-based, non-linear navigation of video
streams and other content
In one example embodiment, a program navigation system involves a television (TV) set (or other audio/visual presentation device) and a mobile device. While the...
System and method for processing visual information
An apparatus for processing visual information includes a controller to control display of information in an application window based on first visual...
Notification acknowledgement in electronic devices
In one example a controller comprises logic, at least partially including hardware logic, configured to receive a notification of an incoming event and...
Methods and apparatus for improving user experience
A data processing system includes components for providing a pleasant user experience. Those components may include a family interaction engine that provides a...
Methods and arrangements to decode communications
Embodiments may comprise logic such as hardware and/or code to reduce power consumption by, e.g., a device such as a station or relay by implementing prediction...
Method and apparatus for securely saving and restoring the state of a
An apparatus and method for securely suspending and resuming the state of a processor. For example, one embodiment of a method comprises: generating a data...
Method for assembling authorization certificate chains
A method for assembling authorization certificate chains among an authorizer, a client, and a third party allows the client to retain control over third party...
Technologies for secure inter-virtual network function communication
Technologies for secure inter-virtual network function communication include a computing device to determine a cryptographic key for secure communication over...
Method of processing received digitized signals and mobile radio
communication terminal device
A method of processing signals may include receiving a first signal being modulated on a first carrier frequency in a predefined frequency band; measuring a...
Anti-starvation and bounce-reduction mechanism for a two-dimensional
A slot reservation method is disclosed. The slot reservation method generates slot reservations in two dimensions to address starvation and to reduce bounce of...
Cryptographic key generation based on multiple biometrics
In an embodiment, an apparatus includes a processor including a first core. The first core includes multi-biometric logic to output first biometric data w.sub.i...
User equipment power savings for machine type communications
Embodiments of user equipment (UE) and base stations (eNodeB) and method for reducing power consumption in UE in a wireless network are generally described...
Communication overhead reduction apparatus, systems, and methods
An apparatus and a system, as well as a method and article, may operate to transmit a first number of training symbols corresponding to a first number of...
Protocol for MU MIMO operation in a wireless network
Various embodiments of the invention may modify the techniques used in conventional networks, to achieve techniques that are better suited for networks that use...
Detection of double talk in telecommunications networks
In one embodiment, the presence of double talk (DT) is detected in a telecommunications network having a near-end user and a far-end user. The energies of both...
Communication device, mobile terminal, method for requesting information
and method for providing information
A communication device is described comprising a message generator configured to generate a message indicating that a mobile terminal is to determine whether a...
Digital delay-locked loop (DLL) training
A DLL may include a DLL training circuit that provides a feedback signal to the DLL and receives a first delay code value from the DLL that corresponds to the...
System for digitally controlled edge interpolator linearization
This application discusses, among other things, an interpolator architecture for digital-to-time converters (DTCs). In an example, an interpolator can include...
Inverter- and-switched-capacitor-based squelch detector apparatus and
A squelch detector includes is configured to receive a time-varying differential communication signal, and includes switched capacitors and an inverter...
Regulation of an amplification apparatus
An amplifier module comprises an amplifier having an output, a coupler coupled to the output to receive a first signal provided at the output and a power...
Die-stacking using through-silicon vias on bumpless build-up layer
substrates including embedded-dice, and...
An apparatus includes a coreless substrate with a through-silicon via (TSV) embedded die that is integral to the coreless substrate. The apparatus includes a...
Techniques for forming interconnects in porous dielectric materials
Techniques are disclosed for forming interconnects in porous dielectric materials. In accordance with some embodiments, the porosity of a host dielectric layer...
Substrate conductor structure and method
Embodiments of substrates, semiconductor devices and methods are shown that include elongated structures to improve conduction. Elongated structures and methods...
Apparatus to minimize thermal impedance using copper on die backside
A method and apparatus to minimize thermal impedance using copper on the die or chip backside. Some embodiments use deposited copper having a thickness chosen...
Techniques for trench isolation using flowable dielectric materials
Techniques are disclosed for providing trench isolation of semiconductive fins using flowable dielectric materials. In accordance with some embodiments, a...
Self-aligned via patterning with multi-colored photobuckets for back end
of line (BEOL) interconnects
Self-aligned via patterning with multi-colored photobuckets for back end of line (BEOL) interconnects is described. In an example, an interconnect structure for...
Energy storage devices with at least one porous polycrystalline substrate
In one embodiment, a structure for a energy storage device may include at one polycrystalline substrate. The grain size may be designed to be at least a size at...
A planar transformer or balun device, having small trace spacing and high mutual coupling coefficient, and a method of fabricating the same is disclosed. The...
Phase change memory with mask receiver
Technology for writing data to a phase change memory array is disclosed. In an example, a method may include identifying mask logic for masking cells in the...
Adaptive microphone sampling rate techniques
An apparatus for adjusting a microphone sampling rate, the apparatus including an input to receive an audio signal from a microphone and a front-end processing...
Apparatus and method for voice based user enrollment with video assistance
Embodiments of apparatus and methods for voice based user enrollment with video assistance are described. In embodiments, an apparatus may include a face...
Image processing techniques for tile-based rasterization
Techniques are described that can delay or even prevent use of memory to store triangles associated with tiles as well as processing resources associated with...
Method and apparatus for securing a dynamic binary translation system
A processor and method are described for managing different privilege levels associated with different types of program code, including binary translation...
Systems, methods, and apparatus to virtualize TPM accesses
Embodiments of system, method, and apparatus for virtualizing TPM accesses is described. In some embodiments, an apparatus including a CPU core to execute a...
Device, method, and system for augmented reality security
Devices and methods for authenticating a user of a mobile computing device to a content server include establishing a communication session between a target...
Parallel operation in B+ trees
Embodiments of techniques and systems for parallel processing of B+ trees are described. A parallel B+ tree processing module with partitioning and ...
Writing message to controller memory space
An embodiment may include circuitry that may write a message from a system memory in a host to a memory space in an input/output (I/O) controller in the host. A...
Reconfigurable apparatus for hierarchical collective networks with bypass
A reconfigurable tree apparatus with a bypass mode and a method of using the reconfigurable tree apparatus are disclosed. The reconfigurable tree apparatus uses...
Circuitry to generate and/or use at least one transmission time in at
least one descriptor
An embodiment may include circuitry that may generate and/or use, at least in part, at least one descriptor to be associated with at least one packet. The at...
Leveraging an enumeration and/or configuration mechanism of one
interconnect protocol for a different...
An interconnect architecture device of an aspect includes a processor to generate a transaction that is of a different interconnect protocol than LLI. The...
Secure replay protected storage
Embodiments of the invention create an underlying infrastructure in a flash memory device (e.g., a serial peripheral interface (SPI) flash memory device) such...
Instruction and logic for adaptive dataset priorities in processor caches
A processor includes a front end, a cache, and a cache controller. The front end includes logic to receive an instruction defining a priority dataset. The...
Apparatus and method for accelerating operations in a processor which uses
shared virtual memory
An apparatus and method are described for coupling a front end core to an accelerator component (e.g., such as a graphics accelerator). For example, an...
Method, apparatus, system for handling address conflicts in a distributed
memory fabric architecture
Method, apparatus and system for handling address conflicts in distributed memory fabrics. Memory access requests originating from caching agents and...
Method, apparatus and system for handling cache misses in a processor
In an embodiment, a processor includes one or more cores, and a distributed caching home agent (including portions associated with each core). Each portion...
Workload adaptive address mapping
Embodiments of the invention describe an apparatus, system and method for workload adaptive address mapping. Embodiments of the invention may receive a request...
Register error protection through binary translation
Some implementations provide techniques and arrangements for detecting a register value having a life longer than a threshold period based, at least in part, on...
Electronic device to provide notification of event
An electronic device may be provided that includes logic, at least partially implemented in hardware, to detect an occurrence of a blocking instance at the...
Synchronizing multiple threads efficiently
In one embodiment, the present invention includes a method of assigning a location within a shared variable for each of multiple threads and writing a value to...
Low latency virtual machine page table management
Various embodiments of this disclosure may describe method, apparatus and system for reducing system latency caused by switching memory page permission views...