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Current leakage reduction in 3D NAND memory
Embodiments of the present disclosure are directed towards techniques and configurations for providing an apparatus comprising a memory array, to which bias...
Method and apparatus for processing audio data
A method for processing audio data includes determining a first common scalefactor value for representing quantized audio data in a frame. A second common...
Media encoding using changed regions
A method and system for media encoding using changed regions. The method includes detecting the changed regions and a static portion of a desktop of a computing...
Identification of GPU phase to determine GPU scalability during runtime
A method performed by a processor is described. The method may include identifying a graphics processing unit (GPU) phase of a frame, using said identified GPU...
Instruction execution that broadcasts and masks data values at different
levels of granularity
An apparatus is described that includes an execution unit to execute a first instruction and a second instruction. The execution unit includes input register...
Providing multiple virtual device controllers by redirecting an interrupt
from a physical device controller
Embodiments of apparatuses, methods, and systems for providing multiple virtual device controllers by redirecting an interrupt from a physical device controller...
Dynamic heterogeneous hashing functions in ranges of system memory
Dynamic heterogeneous hashing function technology for balancing memory requests between multiple memory channels is described. A processor includes functional...
Method, system and apparatus including logic to manage multiple memories
as a unified exclusive memory
A processor includes at least one execution unit, a near memory, and memory management logic to manage the near memory and a far memory external to the...
Scalable coherence for multi-core processors
An apparatus of an aspect includes a plurality of cores. The plurality of cores are logically grouped into a plurality of clusters. A cluster sharing map-based...
Hardware-assisted application checkpointing and restoring
Technologies for hardware-assisted application checkpointing include a computing device having a processor with hardware checkpoint support. In response to...
Boot management in a non-volatile memory system
According to one configuration, computer processor hardware retrieves boot data stored in the non-volatile memory system. The boot data includes executable boot...
System, apparatus and method for translating vector instructions
Vector translation instructions are used to demarcate the beginning and the end of a code region to be translated. The code region includes a first set of...
Instruction for implementing vector loops of iterations having an
iteration dependent condition
A processor is described having an instruction execution pipeline. The instruction execution pipeline includes an instruction fetch stage to fetch an...
Multiple register memory access instructions, processors, methods, and
A processor includes N-bit registers and a decode unit to receive a multiple register memory access instruction. The multiple register memory access instruction...
Techniques for enabling bit-parallel wide string matching with a SIMD
Various embodiments are generally directed to overcoming limitations of vector registers in their use with bit-parallel string matching algorithms. An apparatus...
Method and apparatus for store durability and ordering in a persistent
An apparatus and method are described for store durability and ordering in a persistent memory architecture. For example, one embodiment of a method comprises:...
System and method to control screen capture
Various systems and methods for controlling screen captures are described herein. A system comprises a touchscreen; a display module communicatively coupled to...
Dual touch surface multiple function input device
For one disclosed embodiment, an apparatus includes a first housing and a second housing coupled to the first housing. The first housing and the second housing...
Sharing power between domains in a processor package using encoded power
consumption information from a second...
In an embodiment, the present invention includes a processor having a first domain with at least one core to execute instructions, a second domain coupled to...
Self-leveling system with auto feedback control
A leveling system includes a chassis and a first foot protruding from the chassis. The leveling system also includes a plurality of pressure sensors to measure...
Substrate for integrated circuit devices including multi-layer glass core
and methods of making the same
Disclosed are embodiments of a substrate for an integrated circuit (IC) device. The substrate includes a core comprised of two or more discrete glass layers...
Inclined photonic chip package for integrated optical transceivers and
optical touchscreen assemblies
An optical touchscreen assembly may employ a photonic chip packaged with a chip surface at an angle inclined between horizontal and vertical orientations. An...
Integration of embedded thin film capacitors in package substrates
An embedded thin film capacitor and methods of its fabrication are disclosed. The embedded thin film capacitor includes two conductive plates separated by a...
User equipment having virtual mobile terminals
Embodiments of the present disclosure describe methods, apparatuses, and systems related to a user equipment having virtual mobile terminals. Other embodiments...
Systems, methods, and devices with different radio link failure timers
based on user equipment speed
Systems, methods, and device for adjusting an operation time of a radio link failure timer are disclosed herein. User equipment (UE) may be configured to...
Queueing mechanism for client-side network traffic to reduce radio power
consumption on mobile clients
Embodiments described herein relate generally to delaying the transmission of a plurality of data packets. A device may enter a packet-delay mode based on an...
Shaping data packet traffic
According to some embodiments, a communication module 120 may be configured to transmit data packet traffic and a management module 110 may be configured to...
Signaling QoS requirements and UE power preference in LTE-A networks
Embodiments for signaling quality of service (QoS) requirements and user equipment (UE) power preference in LTE-A networks are generally described herein. In...
Radio communication devices and methods for controlling a radio
A radio communication device may be provided. The radio communication device may include: a receiver configured to receive data; a buffer configured to buffer a...
Technologies for controlling network access based on electronic device
Technologies for monitoring network access and/or usage include mobile computing devices in communication with network devices to facilitate access to a...
Techniques for trusted location application and location provider
Various embodiments are generally directed to techniques for conveying location information between a location provider and a trusted location application...
Method and apparatus to using storage devices to implement digital rights
Embodiments of systems, apparatuses, and methods to securely download digital rights managed content with a client are described. In some embodiments, a system...
Content URL authentication for dash
Technology for content uniform resource locator (URL) authentication for dynamic adaptive streaming over hypertext transfer protocol (HTTP) (DASH) is disclosed....
Two dimensional direct memory access scheme for enhanced network protocol
Systems and methods are directed to a memory device that includes a plurality of memory buffers and a direct memory access (DMA) descriptor structure. The DMA...
Device, system and method of communicating a wireless communication
Some demonstrative embodiments include devices, systems and/or methods of communicating a wireless orthogonal-frequency-division-multiplexing (OFDM) signal. For...
Apparatus, system and method of direct current (DC) estimation of a
wireless communication packet
Some demonstrative embodiments include devices, systems and/or methods of Direct Current (DC) estimation. For example, an apparatus may include an estimator to...
Secure message filtering to vehicle electronic control units with secure
provisioning of message filtering rules
A method according to one embodiment includes the operations of configuring a host processor to receive a message filtering rule, the host processor associated...
Instruction for accelerating SNOW 3G wireless security algorithm
Vector instructions for performing SNOW 3G wireless security operations are received and executed by the execution circuitry of a processor. The execution...
Systems and methods for optimized decoding of in-band on-channel (IBOC)
Certain embodiments herein are directed to optimized decoding of in-band on-channel (IBOC) services, such as audio, traffic, and data associated with HD...
Beamforming using base and differential codebooks
Embodiments of methods and apparatus for determining and/or quantizing a beamforming matrix are disclosed. In some embodiments, the determining and/or...
Removal of modulated tonal interference
In some embodiments a phase between a periodic spreading signal and an effective spreading signal modulating an interfering harmonic is determined, an amplitude...
Hybrid I/Q and polar transmitter
A hybrid polar I-Q transmitter includes an I-Q derivation circuit configured to receive a first and second I-Q data components comprising a first I-Q data pair,...
Decoder and method for decoding an encoded sequence of bits
A decoder including an input, a branch metric unit, a path metric unit, a starting state unit, and a tail path forcing unit, or alternatively, a state...
Supporting data compression using match scoring
In one embodiment, a processing system is provided. The processing system includes a memory for storing an input bit stream and a processing logic coupled to...
Partitioned data compression using accelerator
In an embodiment, a processor includes a compression accelerator coupled to a plurality of hardware processing cores. The compression accelerator is to: receive...
Package structures including discrete antennas assembled on a device
Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include...
Barrier film techniques and configurations for phase-change memory
Embodiments of the present disclosure describe barrier film techniques and configurations for phase-change memory elements. In an embodiment, an apparatus...
Two-dimensional condensation for uniaxially strained semiconductor fins
Techniques are disclosed for enabling multi-sided condensation of semiconductor fins. The techniques can be employed, for instance, in fabricating fin-based...
Non-planar transistors and methods of fabrication thereof
The present description relates to the formation source/drain structures within non-planar transistors, wherein fin spacers are removed from the non-planar...