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Patent # Description
US-1,042,5982 Device, system and method to implement multiple-input multiple-output channel access rules in an enhanced...
A wireless communication device, system and method. The device includes a memory, a processing circuitry coupled to the memory and including logic, the...
US-1,042,5950 Method and device for mitigating interference in collocated transceivers
The disclosure relates to a method for mitigating interference of a first radio signal received by a first transceiver of a first radio access technology (RAT)...
US-1,042,5893 Power saving channel access for wireless devices in dense wireless networks
Example systems, methods, and devices for channel access in dense wireless networks are discussed. More specifically, methods may include transmitting one or...
US-1,042,5846 Network assistance for device-to-device discovery
Embodiments of system and method configurations for device discovery and connection establishment in connection with use of device-to-device (D2D) and...
US-1,042,5834 Techniques to support directional transmission and reception by wireless network boosters
Techniques to support directional transmission and reception by wireless network boosters are described. In one embodiment, for example, an apparatus may...
US-1,042,5810 Method for physical layer security protection using public keys
Embodiments of a User Equipment (UE), Next Generation Node-B (gNB) and methods of communication are generally described herein. The UE may randomly select a...
US-1,042,5803 Method, apparatus, and computer readable medium for switching between lower energy and higher energy wireless...
Methods, apparatuses, and computer-readable media for a wireless communication device switching between lower energy and higher energy wireless communication...
US-1,042,5641 Quantization offset and cost factor modification for video encoding
Methods, apparatus, systems and articles of manufacture to perform quantization offset and/or cost factor modification for video encoding are disclosed. Some...
US-1,042,5562 Three-dimensional image sensing module with a low z-height
Disclosed is a three-dimensional image sensing module with a low z-height, and a process for forming the same. The three-dimensional image sensing module may...
US-1,042,5459 Technologies for a seamless data streaming experience
Technologies for seamless data streaming include a control server and one or more client computing devices. A client computing device receives user presence...
US-1,042,5303 Method and apparatus for a power-efficient framework to maintain data synchronization of a mobile personal...
An apparatus and method for a power-efficient framework to maintain data synchronization of a mobile personal computer (MPC) are described. In one embodiment,...
US-1,042,5222 SM4 acceleration processors, methods, systems, and instructions
A processor of an aspect includes a plurality of packed data registers, and a decode unit to decode an instruction. The instruction is to indicate one or more...
US-1,042,5123 Parts-per-million detection apparatus and method
An apparatus is provided which comprises: a first circuitry to track a spread spectrum of a differential signal according to sampled data; and a second...
US-1,042,5094 Method and apparatus for preventing inherent error propagation of successive approximation register...
A method and apparatus for preventing inherent error propagation of a successive approximation register (SAR)-based analog-to-digital converter (ADC) through...
US-1,042,5050 Amplification circuit, apparatus for amplifying, low noise amplifier, radio receiver, mobile terminal, base...
Embodiments provide an amplification circuit, an apparatus for amplifying, a low noise amplifier, a radio receiver, a mobile terminal, a base station, and a...
US-1,042,4830 Omni directional broadband coplanar antenna element
The present invention provides an omni-directional antenna element configuration having a compensated radiation pattern. Broadband antenna elements are...
US-1,042,4670 Display panel with reduced power consumption
A display panel with reduced power consumption is described. An example of the display panel includes an array of light emitting elements that are controllable...
US-1,042,4620 Non-volatile memory devices including integrated ballast resistor
A non-volatile memory device is disclosed, in which a ballast resistor layer is disposed between the selector element and memory element of a given memory cell...
US-1,042,4580 Semiconductor devices having modulated nanowire counts
Semiconductor devices having modulated nanowire counts and methods to form such devices are described. For example, a semiconductor structure includes a first...
US-1,042,4561 Integrated circuit structures with recessed conductive contacts for package on package
An integrated circuit (IC) structure includes a first IC package (ICP), including a first resist surface provided with a first plurality of conductive contacts...
US-1,042,4559 Thermal management of molded packages
An embodiment includes an apparatus comprising: a semiconductor die; package molding that is molded onto and conformal with a first die surface of the...
US-1,042,4530 Electrical interconnections with improved compliance due to stress relaxation and method of making
According to various embodiments of the present disclosure, an electrically conductive pillar having a substrate is disclosed. The electrically conductive...
US-1,042,4314 Techniques for spatial filtering of speech
A sound source localization apparatus configured to identify a location for an active sound object within a defined physical space is described. The sound...
US-1,042,4299 Voice command masking systems and methods
Techniques are disclosed for reliably masking speech commands directed to one or more computing devices to prevent the speech commands from being rendered. In...
US-1,042,4107 Hierarchical depth buffer back annotaton
Briefly, in accordance with one or more embodiments, a processor performs a coarse depth test on pixel data, and performs a final depth test on the pixel data....
US-1,042,4097 Predictive viewport renderer and foveated color compressor
An embodiment of a graphics apparatus may include a focus identifier to identify a focus area, and a color compressor to selectively compress color data based...
US-1,042,4082 Mixed reality coding with overlays
A system includes a camera to capture real world content and a semiconductor package apparatus. The semiconductor package apparatus includes a substrate and...
US-1,042,4043 Efficiently enqueuing workloads from user mode to hardware across privilege domains
Graphics processing systems and methods are described. A graphics processing apparatus may comprise one or more graphics processing cores, a shared buffer...
US-1,042,4040 Dynamic allocation of cache based on instantaneous bandwidth consumption at computing devices
A mechanism is described for facilitating dynamic cache allocation in computing devices in computing devices. A method of embodiments, as described herein,...
US-1,042,3830 Eye contact correction in real time using neural network based machine learning
Techniques related to eye contact correction to provide a virtual user gaze aligned with a camera while the user views a display are discussed. Such techniques...
US-1,042,3783 Methods and apparatus to recover a processor state during a system failure or security event
Methods and apparatus to recover a processor state during a system failure or security event are disclosed. An example apparatus to recover data includes a...
US-1,042,3778 Turing completeness disabling
Described herein are techniques for dealing with the problem of security vulnerabilities in computer software due to undefined behavior that may be exploited by...
US-1,042,3767 Content protection system using biometric authentication
The present disclosure is directed to a content protection system using biometric authentication. In general, a user may be authenticated using sensed biometric...
US-1,042,3747 Method and apparatus for supporting temporal virtualization on a target device
A method for designing a system on a target device includes modifying a circuit to enable the circuit to support a plurality of threads at an instant of time....
US-1,042,3559 System for selectively upgradeable disaggregated server components
A selectively upgradeable disaggregated server is generally described herein. An example modular server unit, the modular server unit includes a processor...
US-1,042,3552 Integrated component interconnect
A data structure is accessed that defines configuration parameters of one or more integrated blocks in an integrated circuit device. One or more of the...
US-1,042,3540 Apparatus, system, and method to determine a cache line in a first memory device to be evicted for an incoming...
Provided are an apparatus, system, and method to determine a cache line in a first memory device to be evicted for an incoming cache line in a second memory...
US-1,042,3535 Caching and tiering for cloud storage
Various systems and methods for caching and tiering in cloud storage are described herein. A system for managing storage allocation comprises a storage device...
US-1,042,3421 Opportunistic utilization of redundant ALU
A processor includes at least one processing core that includes an operation dispatch for dispatching operations from an instruction pipeline, a plurality of...
US-1,042,3415 Hierarchical general register file (GRF) for execution block
Disclosed herein is an apparatus which comprises a plurality of execution units, and a first general register file (GRF) communicatively couple to the plurality...
US-1,042,3411 Data element comparison processors, methods, systems, and instructions
A processor includes a decode unit to decode an instruction that is to indicate a first source packed data operand that is to include at least four data...
US-1,042,3206 Processor to pre-empt voltage ramps for exit latency reductions
In one embodiment, a processor includes a plurality of cores and a power controller. This power controller in turn may include a voltage ramp logic to pre-empt...
US-1,042,3203 Flip-flop circuit with low-leakage transistors
Embodiments include apparatuses, methods, and systems for a flip-flop circuit with low-leakage transistors. The flip-flop circuit may be coupled to a logic...
US-1,042,3202 System power management
One embodiment provides an apparatus. The apparatus includes power control logic and a critical comparator. The power control logic is to determine a critical...
US-1,042,3199 Dynamic thermal platform operating point for electronic devices
In one example a electronic device comprises a housing, at least one heat generating component disposed within the housing, at least one internal heat...
US-1,042,3182 Self-referenced droop detector circuitry
Some embodiments include apparatuses and methods of operating such apparatuses. One of the embodiments includes an input node to receive an input voltage, a...
US-1,042,0504 Detection and calculation of heart rate recovery in non-clinical settings
A wearable device measures heart rate recovery of a user in a non-clinical setting. The wearable device comprises a heart rate detector configured to detect...
US-1,042,0175 Wireless warmers
Methods and apparatus relating to wireless warmers are described. An embodiment integrates wireless warming into an article of clothing. For example, the...
US-1,042,0145 Trigger frame response with network allocation vector
Computer readable media, methods, and apparatuses to determine whether to respond to a frame based on a network allocation vector. An apparatus of a station...
US-1,042,0101 Traffic-aware slot assignment
Aspects of traffic aware slot assignment are described, for example, in a multi-hop wireless network comprising a plurality of nodes. In some aspects, an...
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