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Patent # Description
US-1,012,8989 Station (STA), access point (AP) and method for aggregation of data packets for uplink transmission
Embodiments of a station (STA), access point (AP) and method for aggregation of data packets are generally described herein. The AP may transmit a trigger frame...
US-1,012,8984 Packet tracking techniques for communication networks
Packet tracking techniques for communication networks are described. In an example embodiment, an apparatus may comprise circuitry, a tracking component for...
US-1,012,8961 Angular electrode
An electrode having a first metallic plate; and a second metallic plate arranged at an angle of greater than 0.degree. and less than 180.degree. with respect to...
US-1,012,8882 Mobile communication radio receiver for processing signals from multiple networks
A mobile communications radio receiver for multiple radio network operation includes an RF unit for generating a first down-converted signal from a radio signal...
US-1,012,8879 Enhanced receive sensitivity for concurrent communications
A system using multiple communication technologies for concurrent communication is disclosed. The system includes a loopback receiver, a receiver, and a noise...
US-1,012,8872 Enabling radio frequency multiplexing in a wireless system
A communication device comprises a set of filters that are selectively coupled to different groups of front end ports and an antenna port to form a diplexer, a...
US-1,012,8868 Efficient dictionary for lossless compression
Various systems and methods for lossless data compression are described herein. A process for lossless data compression includes hashing an input byte stream to...
US-1,012,8858 Phase-locked loop circuitry including improved phase alignment mechanism
Some embodiments include apparatuses and methods of operating such apparatuses. One of the apparatuses includes a first circuit included in a phase-locked loop...
US-1,012,8855 Apparatus and method for clock synchronization for inter-die synchronized data transfer
Described is an apparatus for clock synchronization. The apparatus comprises a pair of interconnects; a first die including a first phase interpolator having an...
US-1,012,8851 Techniques for programming circuits using mode decoding
An integrated circuit includes programmable circuits, a configuration status register circuit, a mode register circuit, a mode decoder circuit, and a...
US-1,012,8591 Electrical connector
One embodiment provides an electrical connector. The electrical connector includes a housing defining a slot; and a pin. The pin includes a stub member...
US-1,012,8356 P-tunneling field effect transistor device with pocket
Tunneling field effect transistors (TFETs) are described herein. In an example, a TFET includes a pocket disposed near a junction of a source region, wherein...
US-1,012,8307 MicroLED display and assembly
Crystalline (micro)LED display assemblies, methods of fabricating such display assemblies, crystalline LED source substrates from which the (micro)LEDs may be...
US-1,012,8262 Vertical memory having varying storage cell design through the storage cell stack
An apparatus is described having a memory. The memory includes a vertical stack of storage cells, where, a first storage node at a lower layer of the vertical...
US-1,012,8248 Aging tolerant apparatus
An apparatus is provided which comprises: a stack of transistors of a same conductivity type, the stack including a first transistor and a second transistor...
US-1,012,8225 Interconnect structures with polymer core
Embodiments of the present disclosure are directed towards techniques and configurations of interconnect structures having a polymer core in integrated circuit...
US-1,012,8205 Embedded die flip-chip package assembly
Embodiments of the present disclosure describe integrated circuit (IC) package assemblies and methods of fabricating IC package assemblies. These embodiments...
US-1,012,8177 Multi-layer package with integrated antenna
Embodiments of the present disclosure describe a multi-layer package with antenna and associated techniques and configurations. In one embodiment, an integrated...
US-1,012,7991 Three dimensional memory device with access signal triggering from voltage pump output levels
A method is described. The method includes, within a semiconductor memory device comprising a three dimensional storage cell array, pumping a voltage and...
US-1,012,7968 Method and apparatus for completing pending write requests to volatile memory prior to transitioning to...
In one embodiment, an apparatus comprises a processor core and a power control unit. The power control unit is to identify the occurrence of a power loss from a...
US-1,012,7959 Sense amplifier
Embodiments include a sense amplifier circuit including first and second paths that may be selectively coupled to a memory cell or a reference cell as part of a...
US-1,012,7902 Optimizations to decoding of WFST models for automatic speech recognition
A method in a computing device for decoding a weighted finite state transducer (WFST) for automatic speech recognition is described. The method includes sorting...
US-1,012,7887 Acceleration of color conversion
Techniques related to accelerating color conversion are discussed. Such techniques may include generating a converted color value based on an array of ordered...
US-1,012,7707 Discard mechanism for tile-based rendering
A tile identifier may be assigned to tiles processed in order in a pixel shader. When the tiles are processed out of order in the pixel shader, the tile...
US-1,012,7627 Mapping graphics resources to linear arrays using a paging system
Memory resources that are stored in GPU-specific formats may be accessed as linear arrays by CPU applications. Shared virtual memory (SVM) support enables...
US-1,012,7625 Bandwidth-efficient lossless fragment color compression of multi-sample pixels
Described herein are technologies related to facilitate lossless compression for multi-sample color data of computer graphics that maximizes the apparent...
US-1,012,7406 Digital rights management playback glitch avoidance
Various embodiments are generally directed to the provision re-provision of encryption keys to access encrypted media. Encryption keys may be provisioned and...
US-1,012,7224 Extensible context-aware natural language interactions for virtual personal assistants
Technologies for extensible, context-aware natural language interactions include a computing device having a number of context source modules. Context source...
US-1,012,7187 Digital interconnects with protocol-agnostic repeaters
A system and method is described for simplifying implementation of repeater (e.g., re-driver/re-timer) module implementation in high-data-rate interconnects...
US-1,012,7184 Low overheard high throughput solution for point-to-point link
An apparatus is described. The apparatus includes a point-to-point link interface circuit. The point-to-point link interface circuit is to support communication...
US-1,012,7177 Unified device interface for a multi-bus system
The present disclosure is directed to a unified device interface for a multi-bus system. In at least one embodiment, a system may comprise more than one data...
US-1,012,7162 Efficient low cost on-die configurable bridge controller
Described is a host interface, a device interface, a downstream translation circuitry, an upstream translation circuitry, and a host line-state state machine....
US-1,012,7101 Memory device error check and scrub mode and error transparency
An error check and scrub (ECS) mode enables a memory device to perform error checking and correction (ECC) and count errors. An associated memory controller...
US-1,012,7072 Enhanced virtual function capabilities in a virtualized network environment
The present disclosure is directed to enhanced virtual function capabilities in a virtualized network environment. In general, devices may comprise physical and...
US-1,012,7058 Content presentation with enhanced closed caption and/or skip back
Apparatuses, methods and storage medium associated with content consumption are disclosed herein. In embodiments, an apparatus may include a decoder, a user...
US-1,012,7042 Method and apparatus to process SHA-2 secure hashing algorithm
A processor includes an instruction decoder to receive a first instruction to process a secure hash algorithm 2 (SHA-2) hash algorithm, the first instruction...
US-1,012,7039 Extension of CPU context-state management for micro-architecture state
A processor saves micro-architectural contexts to increase the efficiency of code execution and power management. A save instruction is executed to store a...
US-1,012,7012 Scalable input/output system and techniques to transmit data between domains without a central processor
An apparatus for managing input/output (I/O) data may include a streaming I/O controller to receive data from a load/store domain component and output the data...
US-1,012,6985 Application driven hardware cache management
A processor includes a processing core to generate a memory request for an application data in an application. The processor also includes a virtual page group...
US-1,012,6958 Write suppression in non-volatile memory
Techniques are disclosed for write suppression to improve endurance rating of non-volatile memories, such as QLC-NAND SSDs or other relatively slow, low...
US-1,012,6950 Allocating and configuring persistent memory
Methods and apparatus to allocating and/or configuring persistent memory are described. In an embodiment, memory controller logic configures non-volatile memory...
US-1,012,6842 Device for writing with character stroke sensing
Embodiments of the present disclosure provide for an apparatus for a device for writing with character stroke sensing. In one instance, the device may include a...
US-1,012,6775 Current sensor based closed loop control apparatus
A method and apparatus for performing current control for an integrated circuit are described. In one embodiment the apparatus comprises core logic coupled to...
US-1,012,5013 Microelectromechanical system with spring for magnet placement
Apparatuses, systems, and methods associated with placement of magnets within a microelectromechanical system device are disclosed herein. In embodiments, a...
US-1,012,4764 Intrusion detection system based on 2-point profiling of signal characteristics
Various systems and methods for intrusion detection are described herein. An electronic device for intrusion detection includes memory circuitry to store a set...
US-D833,450 Retractable support mechanism for an electronic device
US-1,012,3431 Methods of defect inspection of plated through hole structures utilizing fluorescent conductive fill material
A microelectronic substrate may be fabricated having a substrate core with at least one plated through hole extending therethrough, wherein the plated through...
US-1,012,3419 Surface-mountable power delivery bus board
IC device assemblies including a power delivery bus board that is mounted to a primary PCB (i.e., motherboard) that further hosts a power-sink device and a...
US-1,012,3375 Apparatus, system and method of determining one or more link adaptation parameters
Some demonstrative embodiments include apparatuses, devices, systems and methods of determining one or more link adaptation parameters. For example, an...
US-1,012,3351 Methods and arrangements for channel access in wireless networks
Embodiments may define traffic priorities to facilitate transmissions for wireless communications devices. Many embodiments comprise MAC sublayer logic to...
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