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Patent # Description
US-9,608,059 Semiconductor device with isolated body portion
Semiconductor devices with isolated body portions are described. For example, a semiconductor structure includes a semiconductor body disposed above a...
US-9,608,055 Semiconductor device having germanium active layer with underlying diffusion barrier layer
Semiconductor devices having germanium active layers with underlying diffusion barrier layers are described. For example, a semiconductor device includes a gate...
US-9,608,042 Electrode configurations to increase electro-thermal isolation of phase-change memory elements and associated...
Embodiments of the present disclosure describe electrode configurations to increase electro-thermal isolation of phase-change memory elements and associated...
US-9,607,992 Etchstop layers and capacitors
Capacitor structures for integrated circuit devices are provided. Capacitors include proximate dense or highly dense etchstop layers. The dense or highly dense...
US-9,607,987 Methods for forming fins for metal oxide semiconductor device structures
Methods are disclosed for forming fins in transistors. In one embodiment, a method of fabricating a device includes forming silicon fins on a substrate and...
US-9,607,964 Method and materials for warpage thermal and interconnect solutions
Embodiments describe a semiconductor package that includes a substrate, a die bonded to the substrate, and a solder paste overmold layer formed over a top...
US-9,607,947 Reliable microstrip routing for electronics components
Reliable microstrip routing arrangements for electronics components are described. In an example, a semiconductor apparatus includes a semiconductor die having...
US-9,607,937 Pin grid interposer
An interposer to form a frame around a bottom chip bonded to a package substrate and to standoff a top chip or package for clearance of the bottom chip. The...
US-9,607,914 Molded composite enclosure for integrated circuit assembly
Embodiments of the present disclosure are directed toward a molded composite enclosure for an integrated circuit (IC) assembly. In one embodiment, an enclosure...
US-9,607,687 Dual-port static random access memory (SRAM)
In one embodiment, a memory cell circuit for storing data includes a pair of cross-coupled inverters for storing states of the memory cell circuit. Access...
US-9,607,612 Natural human-computer interaction for virtual personal assistant systems
Technologies for natural language interactions with virtual personal assistant systems include a computing device configured to capture audio input, distort the...
US-9,607,609 Method and apparatus to synthesize voice based on facial structures
Disclosed are embodiments for use in an articulatory-based text-to-speech conversion system configured to establish an articulatory speech synthesis model of a...
US-9,607,579 Personal information device on a mobile computing platform
A method and apparatus for integrating a personal information device (PID) on a mobile computer that includes activating a first mode to display data...
US-9,607,515 System and method for interacting with digital signage
Various systems and methods for interaction with digital signage are described herein. A system for interacting with digital signage, includes an identification...
US-9,607,399 Video feed playback and analysis
Systems and methods may provide for detecting motion of an object, capturing a video feed of the motion, analyzing the video feed according to a predefined...
US-9,607,353 Load balancing and merging of tessellation thread workloads
In one embodiment described herein, a graphics engine with shader unit thread load balancing functionality executes shader instructions from multiple execution...
US-9,607,352 Prediction based primitive sorting for tile based rendering
Techniques related to graphics rendering are discussed. Such techniques may include predicting primitive intersection information for tiles of a frame,...
US-9,607,140 Authenticating a user of a system via an authentication image mechanism
In an embodiment, the present invention includes a method for receiving a request for user authentication of a system, displaying an authentication image on a...
US-9,607,011 Time-shifting image service
Methods and systems may provide for obtaining a query image of a scene, wherein the query image includes embedded information and represents the scene at a time...
US-9,607,002 File retrieval from multiple storage locations
In embodiments, apparatuses, methods and storage media are described that are associated with retrieval of a file stored at multiple storage locations, such as...
US-9,606,961 Instruction and logic to provide vector compress and rotate functionality
Instructions and logic provide vector compress and rotate functionality. Some embodiments, responsive to an instruction specifying: a vector source, a mask, a...
US-9,606,955 Embedded universal serial bus solutions
Techniques for embedded high speed serial interface methods are described herein. The method includes issuing a single-ended one (SE1) signal on each of a pair...
US-9,606,949 Universal scalable system: on-the-fly system performance conversion via PC-on-a-card and USB for smart devices...
A universal interconnection scheme enables system architecture modularization with a hot-pluggable external computing module, such as a PC-on-a-card device...
US-9,606,941 Instruction and logic for a binary translation mechanism for control-flow security
A processor includes a front end, an execution pipeline, and a binary translator. The front end includes logic to receive an instruction and to dispatch the...
US-9,606,940 Methods and apparatus to utilize a trusted loader in a trusted computing environment
An embodiment includes at least one machine readable medium on which is stored code that, when executed enables a system to initialize a trusted loader enclave...
US-9,606,935 Method and apparatus for preventing non-temporal entries from polluting small structures using a transient buffer
A method for preventing non-temporal entries from entering small critical structures is disclosed. The method comprises transferring a first entry from a higher...
US-9,606,931 Indicating a length of an instruction of a variable length instruction set
Some implementations disclosed herein provide techniques and arrangements for indicating a length of an instruction from an instruction set that has variable...
US-9,606,925 Method, apparatus and system for optimizing cache memory transaction handling in a processor
In one embodiment, a processor includes a caching home agent (CHA) coupled to a core and a cache memory and includes a cache controller having a cache pipeline...
US-9,606,919 Method and apparatus to facilitate shared pointers in a heterogeneous platform
A method and apparatus to facilitate shared pointers in a heterogeneous platform. In one embodiment of the invention, the heterogeneous or non-homogeneous...
US-9,606,853 Protecting a memory device from becoming unusable
In an embodiment, a computing device may include a memory device that may be rendered unusable after a certain number of operations are performed on the memory...
US-9,606,847 Enabling error detecting and reporting in machine check architecture
In accordance with embodiments disclosed herein, there is provided systems and methods for detecting and reporting errors in a machine check environment. A...
US-9,606,821 Virtual environment manager for creating and managing virtual machine environments
A virtual environment manager ("VEM") simplifies the usability of virtual machines and provides users with an enhanced design for creating and/or for managing...
US-9,606,797 Compressing execution cycles for divergent execution in a single instruction multiple data (SIMD) processor
In one embodiment, the present invention includes a processor with a vector execution unit to execute a vector instruction on a vector having a plurality of...
US-9,606,770 Multiply add functional unit capable of executing SCALE, ROUND, GETEXP, ROUND, GETMANT, REDUCE, RANGE and CLASS...
A method is described that involves executing a first instruction with a functional unit. The first instruction is a multiply-add instruction. The method...
US-9,606,602 Method and apparatus to prevent voltage droop in a computer
In an embodiment, a processor includes at least one core including a first core. The first core includes memory execution logic to execute one or more memory...
US-9,606,595 Microprocessor-assisted auto-calibration of voltage regulators
Dynamic runtime calibration of a processor with respect to a specific voltage regulator that powers the processor or a memory subsystem coupled to the processor...
US-9,606,589 Expansion card having synergistic cooling, structural and volume reduction solutions
Systems and methods of fabricating circuit board assemblies may provide for a circuit board assembly that includes an expansion card having a first side and a...
US-9,606,175 Reprogramming a port controller via its own external port
Systems and methods may provide for a debug tool including a debug port and a controller including logic to send, via the debug port, a debug mode request to an...
US-9,606,154 Electrical load identification during an on event using a support vector machine classifier
Methods and systems may provide for identifying, and distinguishing between electrical loads using time and frequency domain analysis of at least one property...
US-9,604,210 Controlled fluid delivery in a microelectronic package
A microelectronic package includes a die which may include MEMS and CMOS circuitry for analyzing a fluid. A defined path is provided for channeling fluid to the...
US-9,603,276 Electronic assembly that includes a plurality of electronic packages
Some forms relate to an electronic assembly that includes a plurality of electronic package. The electronic assembly includes a frame and a first electronic...
US-9,603,247 Electronic package with narrow-factor via including finish layer
This disclosure relates generally to an electronic package and methods that include an electrically conductive pad, a package insulator layer including a...
US-9,603,186 Mobility management entity, user equipment and methods for machine type communication
Embodiments of a Mobility Management Entity (MME) to support packet-switched (PS) services in a network in accordance with Evolved Packet System (EPS) bearers...
US-9,603,164 Group carrier scheduling for unlicensed long term evolution network
A user equipment device comprises physical layer circuitry configured to communicate radio frequency (RF) electrical signals directly with one or more separate...
US-9,603,147 Device, system and method of wireless communication over non-contiguous channels
Some demonstrative embodiments include devices, systems and/or methods of wireless communication over non-contiguous channels. For example, a device may include...
US-9,603,140 Resource allocation
Device, system and methods for flexible resource allocation are described. In particular, there is described a user receive a user equipment configured to...
US-9,603,132 Dynamic hybrid automatic repeat request-acknowledgement (HARQ-ACK) transmission with enhanced physical downlink...
Embodiments of a system and method for providing dynamic hybrid automatic repeat request-acknowledgement (HARQ-ACK) transmission with enhanced physical downlink...
US-9,603,104 Techniques for user plane congestion mitigation
Various embodiments are generally directed to improved techniques for UPCON mitigation. In one embodiment, for example, an evolved node B (eNB) may comprise a...
US-9,603,095 Determination of enhanced physical downlink control channel candidates in a wireless communication network
In embodiments, an evolved Node B (eNB) of a wireless communication network may configure an enhanced physical downlink control channel (EPDCCH) physical...
US-9,603,079 Routing for mobile nodes
A route for establishing a wireless connection between a wireless device and a node may be selected based on an estimated duration of the route. The route...
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