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Patent # Description
US-9,495,160 Instruction and logic for processing text strings
Method, apparatus, and program means for performing a string comparison operation. An apparatus includes execution resources to execute a first instruction. In...
US-9,495,159 Two level re-order buffer
In response to detecting one or more conditions are met, a checkpoint of a current state of a thread may be created. One or more incomplete instructions may be...
US-9,495,155 Methods, apparatus, instructions and logic to provide population count functionality for genome sequencing and...
Instructions and logic provide SIMD vector population count functionality. Some embodiments store in each data field of a portion of n data fields of a vector...
US-9,495,153 Methods, apparatus, and instructions for converting vector data
A computer processor includes a decoder for decoding machine instructions and an execution unit for executing those instructions. The decoder and the execution...
US-9,495,103 Read training a memory controller
Provided are a device and computer readable storage medium for programming a memory module to initiate a training mode in which the memory module transmits...
US-9,495,082 Service in support of browser for multi-media content
Methods, apparatuses and storage medium associated with a multi-media service configured to support a browser for rendering multi-media content are disclosed....
US-9,495,017 Computing systems for peripheral control
Embodiments of computing systems, and related methods, are disclosed herein. In some embodiments, a computing system may include a peripheral device (e.g., an...
US-9,495,002 Apparatuses, methods, and systems for providing a dynamic bias voltage to one or more transistors of a transceiver
Embodiments include apparatuses, methods, and systems for providing a dynamic bias voltage to one or more transistors of a transceiver. In embodiments, a...
US-9,495,001 Forcing core low power states in a processor
In an embodiment, a processor includes a plurality of cores each to independently execute instructions, a power delivery logic coupled to the plurality of...
US-9,494,998 Rescheduling workloads to enforce and maintain a duty cycle
In an embodiment, a processor includes a plurality of cores to independently execute instructions, at least one graphics engine to independently execute...
US-9,494,996 Processor having frequency of operation information for guaranteed operation under high temperature events
A processor is described having a semiconductor chip having non volatile storage circuitry. The non volatile storage circuitry has information identifying a...
US-9,494,981 Retractable support mechanism for an electronic device
Particular embodiments described herein provide for an electronic device, such as an accessory to a tablet that includes a first housing. The first housing may...
US-9,494,750 Optical connector assembly
Methods, apparatuses, and systems related to optical connector assemblies are described. In some embodiments, the connector assemblies may include an optical...
US-9,494,736 Technologies for generating a broadband optical output
Technologies for generating a broadband optical output include a plurality of narrowband optical sources formed in a silicon substrate to generate a narrowband...
US-9,494,680 Radar based interpretation of 3D codes
Systems and methods may provide for transmitting an outbound radar signal via an antenna structure and receiving a reflected radar signal via the antenna...
US-9,494,415 Object position determination
In embodiments, apparatuses, methods and storage media for human-computer interaction are described. In embodiments, an apparatus may include one or more light...
US-9,493,340 MEMS devices utilizing a thick metal layer of an interconnect metal film stack
A MEMS device, such as an accelerometer or gyroscope, fabricated in interconnect metallization compatible with a CMOS microelectronic device. In embodiments, a...
US-9,491,881 Microelectronic socket comprising a substrate and an insulative insert mated with openings in the substrate
A microelectronic socket having a two piece construction, wherein a first piece comprises a conductive socket substrate and the second piece comprises an...
US-9,491,797 Methods and systems for multi-directional time preservation distribution in multi-communication core devices
A system and method for the distribution of time signals is available for devices with multiple communication cores. An embodiment may or may not use a...
US-9,491,776 Systems and methods for scheduling communication between wireless devices to reduce interference associated...
Certain embodiments herein relate to scheduling interference between wireless devices in a manner that reduced interference associated with full duplex...
US-9,491,725 User equipment and methods for device-to-device communication over an LTE air interface
Embodiments of a UE to operate in accordance with a device-to-device (D2D) communication mode are disclosed herein. The UE may include hardware processing...
US-9,491,673 Method and apparatus for M2M device subscription
An apparatus may include a processor circuit and a machine type communication (MTC) device setup module operable on the processor circuit to determine when the...
US-9,491,661 Cloud spectrum management system
This disclosure is directed to a cloud spectrum management system. In general, an example cloud spectrum management system may match requests from spectrum...
US-9,491,634 Signal buffering for licensed shared access (LSA) technology
Described herein are technologies related to an implementation of reducing a time cost of accessing a Licensed Shared Access (LSA) during a transmission...
US-9,491,601 Dynamic visual profiles
Systems and methods may provide for identifying one or more phrases in a conversation between a first user and a second user. In addition, a first visual...
US-9,491,524 Leap second support in content timestamps
In embodiments, apparatuses, methods and storage media are described that are associated with support for leap seconds for provision of media content. In...
US-9,491,493 Unified content posting
Methods, apparatuses and systems to provide a unified content posting mechanism.
US-9,491,490 Facilitating environment-based lossy compression of data for efficient rendering of contents at computing devices
A mechanism is described for facilitating environment-based lossy compression of data for efficient rendering of contents at computing devices. A method of...
US-9,491,452 Camera calibration
Techniques for image calibration are described herein. The techniques may include detecting features on a set of images, describing features on the set of...
US-9,491,365 Viewfinder wearable, at least in part, by human operator
A system embodiment may include at least one camera wearable, at least in part, by a human operator. The at least one camera may have, when enabled, at least...
US-9,491,345 Adjustment of flash device based on temperature
A method may be provided that includes sensing a temperature, determining a current of a flash device based on the sensed temperature, and operating the flash...
US-9,491,153 WiFi opportunistic key caching over non-WiFi access
This disclosure describes systems, methods, and computer-readable media related to WiFi opportunistic key caching over non-WiFi access. In some embodiments,...
US-9,490,988 Continuous information transfer with reduced latency
The present disclosure provides systems and methods for remote direct memory access (RDMA) with reduced latency. RDMA allows information to be transferred...
US-9,490,971 Instruction for fast ZUC algorithm processing
Vector instructions for performing ZUC stream cipher operations are received and executed by the execution circuitry of a processor. The execution circuitry...
US-9,490,834 Digital-to-analog converter circuit, an apparatus for providing a radio frequency transmit signal and a method...
A digital-to-analog converter circuit including a plurality of digital-to-analog converter cells is provided. A first digital-to-analog converter cell of the...
US-9,490,825 Adjusting tuning segments in a digitally-controlled oscillator
A circuit may include a digitally-controlled oscillator including a coarse frequency-tuning array with a multiple selectable coarse frequency-tuning segments....
US-9,490,823 Self-biased oscillator
Described herein is a self-biased oscillator. The self-biased oscillator comprises a first differentiator with adjustable resistance or capacitance, the first...
US-9,490,807 Power reducing logic and non-destructive latch circuits and applications
In some embodiments, a logic circuit is provided that has a plurality of gates with gate inputs. Also provided is one or more latch circuits coupled to the...
US-9,490,780 Apparatuses, methods, and systems for dense circuitry using tunnel field effect transistors
Embodiments include apparatuses, methods, and systems for a circuit to shift a voltage level. The circuit may include a first inverter that includes a first...
US-9,490,701 Techniques for reducing switching noise and improving transient response in voltage regulators
Methods and apparatus relating to reducing switching noise and improving transient response in voltage regulators are described. In an embodiment, one or more...
US-9,490,699 Digitally controlled current mode power converter
A current mode converter includes a converter stage comprising a first switch, a second switch, an inductor, and a capacitor, and a digital-to-analog converter...
US-9,490,560 Multi-array bottom-side connector using spring bias
A connector for a multi-array bottom side array is described that uses a spring bias. In one example, a connector includes a connector housing, the connector...
US-9,490,364 Semiconductor transistor having a stressed channel
A process is described for manufacturing an improved PMOS semiconductor transistor. Recesses are etched into a layer of epitaxial silicon. Source and drain...
US-9,490,347 Capping dielectric structures for transistor gates
The present description relates to the field of fabricating microelectronic transistors, including non-planar transistors, for microelectronic devices....
US-9,490,329 Semiconductor devices with germanium-rich active layers and doped transition layers
Semiconductor device stacks and devices made there from having Ge-rich device layers. A Ge-rich device layer is disposed above a substrate, with a p-type doped...
US-9,490,320 Uniaxially strained nanowire structure
Uniaxially strained nanowire structures are described. For example, a semiconductor device includes a plurality of vertically stacked uniaxially strained...
US-9,490,313 Vertical meander inductor for small core voltage regulators
Vertical meander inductors for small core voltage regulators and approaches to fabricating vertical meander inductors for small core voltage regulators are...
US-9,490,240 Film interposer for integrated circuit devices
In one embodiment, a stack device comprising a film interposer of a polyimide film material, for example, is assembled. In accordance with one embodiment of the...
US-9,490,201 Methods of forming under device interconnect structures
Methods of forming microelectronic interconnect under device structures are described. Those methods and structures may include forming a device layer in a...
US-9,490,196 Multi die package having a die and a spacer layer in a recess
Package assemblies for and methods of packaging integrated circuit chips are described. Disclosed package assemblies have spacers and recessed regions...
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