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Patent # Description
US-9,762,791 Production of face images having preferred perspective angles
Techniques are disclosed for identifying preferred orientations of a face in view of various preference factors and for producing a face image having a...
US-9,762,676 Hardware resource access systems and techniques
Systems and techniques for hardware resource access are disclosed herein. In some embodiments, an apparatus may receive, via a stateless protocol message, a...
US-9,762,574 Techniques for providing software support for a hardware component of a computing device
Various embodiments are generally directed to techniques to provide software support for a hardware component incorporated into a computing device with a...
US-9,762,566 Reducing authentication confidence over time based on user history
Technologies are provided in embodiments to manage an authentication confirmation score. Embodiments are configured to identify, in absolute session time, a...
US-9,762,424 Systems, methods, and apparatus for a low rate PHY structure
Certain embodiments of the invention may include systems, methods, and apparatus for a low rate PHY structure. According to an example embodiment of the...
US-9,762,400 Stable probing-resilient physically unclonable function (PUF) circuit
Embodiments include apparatuses, methods, and systems for a physically unclonable function (PUF) circuit. The PUF circuit may include an array of PUF cells to...
US-9,762,375 Selection of acknowledgment timing in wireless communications
Disclosed is a method including communicating, by a mobile device, with a base station via first and second component carriers having different frequency bands...
US-9,762,306 Method, apparatus and system for electrical downtilt adjustment in a multiple input multiple output system
Machine-readable media, methods, apparatus and system for electrical downtilt adjustment in a multiple input multiple output system are disclosed. In some...
US-9,762,241 Physically unclonable function circuit including memory elements
Some embodiments include apparatus and methods using a first ring oscillator, a second ring oscillator, and circuit coupled to the first and second ring...
US-9,761,746 Low voltage avalanche photodiode with re-entrant mirror for silicon based photonic integrated circuits
A low voltage APD is disposed at an end of a waveguide extending laterally within a silicon device layer of a PIC chip. The APD is disposed over an inverted...
US-9,761,724 Semiconductor device structures and methods of forming semiconductor structures
A method of patterning a semiconductor film is described. According to an embodiment of the present invention, a hard mask material is formed on a silicon film...
US-9,761,713 Multi-threshold voltage devices and associated techniques and configurations
Embodiments of the present disclosure describe multi-threshold voltage devices and associated techniques and configurations. In one embodiment, an apparatus...
US-9,761,585 Macro transistor devices
Macro-transistor structures are disclosed. In some cases, the macro-transistor structures have the same number of terminals and properties similar to...
US-9,761,514 Substrate for integrated circuit devices including multi-layer glass core and methods of making the same
Disclosed are embodiments of a substrate for an integrated circuit (IC) device. The substrate includes a core comprised of two or more discrete glass layers...
US-9,761,497 Techniques and configurations to reduce transistor gate short defects
Embodiments of the present disclosure describe techniques and configurations to reduce transistor gate short defects. In one embodiment, a method includes...
US-9,761,298 Method, apparatus and system for responding to a row hammer event
Techniques and mechanisms to facilitate an operational mode of a memory device to prepare for a targeted refresh of a row in memory. In an embodiment, the...
US-9,761,297 Hidden refresh control in dynamic random access memory
Systems, apparatuses and methods may provide a way to reduce and or eliminate contention between refresh operations and read/write operations, and a larger page...
US-9,761,284 Current starved voltage comparator and selector
An apparatus is provided which comprises: a bi-directional switch; and a comparator coupled to the bi-directional switch, the comparator having: a first input...
US-9,761,249 Improving natural language interactions using emotional modulation
Technologies for emotional modulation of natural language responses include a computing device that receives natural language requests from a user. The...
US-9,761,116 Low power voice trigger for finding mobile devices
Systems and methods may provide for monitoring an input audio signal from an onboard microphone of a mobile device while a host processor of the mobile device...
US-9,761,059 Dynamic augmentation of a physical scene
Computer-readable storage media, computing device and methods associated with dynamic modification of a rendering of a physical scene. In embodiments, one or...
US-9,761,049 Determination of mobile display position and orientation using micropower impulse radar
Embodiments are generally directed to determination of mobile display position and orientation using micropower impulse radar. An embodiment of an apparatus...
US-9,761,032 Avatar facial expression animations with head rotation
Apparatuses, methods and storage medium associated with animating and rendering an avatar are disclosed herein. In embodiments, In embodiments, an apparatus may...
US-9,761,001 Filtered shadow mapping
A layered, filtered shadow mapping algorithm may be used for motion blurred shadows. The algorithm is divided into two passes, namely a shadow pass and a...
US-9,760,794 Method and system of low-complexity histrogram of gradients generation for image processing
Techniques for a system, article, and method of low-complexity histogram of gradients generation for image processing may include histogram of gradients...
US-9,760,519 USB device and method for processing data by USB device
A universal serial bus device receives a data packet from a host. The universal serial bus device includes a first virtual device, a second virtual device and a...
US-9,760,435 Apparatus and method for generating common locator bits to locate a device or column error during error...
Provided are an apparatus and method for generating common locator bits to locate a device or column error during error correction operation for a memory...
US-9,760,410 Technologies for fast synchronization barriers for many-core processing
Technologies for multithreaded synchronization including a computing device having a many-core processor. Each processor core includes multiple hardware...
US-9,760,409 Dynamically modifying a power/performance tradeoff based on a processor utilization
In one embodiment, the present invention includes a multicore processor having a power controller with logic to dynamically switch a power management policy...
US-9,760,404 Dynamic tuning of multiprocessor/multicore computing systems
Generally, this disclosure provides systems, devices, methods and computer readable media for dynamic tuning of multiprocessor and multicore computing systems...
US-9,760,373 Functional unit having tree structure to support vector sorting algorithm and other algorithms
An apparatus is described having a functional unit of an instruction execution pipeline. The functional unit has a plurality of compare-and-exchange circuits...
US-9,760,371 Packed data operation mask register arithmetic combination processors, methods, systems, and instructions
A method of an aspect includes receiving a packed data operation mask register arithmetic combination instruction. The packed data operation mask register...
US-9,760,356 Loop nest parallelization without loop linearization
Systems and methods may provide for identifying a nested loop iteration space in user code, wherein the nested loop iteration space includes a plurality of...
US-9,760,338 Direct digital synthesis of signals using maximum likelihood bit-stream encoding
Methods and apparatus are provided for direct synthesis of RF signals using maximum likelihood sequence estimation. An RF digital RF input signal is synthesized...
US-9,760,281 Sequential write stream management
In one embodiment, sequential write stream management is employed to improve the sequential nature of write data placed in a storage such as a solid state...
US-9,760,275 Technologies for skipping through media content
Technologies for interacting with media content on a media consumption device include playing media content in a first display window displayed on a display...
US-9,760,162 Distribution of tasks among asymmetric processing elements
Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate...
US-9,760,160 Controlling performance states of processing engines of a processor
In one embodiment, a processor comprises: a plurality of processing engines including a first processing engine and a second processing engine to independently...
US-9,760,158 Forcing a processor into a low power state
In an embodiment, a processor includes multiple cores and a power controller. The power controller may include a hardware duty cycle (HDC) logic to cause at...
US-9,760,155 Configuring power management functionality in a processor
In one embodiment, a multicore processor includes cores that can independently execute instructions, each at an independent voltage and frequency. The processor...
US-9,760,137 Programmable scalable voltage translator
Methods and apparatus relating to a programmable scalable voltage translator are described. In one embodiment, logic translates an input voltage level into a...
US-9,760,136 Controlling temperature of a system memory
In an embodiment, a processor includes at least one core to execute instructions and a memory controller coupled to the at least one core. In turn, the memory...
US-9,760,117 Enabling stiff plastic chassis with thin metal skins
Particular embodiments described herein provide for an electronic device, such as a notebook computer, laptop, or tablet that includes a circuit board coupled...
US-9,759,768 Delayed authentication debug policy
A chassis platform, such as processor or a system-on-chip (SoC), includes logic to implement a debug chassis security system including a policy generator to...
US-9,759,614 Method and apparatus to determine user presence
According to some embodiments, a method and apparatus are provided to receive a first signal from a sensor, determine that a user is present based on the...
US-9,758,907 Method and apparatus for attaching chip to a textile
Embodiments disclosed herein provide approaches for attaching scan control and other electronic chips to textiles, e.g., on a loom as part of a real-time...
US-9,758,845 Microelectronic substrates having copper alloy conductive route structures
Microelectronic substrates having copper alloy conductive routes to reduce warpage due to differing coefficient of thermal expansion of the components used to...
US-9,756,649 Dynamical time division duplex uplink and downlink configuration in a communications network
A technology is disclosed for a user equipment (UE) that is operable to dynamically change an uplink/downlink (UL/DL) configuration in a communications network....
US-9,756,645 ENB, UE and method for physical resource block allocation in MTC UE
Embodiments allow an eNBs and a target UE to both calculate which resource block groups (RBGs) to use to transmit data. Because the RBGs that will contain...
US-9,756,626 High-efficiency Wi-Fi (HEW) station and access point (AP) and method for signaling of channel resource allocations
Embodiments of a high-efficiency Wi-Fi (HEW) station, access point (AP), and method for communication in a wireless network are generally described herein. In...
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