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Patent # Description
US-1,043,9617 Bidirectional gray code counter
Apparatuses, systems and methods associated with bidirectional Gray code counter design are disclosed herein. In embodiments, a bidirectional Gray code counter...
US-1,043,9599 Non-boolean associative processor degree of match and winner take all circuits
Embodiments include circuits, apparatuses, and systems for non-boolean associative processors. In embodiments, an electronic associative processor circuit may...
US-1,043,9265 Single-package wireless communication device
A method, apparatus and system with an autonomic, self-healing polymer capable of slowing crack propagation within the polymer and slowing delamination at a...
US-1,043,9134 Techniques for forming non-planar resistive memory cells
Techniques are disclosed for forming non-planar resistive memory cells, such as non-planar resistive random-access memory (ReRAM or RRAM) cells. The techniques...
US-1,043,9101 Micro light-emitting diode (LED) elements and display
Micro light-emitting diode (LED) displays and assembly apparatuses are described. In an example, a pixel element for a micro-light emitting diode (LED) display...
US-1,043,9057 Multi-gate high electron mobility transistors and methods of fabrication
A multi-gate high electron mobility transistor (HEMT) and its methods of formation are disclosed. The multi-gate HEMT includes a substrate and an adhesion layer...
US-1,043,8930 Package on package thermal transfer systems and methods
Systems and methods for improving heat distribution and heat removal efficiency in PoP semiconductor packages are provided. A PoP semiconductor package includes...
US-1,043,8926 Method for fabricating a semiconductor and semiconductor package
A method for fabricating a semiconductor chip module and a semiconductor chip package is disclosed. One embodiment provides a first layer, a second layer, and a...
US-1,043,8916 Wire bond connection with intermediate contact structure
Techniques and mechanisms for provide interconnection with integrated circuitry. In an embodiment, a packaged device includes a substrate and one or more...
US-1,043,8915 High density substrate routing in package
Discussed generally herein are devices that include high density interconnects between dice and techniques for making and using those devices. In one or more...
US-1,043,8914 Surface finishes for high density interconnect architectures
An electroless nickel, electroless palladium, electroless tin stack and associated methods are shown. An example method to form a solder bump may include...
US-1,043,8882 Integrated circuit package with microstrip routing and an external ground plane
Described herein are integrated circuit structures having a package substrate with microstrip transmission lines as the top metallization layer, and a ground...
US-1,043,8844 Conformal low temperature hermetic dielectric diffusion barriers
Conformal hermetic dielectric films suitable as dielectric diffusion barriers over 3D topography. In embodiments, the dielectric diffusion barrier includes a...
US-1,043,8812 Anisotropic etching systems and methods using a photochemically enhanced etchant
The systems and methods described herein use at least one etchant and at least one photochemically active material in conjunction with electromagnetic energy...
US-1,043,8659 Method and apparatus for multi-level setback read for three dimensional crosspoint memory
In one embodiment, an apparatus comprises read circuitry to apply a read voltage to a three dimensional crosspoint (3DXP) memory cell; and write setback...
US-1,043,8658 Refresh logic to refresh only memory cells having a first value
Provided is a non-volatile memory device comprising a plurality of memory cells and memory control logic that when executed performs operations comprising...
US-1,043,8656 System and method for performing a concurrent multiple page read of a memory array
A system for facilitating multiple concurrent page reads in a memory array is provided. Memory cells that have multiple programming states (e.g., store multiple...
US-1,043,8640 Apparatus for low power write and read operations for resistive memory
Described are apparatuses for improving resistive memory energy efficiency. An apparatus performs data-driven write to make use of asymmetric write switch...
US-1,043,8588 Simultaneous multi-user audio signal recognition and processing for far field audio
A mechanism is described for facilitating simultaneous recognition and processing of multiple speeches from multiple users according to one embodiment. A method...
US-1,043,8569 Consolidation of data compression using common sectored cache for graphics streams
A mechanism is described for facilitating consolidated compression/de-compression of graphics data streams of varying types at computing devices. A method of...
US-1,043,8566 Display interface partitioning
Various embodiments are generally directed to techniques to partition a display interface such that pixel data associated with display data having indications...
US-1,043,8410 Text enhancements for head-mounted displays
Various systems and methods for implementing text enhancements in augmented reality content presented in a head-mounted display are described herein. A...
US-1,043,8331 Distortion meshes against chromatic aberrations
Systems and methods may provide a plurality of distortion meshes that compensate for radial and chromatic aberrations created by optical lenses. The plurality...
US-1,043,8318 Blind spot rendering optimizations for eye tracking head mounted displays
Embodiments described herein provide for blind spot rendering optimizations for eye tracking head mounted displays. One embodiment provides an apparatus...
US-1,043,8088 Visual-saliency driven scene description
An electronic device for visual-saliency driven scene description is described. The electronic device includes a property identifier to identify properties of a...
US-1,043,7985 Using a second device to enroll a secure application enclave
A method, apparatus, and computer-readable medium are provided to determine whether to enroll a computing device as a provider of a secure application enclave...
US-1,043,7893 Methods, systems and computer program products for using a distributed associative memory base to determine...
Provided are methods, systems, and computer program products that generate a plurality of query queues that correspond to a plurality of row-based identifiers...
US-1,043,7769 Transition-minimized low speed data transfer
A method of transition minimized low speed data transfer is described herein. In an embodiment, a data rate of a set data to be transmitted on a data bus is...
US-1,043,7746 Dynamic bus inversion with programmable termination level to maintain programmable target ratio of ones and...
Dynamic bus inversion (DBI) for programmable levels of a ratio of ones and zeros. A transmitting device identifies a number and/or ratio of ones and zeros in a...
US-1,043,7744 Reconfigurable camera serial interface
Some embodiments include apparatuses and methods using the apparatuses. Some of the apparatuses include a circuit structure that can be configured to operate in...
US-1,043,7739 Low-latency accelerator
Methods, apparatus and associated techniques and mechanisms for reducing latency in accelerators. The techniques and mechanisms are implemented in platform...
US-1,043,7733 Method and apparatus to allow secure guest access to extended page tables
An apparatus and method for efficient guest EPT manipulation. For example, one embodiment of a apparatus comprises: a hypervisor to create extended page table...
US-1,043,7732 Multi-level cache with associativity collision compensation
In an embodiment, a processor includes at least one core and a first cache memory including a first plurality of sets having a first plurality of cache lines...
US-1,043,7731 Multi-level non-volatile cache with selective store
In embodiments, apparatuses, methods and storage media associated with a multi-level cache are described. A first storage level may receive an input/output...
US-1,043,7320 Distribution of tasks among asymmetric processing elements
Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate...
US-1,043,7319 Dynamic core selection for heterogeneous multi-core systems
Dynamically switching cores on a heterogeneous multi-core processing system may be performed by executing program code on a first processing core. Power up of a...
US-1,043,7318 Dynamic core selection for heterogeneous multi-core systems
Dynamically switching cores on a heterogeneous multi-core processing system may be performed by executing program code on a first processing core. Power up of a...
US-1,043,6846 Systems and methods for battery capacity estimation
Systems and methods are disclosed for estimating a full-charge battery cell capacity without a coulomb counting device. First and second measured voltages of...
US-1,043,6838 Automated semiconductor platform testing
The present disclosure is directed to systems and methods for autonomously generating test methods for testing features included on semiconductor platforms. The...
US-1,043,5932 Fastenerless hinge which enables thin form factor low cost design
The present disclosure includes a fastenerless hinge system which enables a thin form factor low cost design. A hinge system described herein may include a...
US-1,043,4653 Movement mapping based control of telerobot
Movement of a user in a user space is mapped to a first portion of a command action stream sent to a telerobot in a telerobot space. An immersive feedback...
US-1,043,4391 Apparatus and methods to track sport implements
Examples are disclosed to track sport implements and/or objects of interest. An example apparatus includes a first coil to generate a first magnetic field...
US-1,043,3421 Reduced capacitance land pad
A land grid array (LGA) land pad having reduced capacitance is disclosed. The conductive portion of a land pad that overlaps a parallel ground plane within the...
US-1,043,3327 Presence service using IMS based DASH service
Technology for distributing presence information by a presence server in an Internet protocol (IP) multimedia subsystem (IMS) based dynamic adaptive streaming...
US-1,043,3302 Apparatus, computer readable medium, and method for multi-user request-to-send and clear-to-send in a high...
Methods, apparatuses, and computer readable media for MU-RTS and CTS in WLANs are disclosed. An apparatus is disclosed that comprises circuitry that is...
US-1,043,3254 Method, system and apparatus of time-division-duplex (TDD) uplink-downlink (UL-DL) configuration management
Some demonstrative embodiments include devices, systems and/or methods of Time-Division Duplexing (TDD) Uplink-Downlink (UL-DL) configuration management. For...
US-1,043,3253 Power management mode transition for wake up receiver
Methods, apparatus, and computer-readable media are described to encode, by a first station, duty cycle timing for transmission to a second station via a...
US-1,043,3239 Cross-layer optimized adaptive HTTP streaming
Briefly, in accordance with one or more embodiments, an application function module interacts with an application on a remote device that utilizes dynamic...
US-1,043,3199 Reporting techniques for reference signal received quality (RSRQ) measurements
Reporting techniques for reference signal received quality (RSRQ) measurements are described. In one embodiment, for example, user equipment (UE) may comprise...
US-1,043,3109 Apparatus, system and method of performing a position measurement
Some demonstrative embodiments include apparatuses, systems and/or methods of performing a range measurement. For example, a first wireless communication device...
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