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Patent # Description
US-1,014,1071 Predictive count fail byte (CFBYTE) for non-volatile memory
Methods and apparatus related to predictive Count Fail Byte (CFBYTE) for non-volatile memory are described. In one embodiment, logic determines a number of...
US-1,014,0750 Method, display adapter and computer program product for improved graphics performance by using a replaceable...
It is presented a method for improving performance of generation of digitally represented graphics. Said method comprises the steps of: selecting (440) a tile...
US-1,014,0732 Method and apparatus for efficient texture compression
An apparatus and method are described for texture compression. For example, one embodiment of a method comprises: determining a distance between each of a...
US-1,014,0721 Mechanical system on computer with rotational projector and Realsense.TM. camera
Methods and apparatus relating to a mechanical system on computer with rotational projector and RealSense.TM. camera are described. In an embodiment, a device...
US-1,014,0679 Smart composition of output layers
Device performance and battery life may be increased by prioritizing access to the display controller hardware overlay support such that the layer(s) placing...
US-1,014,0678 Specialized code paths in GPU processing
Techniques to improve graphics processing unit (GPU) performance by introducing specialized code paths to process frequent common values are described. A shader...
US-1,014,0522 Fully convolutional pyramid networks for pedestrian detection
A fully convolutional pyramid network and method for object (e.g., pedestrian) detection are disclosed. In one embodiment, the object detection system is a...
US-1,014,0474 Techniques for context information management
Improved techniques for context information management are described. In one embodiment, for example, an apparatus may comprise a processor element, a selection...
US-1,014,0458 Parallelized authentication encoding
A processing system implementing techniques for parallelized authentication encoding is provided. In one embodiment, the processing system includes an...
US-1,014,0457 Secure input/output device management
Embodiments of apparatus and methods for secure I/O device management are disclosed. In an embodiment, an apparatus includes a processor and an I/O controller....
US-1,014,0449 Cluster anomaly detection using function interposition
Systems and methods may provide for identifying a runtime behavioral pattern of an application and detecting an anomaly in the runtime behavioral pattern. In...
US-1,014,0240 Control messaging in multislot link layer flit
A link layer control message is generated and included in a flit that is to be sent over a serial data link to a device. The flits sent over the data link are...
US-1,014,0213 Two level memory full line writes
A memory controller receives a memory invalidation request that references a line of far memory in a two level system memory topology with far memory and near...
US-1,014,0210 Method and apparatus for cache occupancy determination and instruction scheduling
An apparatus and method for determining whether data needed for one or more operations is stored in a cache and scheduling the operations for execution based on...
US-1,014,0138 Methods, systems and apparatus for supporting wide and efficient front-end operation with guest-architecture...
Methods for supporting wide and efficient front-end operation with guest architecture emulation are disclosed. As a part of a method for supporting wide and...
US-1,014,0129 Processing core having shared front end unit
A processor having one or more processing cores is described. Each of the one or more processing cores has front end logic circuitry and a plurality of...
US-1,014,0056 Systems and methods for differentiating function performance by input parameters
Systems and method are disclosed for monitoring processor performance. Embodiments described relate to differentiating function performance by input parameters....
US-1,014,0046 Supporting data compression using match scoring
A processing system is provided that includes a memory for storing an input bit stream and a processing logic, operatively coupled to the memory, to generate a...
US-1,013,9895 Techniques to maintain power for a fundamental function on a device
Various embodiments are generally directed to an apparatus, method and other techniques to determine a threshold value of power for a fundamental function for a...
US-1,013,9889 Method, apparatus, and system for improving resume times for root ports and root port integrated endpoints
A system on a chip (SoC) is provided with a multicore processor, a level-2 (L2) cache controller, an L2 cache, an integrated memory controller, and a serial...
US-1,013,9832 Computer-assisted or autonomous driving with region-of-interest determination for traffic light analysis
Apparatuses, methods and storage medium associated with determining a ROI for traffic light analysis for CA/AD are disclosed herein. In embodiments, a system...
US-1,013,9445 High speed I/O pinless structural testing
A technical solution for improving test times and costs associated with IC production includes a central test engine (CTE) functional test block integrated onto...
US-1,013,9438 Apparatus and method for calibrating high speed serial receiver analog front end and phase detector
An apparatus is provided which comprises: an amplifier; a first slicer coupled to the amplifier; a de-serializer coupled to an output of the first slicer; a...
US-1,013,9232 Heading estimation for determining a user's location
Technologies for determining a user's location by a mobile computing device include detecting, based on sensed inertial characteristics of the mobile computing...
US-D834,655 Drone control device
US-1,013,6516 Microelectronic device attachment on a reverse microelectronic package
The present description relates to the field of fabricating microelectronic structures. The microelectronic structure may include a microelectronic substrate...
US-1,013,6447 Signaling for inter-cell D2D discovery in an LTE network
Embodiments of an enhanced node B (eNB), user equipment (UE) and methods of signaling for proximity services and device-to-device (D2D) discovery in an LTE...
US-1,013,6368 Handover at spectrum release for licensed shared access
Embodiments of Evolved Node-B (eNBs), user equipment (UE) and methods for licensed shared access (LSA) handover are generally described herein. An eNB includes...
US-1,013,5954 Access dock device content on a remote client device wirelessly
Apparatuses, methods and storage medium associated with accessing dock device content on a remote client device wirelessly are disclosed herein. In embodiments,...
US-1,013,5828 Technologies for secure server access using a trusted license agent
Technologies for secure server access include a client computing device that loads a license agent into a secure enclave established by a processor of the...
US-1,013,5825 Protecting supervisor mode information
Embodiments of an invention for protecting supervisor mode information are disclosed. In one embodiment, an apparatus includes a storage location, instruction...
US-1,013,5730 Methods, apparatuses, and systems for retrieving data from a wireless local area network (WLAN) access point
Methods, apparatuses, and systems are described related to retrieving data from a wireless local area network (WLAN) access point (AP). In embodiments, an...
US-1,013,5711 Technologies for sideband performance tracing of network traffic
Technologies for tracing network performance include a network computing device configured to receive a network packet from a source endpoint node, process the...
US-1,013,5708 Technologies for performance inspection at an endpoint node
Technologies for monitoring communication performance of a high performance computing (HPC) network include a performance probing engine of a source endpoint...
US-1,013,5622 Flexible provisioning of attestation keys in secure enclaves
A computing platform implements one or more secure enclaves including a first provisioning enclave to interface with a first provisioning service to obtain a...
US-1,013,5586 Reference signal enhancement for shared cell
In embodiments, apparatuses, methods, and storage media may be described for distinguishing, by a user equipment (UE), a reference signal (RS) transmitted by a...
US-1,013,5563 Triggering of an uplink pair of packets in a wireless local area network
Apparatuses, methods, and computer readable media for triggering of an uplink pair of packets in a wireless local area network. An apparatus is disclosed...
US-1,013,5530 Techniques for optical wireless communication
Optical wireless communication techniques are described and claimed. In one embodiment, the disclosure relates to method and apparatus to provide optical...
US-1,013,5515 Antenna beam training and tracking protocol for 60 GHz operation
A particular communications protocol is used for antenna training to accomplish directional communications in a wireless communications network. In some...
US-1,013,5494 Connection and synchronization with a device in a non-active state based on near field communication
Technologies for one-tap connection and synchronization with a device in a non-active state are disclosed. When a user brings a first device enabled for Near...
US-1,013,5481 Radio frequency shielding within a semiconductor package
Radio frequency shielding within a semiconductor package is described. In one example, a multiple chip package has a digital chip, a radio frequency chip, and...
US-1,013,5463 Method and apparatus for accelerating canonical huffman encoding
In one embodiment, an apparatus comprises a memory; and a compression engine comprising circuitry, the compression engine to assign weights to a plurality of...
US-1,013,5461 Systems, methods, and apparatuses for decompression using hardware and software
Detailed herein are embodiments of systems, methods, and apparatuses for decompression using hardware and software. In hardware, an input buffer stores incoming...
US-1,013,5240 Stacked switch circuit having shoot through current protection
An apparatus is described. The apparatus includes a stacked switch circuit having protection circuitry to prevent shoot through current when the switch is in an...
US-1,013,4809 Dual-layer dielectric in memory device
Embodiments of the present disclosure describe techniques and configurations for a memory device comprising a memory array having a plurality of wordlines...
US-1,013,4758 Memory devices and systems having reduced bit line to drain select gate shorting and associated methods
3D NAND memory devices and systems having reduced bit line to drain select gate shorting, including associated methods, are provided and described.
US-1,013,4727 High breakdown voltage III-N depletion mode MOS capacitors
III-N high voltage MOS capacitors and System on Chip (SoC) solutions integrating at least one III-N MOS capacitor capable of high breakdown voltages (BV) to...
US-1,013,4716 Multi-package integrated circuit assembly with through-mold via
A multi-package integrated circuit assembly can include a first electronic package having a first package substrate including a first die side and a first...
US-1,013,4690 Floating package stiffener
Embodiments herein may relate to a package with one or more layers. A silicon die may be coupled with the one or more layers via an adhesive. A package...
US-1,013,4656 Package integrated synthetic jet device
Embodiments include a synthetic jet device formed within layers of a package substrate, such as to provide a controlled airflow for sensing or cooling...
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