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Providing high availability in a PCI-Express.TM. link in the presence of
A method, device, and system are disclosed. In one embodiment, the method comprises discovering a failure on a PCI Express interconnect, determining whether a...
Method and apparatus for testing mathematical algorithms
A method and apparatus for testing mathematical programs where code coverage is exceedingly difficult to hit with random data test vectors (probability...
Method and apparatus for dynamic voltage and frequency scaling
A machine learning technique is used to improve dynamic prediction of processor utilization for multi-threaded user-level applications in a dynamic run-time...
Software assisted nested hardware transactions
A method and apparatus for efficiently executing nested transactions is herein described. Hardware support for execution of transactions is provided....
System and method for storing immediate data
An article comprising an instruction stored on a storage medium. The instruction includes opcode field storing an opcode signal and an operand field storing an...
Adaptive range snoop filtering methods and apparatuses
Snoop filtering methods and apparatuses for systems utilizing memory are contemplated. Method embodiments comprise receiving a request for contents of a memory...
Adaptively reducing memory latency in a system
In one embodiment, the present invention includes a method for routing an early request for requested data on a bypass path around a transaction processing path...
Opportunistic transmission of software state information within a link
based computing system
A method is described that involves determining that software state information of program code is to be made visible to a monitoring system. The method also...
Data buffer management in a resource limited environment
An apparatus and method is provided to facilitate Input/Output (I/O) transfer in resource limited storage environment. Scatter gather list, segment and memory...
LAN controller with bootable host bus adapter
A network controller with a bootable Host Bus Adapter, particularly suitable for iSCSI applications is described. In one example, this includes, a host bus...
OS agnostic resource sharing across multiple computing platforms
Methods, apparatus, and systems for sharing resources across a plurality of computing platforms. Firmware provided on each platform is loaded for operating...
Reducing interference from closely proximate wireless units
A wireless device may include two or more wireless interfaces capable of transmitting and/or receiving signals over separate wireless networks. To reduce the...
Private base station with exclusivity
A private base station (PBS) configured to connect to the Internet and establish a small area of wireless coverage includes an exclusivity database allowing...
Signal-to-noise ratio (SNR) determination in the frequency domain
A technique for modifying communication operational parameters using fast, low complexity, accurately calculated SNR values. Techniques may improve upon prior...
Controlling a bias voltage for a Mach-Zehnder modulator
In one embodiment, the present invention includes a controller coupled to an optical modulator to receive a dither signal, determine a difference between the...
Digital outphasing transmitter architecture
Architectures including digital outphasing transmitters. Digital signal generation circuitry generates at least two base-band sinusoid signals. Bandpass...
Codebook indexing to achieve high bit densities in a direct-sequence CDMA
spread spectrum communication system
Apparatuses for achieving high bit densities in a direct-sequence CDMA spread spectrum communication system are disclosed. A table of orthogonal pseudo-noise...
Surface emitting laser with an integrated absorber
A surface emitting laser (SEL) with an integrated absorber. A lower mirror and an output coupler define a laser cavity of the SEL. A monolithic gain structure...
Receiving signals on a channel used for traffic and access in a
Embodiments of the present invention can be used to efficiently receive access control and traffic information. In one embodiment, the invention includes...
Determining whether a transmission signal block was fully transmitted
based on bit error probability
Methods, apparatuses, and systems to determine whether a transmission signal block was fully transmitted are described herein. The determination may be made at...
Program acceleration of a memory device
Selective program acceleration of a memory device is generally described. A method includes applying a first bias voltage to one or more bit lines coupled with a...
Reduced signal level support for memory devices
Embodiments of the invention are generally directed to systems, methods, and apparatuses for reduced signal level support for memory devices. In some...
Removable package underside device attach
In some embodiments, a stacked package assembly may include a first socket defining an interior cavity, a first semiconductor device coupled to the first socket,...
Signal transition feature based coding for serial link
Signal transition feature based coding for serial link is described herein. According to one embodiment, in response to a data stream transmitted onto a serial...
Power supply circuit for a phase-locked loop
A power supply circuit includes a first voltage regulator to generate a first supply voltage for a first circuit of a phase-locked loop and a second voltage...
Method and apparatus for forming metal-metal oxide etch stop/barrier for
integrated circuit interconnects
Described is a method and apparatus for forming interconnects with a metal-metal oxide electromigration barrier and etch-stop. In one embodiment of the...
Forming vias using sacrificial material
In one embodiment, the present invention includes a method for forming a sacrificial material layer, patterning it to obtain a first patterned sacrificial...
Fabrication of germanium nanowire transistors
In general, in one aspect, a method includes using the Germanium nanowire as building block for high performance logic, memory and low dimensional quantum effect...
Reactive gettering in phase change solders to inhibit oxidation at contact
A method for forming a high thermal conductivity heat sink to IC package interface is disclosed. The method uses reactive getter materials added to a two phase...
Microelectronic package interconnect and method of fabrication thereof
A method of interconnecting and an interconnect is provided to connect a first component and a second component of an integrated circuit. The interconnect...
Reducing stress in a flip chip assembly
In one embodiment, the present invention includes a method for depositing lead-free bumps on a package substrate, depositing an alloy material on the lead-free...
Discouraging unauthorized redistribution of protected content by
cryptographically binding the content to...
In one aspect of the invention is a method for discouraging unauthorized redistribution of protected content. Content is bound to a customer I.D. associated with...
Processor control register virtualization to minimize virtual machine
Writing a control flag in a processor control register by a guest virtual machine. Determine whether the control flag is owned by the guest virtual machine....
Method and system for reducing program code size
In a method for reducing code size, replaceable subsets of instructions at first locations in areas of infrequently executed instructions in a set of...
Merger of tables storing protocol data unit related data
In general, in one aspect, the disclosure describes a method of determining if a first query for data related to a protocol data unit in a first table is a query...
Providing a moat capacitance
In one embodiment, the present invention includes an apparatus having core logic formed on a die, input/output (IO) buffers surrounding the core logic, and a...
Method and system for fast frequency switch for a power throttle in an
In one embodiment, the present invention includes a counter to count core clocks, where the counter has a value to be incremented from zero to one less than a...
Termination techniques for bus interfaces
Techniques involving the transfer of signals across interconnection media are disclosed. For instance, an apparatus may include an apparatus having an...
Low power subsystem for portable computers
An embedded subsystem is coupled to a shared database is synchronized with the notebook and has access to the hard drive. The subsystem is in operation when the...
Methods and apparatus to perform power management in processor systems
Methods of performing power management of a processor are disclosed. One example method includes obtaining a plurality of operating parameters related to the...
Power aware software pipelining for hardware accelerators
Forming a plurality of pipeline orderings, each pipeline ordering comprising one of a sequential, a parallel, or a sequential and parallel combination of a...
Launching a secure kernel in a multiprocessor system
In one embodiment of the present invention, a method includes verifying an initiating logical processor of a system; validating a trusted agent with the...
Hardware acceleration for a software transactional memory system
A method and apparatus for accelerating transactional execution. Barriers associated with shared memory lines referenced by memory accesses within a transaction...
Dynamic quality of service (QoS) for a shared cache
In one embodiment, the present invention includes a method for associating a first priority indicator with data stored in a first entry of a shared cache memory...
Dual use for data valid signal in non-volatile memory
In some types of non-volatile memory devices, the same signal from a memory device may be used for two purposes: During a read operation, the signal may be used...
Methods and apparatus for generating system management interrupts
A method includes determining a plurality of memory addresses, each memory address being different from one another. The method further includes generating a...
System and method for cryptography processing units and multiplier
In general, in one aspect, the disclosure describes a system including multiple programmable processing units, a dedicated hardware multiplier, and at least one...
Enabling and disabling device images on a platform without disrupting BIOS
Device images, for example IDE mass storage device images, may be enabled and disabled without disrupting a host system. In one embodiment, the invention...
Methods and apparatus for supporting agile run-time network systems via
identification and execution of most...
Methods and apparatus for supporting agile run-time network systems via identification and execution of most efficient application binary code in view of...
Method and apparatus for computing matrix transformations
A method and apparatus for performing matrix transformations including multiply-add operations and byte shuffle operations on packed data in a processor. In one...