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Patent # Description
US-7,758,238 Temperature measurement with reduced extraneous infrared in a processing chamber
Temperature measurement using a pyrometer in a processing chamber is described. The extraneous light received by the pyrometer is reduced. In one example, a...
US-7,757,363 Support system for semiconductor wafers
A semiconductor wafer may be secured to a wafer support system by causing a supported surface of the semiconductor wafer to be at a lower gas pressure than an...
US-7,757,238 Task switching with a task containing code region to adjust priority
Briefly, techniques to reduce the impact of interrupts and swaps on the completion time of tasks. In an embodiment, a code segment within a task adjusts the...
US-7,757,231 System and method to deprivilege components of a virtual machine monitor
In some embodiments, the invention involves a system to deprivilege components of a virtual machine monitor and enable deprivileged service virtual machines...
US-7,757,222 Generating efficient parallel code using partitioning, coalescing, and degenerative loop and guard removal
Code is affine partitioned to generate affine partitioning mappings. Parallel code is generated based on the affine partitioning mappings. Generating the...
US-7,757,221 Apparatus and method for dynamic binary translator to support precise exceptions with minimal optimization...
A method and apparatus for dynamic binary translator to support precise exceptions with minimal optimization constraints. In one embodiment, the method includes...
US-7,757,103 Method and apparatus to estimate energy consumed by central processing unit core
Briefly, a processor and a method of estimating an active energy consumption of two or more cores of a processor based on dispatching micro operations to one or...
US-7,757,098 Method and apparatus for verifying authenticity of initial boot code
A programmable processor initializes its state, then computes and verifies a hash of a boot code region of memory before executing any user instructions in the...
US-7,757,081 Launching a secure kernel in a multiprocessor system
In one embodiment of the present invention, a method includes verifying an initiating logical processor of a system; validating a trusted agent with the...
US-7,757,065 Instruction segment recording scheme
In a front-end system for a processor, a recording scheme for instruction segments stores the instructions in reverse program order. Instruction segments may be...
US-7,757,046 Method and apparatus for optimizing line writes in cache coherent systems
A method and apparatus for optimizing line writes in cache coherent systems. A new cache line may be allocated without loading data to fill the new cache line...
US-7,757,045 Synchronizing recency information in an inclusive cache hierarchy
In one embodiment, the present invention includes a method for receiving a cache access request for data present in a lower-level cache line of a lower-level...
US-7,757,035 Method for optimizing virtualization technology and memory protections using processor-extensions for page...
In a virtualized processor based system causing a transition to a virtual machine monitor executing on the processor based system in response to a modification...
US-7,757,020 Point-to-point link negotiation method and apparatus
Point-to-point links between devices are brought up at a slowest available speed, and a faster link speed is negotiated after reaching an operational state.
US-7,756,947 Apparatus, systems, and methods to support service calls in an electronic service network
In an embodiment, an apparatus, method, and/or system support a service request made by a computer user in an Internet cafe or similar electronic service...
US-7,756,509 Methods and apparatus for providing an access profile system associated with a broadband wireless access network
Embodiments of methods and apparatus for providing an access profile system associated with a broadband wireless access network are generally described herein....
US-7,756,495 High speed receiver
In one embodiment, a receiver includes a voltage margin controller, a set of first components coupled to the voltage margin control, and a set of offset...
US-7,756,471 Systems and methods for multi-element antenna arrays with aperture control shutters
Embodiments include systems and methods for controlling beam direction of an array of antenna elements in a wireless communications system. In one embodiment,...
US-7,756,208 Multicarrier communication system and methods for communicating with subscriber stations of different bandwidth...
A multicarrier base station communicates with subscriber stations of different bandwidth profiles by allocating time slots in downlink and uplink frames and...
US-7,756,103 Device, system and method of adjustment of a delivery mechanism according to access categories
Embodiments of the invention provide devices, systems and methods of selecting one or more power save parameters of a wireless device according to an expected...
US-7,756,053 Memory agent with error hardware
A memory agent that communicates with another memory agent over links may include error hardware to monitor errors in the links. In some embodiments, the error...
US-7,755,881 Modular server architecture with Ethernet routed across a backplane utilizing an integrated Ethernet switch module
A modular server system includes a midplane having a system management bus and a plurality of blade interfaces on the midplane. The blade interfaces are in...
US-7,755,650 Illumination modulation technique
A technique includes pulse width modulating an illuminating beam of a light to establish a pixel intensity and modulating the illuminating beam to create...
US-7,755,628 Method and apparatus for multi-level ray tracing
A method, apparatus, and system related to thermal management. The method includes generating a beam including a group of rays; evaluating the beam against a...
US-7,755,186 Cooling solutions for die-down integrated circuit packages
Systems for cooling the backside of a semiconductor die located in a die-down integrated circuit (IC) package are described. The IC package is attached to the...
US-7,755,165 iTFC with optimized C(T)
A method including depositing a suspension of a colloid comprising an amount of nano-particles of a ceramic material on a substrate; and thermally treating the...
US-7,755,140 Process charging and electrostatic damage protection in silicon-on-insulator technology
A SOI device features a conductive pathway between active SOI devices and a bulk SOI substrate. The conductive pathway provides the ability to sink ...
US-7,755,124 Laminating magnetic materials in a semiconductor device
A technique includes forming overlaying magnetic metal layers over a semiconductor substrate. The technique includes forming at least one resistance layer...
US-7,755,082 Forming self-aligned nano-electrodes
A nano-electrode or nano-wire may be etched centrally to form a gap between nano-electrode portions. The portions may ultimately constitute a single electron...
US-7,754,552 Preventing silicide formation at the gate electrode in a replacement metal gate technology
A hard mask may be formed and maintained over a polysilicon gate structure in a metal gate replacement technology. The maintenance of the hard mask, such as a...
US-7,752,635 System and method for configuring a virtual network interface card
A system includes an interface device that executes a driver and a processing device that executes instructions to implement a virtual machine, and to implement...
US-7,752,613 Disambiguation in dynamic binary translation
A method and apparatus for disambiguating in a dynamic binary translator is described. The method comprises selecting a code segment for load-store memory...
US-7,752,611 Speculative code motion for memory latency hiding
Various embodiments that may be used in performing speculative code motion for memory latency hiding are disclosed. One embodiment comprises extracting an...
US-7,752,520 Apparatus and method capable of a unified quasi-cyclic low-density parity-check structure for variable code...
An embodiment of the present invention provides an apparatus, comprising a transceiver capable of a unified quasi-cyclic low-density parity-check structure for...
US-7,752,473 Providing a deterministic idle time window for an idle state of a device
In one embodiment, the present invention includes a method for receiving at a target device a request for a deterministic idle window from an initiator device...
US-7,752,468 Predict computing platform memory power utilization
A method is to include implementing at least one statistical prediction model to predict memory power utilization and reduce power consumption for a computing...
US-7,752,436 Exclusive access for secure audio program
Executing a monitor on a platform, the monitor capable of providing exclusive, secure access to an audio I/O device of the platform, executing a first partition...
US-7,752,428 System and method for trusted early boot flow
In some embodiments, the invention involves extending trusted computing environments to the boot firmware. In at least one embodiment, the present invention is...
US-7,752,423 Avoiding execution of instructions in a second processor by committing results obtained from speculative...
A device is presented including a first processor and a second processor. A number of memory devices are connected to the first processor and the second...
US-7,752,411 Chips providing single and consolidated commands
In some embodiments, a chip includes a link interface, monitoring circuitry to provide an activity indicator that is indicative of activity of the chip, and...
US-7,752,397 Repeated conflict acknowledgements in a cache coherency protocol
In a cache coherency protocol multiple conflict phases may be utilized to resolve a data request conflict condition. The multiple conflict phases may avoid...
US-7,752,030 Virtualization as emulation support
A processor based system including a processor and a storage subsystem communicatively coupled with the processor, an operating system stored in the storage...
US-7,751,994 Intelligent battery safety management system configured to compare collected operational data with reference...
A method and apparatus for intelligent battery safety management. Some embodiments of a method for managing battery operation may include receiving a battery...
US-7,751,858 Sleep-mode statistics apparatus, systems, and methods
Embodiments of sleep-mode statistics apparatus, systems, and methods are described generally herein. Other embodiments may be described and claimed.
US-7,751,854 Null deepening for an adaptive antenna based communication station
A method and apparatus is described for modifying a smart antenna processing strategy determined from a set of signals received at an array of antenna elements...
US-7,751,794 Apparatus, system and method capable of integrating a cellular phone stack in an extended firmware interface...
An embodiment of the present invention provides an apparatus, comprising a wireless device capable of integrating a cellular phone stack in an extended firmware...
US-7,751,777 System and method for transmitting data in a communication network
Disclosed is a system and method for transmitting data from a first base station to a first destination subscriber station (DSS). The first base station is...
US-7,751,719 Electrical generation of return-to-zero (RZ) data pattern with flexible duty cycle adjustment for optical...
An electrical return to zero (RZ) encoder converts non-return to zero (NRZ) data, into of RZ data patterns with a flexibility for duty cycle adjustment so that...
US-7,751,589 Three-dimensional road map estimation from video sequences by tracking pedestrians
Estimation of a 3D layout of roads and paths traveled by pedestrians is achieved by observing the pedestrians and estimating road parameters from the...
US-7,751,584 Method to provide transparent information in binary drivers via steganographic techniques
Methods for providing and extracting hidden information in firmware images using steganographic processes. Information is hidden in binary firmware images, such...
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