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Patent # Description
US-7,907,661 Testability technique for phase interpolators
A method and circuit for testing phase interpolators is provided. The method performs a sweep over a phase interpolator delay range and detects if the phase...
US-7,907,611 Payload header suppression with conditional field suppression
A conditional payload header suppression is disclosed to improve compression, by providing the flexibility to dynamically introduce fields/header bytes, which...
US-7,907,601 Apparatus and method for computer controlled call processing and information provision
A method and apparatus are presented for transmitting, from an application computer in communication with a gatekeeper which is connected to a data network,...
US-7,907,572 Collocated radio coexistence method
A collocated radio coexistence method is disclosed. The method operates in the frequency domain to protect WiMAX downlink traffic from narrow band interference...
US-7,907,540 Relays in wireless communication networks
Methods and apparatus for transmitting packets in wireless communication networks are disclosed. The methods include a relay mobile station measuring channel...
US-7,907,418 Circuit board including stubless signal paths and method of making same
A circuit board may include first and second sides, a plurality of circuit board layers between the sides, and a plurality of signal traces located in respective...
US-7,907,210 Video de-interlacing with motion estimation
A method includes determining a lowest-score interpolation direction among a plurality of interpolation directions. The method further includes calculating a...
US-7,907,138 System co-processor
Embodiments of the invention provide assigning two different class identifiers to a device to allow loading to an operating system as different devices. The...
US-7,907,029 Modulator
A modulator includes a first converter, a second converter and a mixer. The first converter is configured to receive a first bit and provide a first current that...
US-7,907,018 Phase noise minimized phase/frequency-locked voltage-controlled oscillator circuit
A phase noise minimization circuit is disclosed, to be used in a voltage-controlled oscillator (VCO) circuit embedded in a feedback system. The phase noise...
US-7,907,008 Dynamic signal contamination suppression
A self-configurable amplifier and method of amplification, including an RF signal level detector having an input connected to an RF signal, and an output...
US-7,906,947 Microprocessor die with integrated voltage regulation control circuit
An integrated circuit die includes a microprocessor and a control circuit to control elements of a voltage regulator to supply power to the microprocessor.
US-7,906,843 Substrate having a functionally gradient coefficient of thermal expansion
A substrate and a method of making a substrate having a functionally gradient coefficient of thermal expansion are described herein. A system having a silicon...
US-7,906,376 Magnetic particle-based composite materials for semiconductor packages
A semiconductor package is described. The semiconductor package includes a substrate and an integrated heat spreader disposed above and coupled with the...
US-7,906,369 Memory and access device and method therefor
Briefly, in accordance with an embodiment of the invention, a memory and a method to manufacture the memory is provided. The memory may include a phase change...
US-7,906,196 Blocking strip for die storage media
A die storage method and apparatus comprising a cover tape and a strip coupled to the cover tape wherein the strip comprises a material that is: flexible or...
US-7,906,170 Apparatus, method, and system capable of producing a moveable magnetic field
An apparatus capable of producing a moveable magnetic field includes a moveable support structure (110) and a magnetic field source (120) supported by the...
US-7,906,026 Sieving media from planar arrays of nanoscale grooves, method of making and method of using the same
Disclosed herein are an apparatus and a method for separating molecules on the basis of size and or structure, and to a method of making the apparatus....
US-7,904,907 Processing architecture having passive threads and active semaphores
Multiple parallel passive threads of instructions coordinate access to shared resources using "active" semaphores. The semaphores are referred to as active...
US-7,904,903 Selective register save and restore upon context switch using trap
In some embodiments, the invention involves saving limited context information when transitioning between virtual machines. A predetermined set of instructions...
US-7,904,881 Using a virtual stack for fast and composable stack cutting
Embodiments of a system and method for facilitating the use of stack cutting to be used in programming languages in a safe fashion even when composed with...
US-7,904,879 Reorganized storing of applications to improve execution
Storing an application onto a system includes receiving the application, determining specifications of the system, and reorganizing the application in accordance...
US-7,904,779 Forward error correction and automatic repeat request joint operation for a data link layer
A method and apparatus are provided for error correction of a communication signal. Joint operation of forward error correction (FEC) techniques and automatic...
US-7,904,758 System, method and apparatus for tracing source of transmission error
A method and apparatus for identifying a device associated with a transmission error. The method generally comprising including a device identification...
US-7,904,751 System abstraction layer, processor abstraction layer, and operating system error handling
Systems and methods for error handling are disclosed. The systems and methods may be utilized for single or multiple processor computer systems to handle errors...
US-7,904,701 Activating a design test mode in a graphics card having multiple execution units to bypass a host cache and...
Provided are a method and system for activating a design test mode in a graphics card having multiple execution units. A design test mode is activated in a...
US-7,904,696 Communication paths for enabling inter-sequencer communication following lock competition and accelerator...
In one embodiment, the present invention includes a method for communicating an assertion signal from a first instruction sequencer to a plurality of...
US-7,904,694 Maintaining processor resources during architectural events
In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second...
US-7,904,580 Digital media player exposing operational state data
A software based digital media player that provides component interfaces allowing inspection, testing and manipulation of operational state data between the...
US-7,904,323 Multi-team immersive integrated collaboration workspace
A collaborate workspace offers a set of integrated components. Within a project, users may view avatars representing other team members, view the current...
US-7,903,645 Methods, apparatus and systems configured for heterogeneous secure associations in Wi-Fi PAN
An embodiment of the present invention provides a method for heterogeneous secure associations in Wireless Fidelity Personal Area Networks (WiFi PAN), comprising...
US-7,903,560 Correlation technique for determining relative times of arrival/departure of core input/output packets within a...
A method is described that comprises receiving a timing exposure packet having timestamp information. The timestamp information identifies a cycle of a clock...
US-7,903,555 Packet tracing
A method of packet tracing includes triggering tracer devices. Each tracer device corresponds to an associated processing stage within a packet processor. The...
US-7,903,552 Directional and priority based flow control mechanism between nodes
A node uses a two dimensional array of transmit queues to store frames to be transmitted from the node to another node. The size of the array is governed by the...
US-7,903,538 Technique to select transmission parameters
Various embodiments are described to select or adjust transmission parameters in a multicarrier system wherein one or more transmission parameters are selected...
US-7,903,502 Automatic read of current time when exiting low-power state utility
A method and apparatus is described for computing a duration of a reduced power consumption state. A time of exiting from the reduced power consumption state is...
US-7,903,495 Selectively controlled memory
Embodiments of methods, apparatuses, and systems that enable power conservation in data buffering components are disclosed. Other embodiments may also be disclosed.
US-7,903,476 Systems and techniques for non-volatile memory buffering
An apparatus, system, method, and article for non-volatile memory buffering are described. The apparatus may include a data storage manager to store a data item...
US-7,902,675 Capillary underfill of stacked wafers
A plurality of wafers are aligned and stacked on a thermally variable rotary table, the table and stack are rotated, and an underfill material is disposed and...
US-7,902,617 Forming a thin film electric cooler and structures formed thereby
Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a first plurality of openings through a first surface...
US-7,902,060 Attachment using magnetic particle based solder composites
Electronic devices and methods for fabricating electronic devices are described. One method includes providing a first body with a plurality of composite bumps...
US-7,902,058 Inducing strain in the channels of metal gate transistors
In a metal gate replacement process, strain may be selectively induced in the channels of NMOS and PMOS transistors. For example, a material having a higher...
US-7,902,014 CMOS devices with a single work function gate electrode and method of fabrication
Described herein are a device utilizing a gate electrode material with a single work function for both the pMOS and nMOS transistors where the magnitude of the...
US-7,902,009 Graded high germanium compound films for strained semiconductor devices
Embodiments of an apparatus and methods for providing a graded high germanium compound region are generally described herein. Other embodiments may be described...
US-7,901,982 Modified chip attach process
Embodiments of a method of attaching an integrated circuit (IC) die to a substrate are disclosed. In one embodiment, at a first temperature, a solder disposed...
US-7,901,847 Use of soft adhesive to attach pellicle to reticle
A pellicle is attached to a reticle by a soft adhesive. The distortion of the reticle is less than if a hard adhesive were used.
US-7,900,226 Time shifting enhanced television triggers
Enhanced television broadcasts including triggers with expires attributes may be utilized in a variety of situations where the expires attribute may adversely...
US-7,900,143 Large character set browser
A large number of characters may be represented by character codes without undue complication. For example, characters that are already represented by Unicode...
US-7,900,098 Receiver for recovering and retiming electromagnetically coupled data
In one embodiment, the present invention includes a system having an electromagnetic coupler probe to electromagnetically sample signals from a device under test...
US-7,900,084 Reliable memory for memory controller with multiple channels
One embodiment of the invention includes a memory RAS mode whereby a multi-channel memory controller utilizes both memory mirroring and memory sparing to form...
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