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Patent # Description
US-7,732,936 Buffer coating having a physical mixture of high toughness polymer and a low shrinkage polymer
Embodiments of buffer coatings for semiconductor and integrated circuit manufacturing are presented herein, wherein the buffer coating is provided by...
US-7,732,285 Semiconductor device having self-aligned epitaxial source and drain extensions
A method of forming a transistor with self-aligned source and drain extensions in close proximity to a gate dielectric layer of the transistor comprises forming...
US-7,732,260 Semiconductor device power interconnect striping
A method and an apparatus for improving the delivery and filtering of power to a semiconductor device is disclosed by organizing out interconnects (pins, balls,...
US-7,732,106 Methods for etching devices used in lithography
Methods for etching devices used for lithography. In one aspect, a method includes etching, in a single etch, a first region and a second region on a substrate....
US-7,731,864 Slurry for chemical mechanical polishing of aluminum
Described herein are embodiments of a slurry used for the chemical mechanical polishing a substrate that includes aluminum or an aluminum alloy features having a...
US-7,730,501 Method for parallel processing of events within multiple event contexts maintaining ordered mutual exclusion
Techniques for parallel processing of events within multiple event contexts include dynamically binding an event context to an execution context in response to...
US-7,730,491 Fair scalable reader-writer mutual exclusion
Implementing fair scalable reader writer mutual exclusion for access to a critical section by a plurality of processing threads in a processing system is...
US-7,730,473 Relieving data marshalling overhead
Data may be marshalled from a managed runtime environment to an unmanaged environment by using a compiler to calculate argument offsets and generate marshalling...
US-7,730,459 Generating executable code based on code performance data
A compiler transforms source code into intermediate code and provides the intermediate code to a profiler. The profiler executes the intermediate code. The...
US-7,730,436 Verification using simultaneous and inductive SAT algorithms
A simultaneous satisfiability algorithm, or SSAT, allows simultaneous checks to be made efficiently for a number of literals, x.sub.1, . . . ,x.sub.n whether...
US-7,730,376 Providing high availability in a PCI-Express.TM. link in the presence of lane faults
A method, device, and system are disclosed. In one embodiment, the method comprises discovering a failure on a PCI Express interconnect, determining whether a...
US-7,730,356 Method and apparatus for testing mathematical algorithms
A method and apparatus for testing mathematical programs where code coverage is exceedingly difficult to hit with random data test vectors (probability...
US-7,730,340 Method and apparatus for dynamic voltage and frequency scaling
A machine learning technique is used to improve dynamic prediction of processor utilization for multi-threaded user-level applications in a dynamic run-time...
US-7,730,286 Software assisted nested hardware transactions
A method and apparatus for efficiently executing nested transactions is herein described. Hardware support for execution of transactions is provided....
US-7,730,281 System and method for storing immediate data
An article comprising an instruction stored on a storage medium. The instruction includes opcode field storing an opcode signal and an operand field storing an...
US-7,730,266 Adaptive range snoop filtering methods and apparatuses
Snoop filtering methods and apparatuses for systems utilizing memory are contemplated. Method embodiments comprise receiving a request for contents of a memory...
US-7,730,264 Adaptively reducing memory latency in a system
In one embodiment, the present invention includes a method for routing an early request for requested data on a bypass path around a transaction processing path...
US-7,730,246 Opportunistic transmission of software state information within a link based computing system
A method is described that involves determining that software state information of program code is to be made visible to a monitoring system. The method also...
US-7,730,239 Data buffer management in a resource limited environment
An apparatus and method is provided to facilitate Input/Output (I/O) transfer in resource limited storage environment. Scatter gather list, segment and memory...
US-7,730,221 LAN controller with bootable host bus adapter
A network controller with a bootable Host Bus Adapter, particularly suitable for iSCSI applications is described. In one example, this includes, a host bus...
US-7,730,205 OS agnostic resource sharing across multiple computing platforms
Methods, apparatus, and systems for sharing resources across a plurality of computing platforms. Firmware provided on each platform is loaded for operating...
US-7,729,711 Reducing interference from closely proximate wireless units
A wireless device may include two or more wireless interfaces capable of transmitting and/or receiving signals over separate wireless networks. To reduce the...
US-7,729,697 Private base station with exclusivity
A private base station (PBS) configured to connect to the Internet and establish a small area of wireless coverage includes an exclusivity database allowing...
US-7,729,663 Signal-to-noise ratio (SNR) determination in the frequency domain
A technique for modifying communication operational parameters using fast, low complexity, accurately calculated SNR values. Techniques may improve upon prior...
US-7,729,621 Controlling a bias voltage for a Mach-Zehnder modulator
In one embodiment, the present invention includes a controller coupled to an optical modulator to receive a dither signal, determine a difference between the...
US-7,729,445 Digital outphasing transmitter architecture
Architectures including digital outphasing transmitters. Digital signal generation circuitry generates at least two base-band sinusoid signals. Bandpass...
US-7,729,409 Codebook indexing to achieve high bit densities in a direct-sequence CDMA spread spectrum communication system
Apparatuses for achieving high bit densities in a direct-sequence CDMA spread spectrum communication system are disclosed. A table of orthogonal pseudo-noise...
US-7,729,393 Surface emitting laser with an integrated absorber
A surface emitting laser (SEL) with an integrated absorber. A lower mirror and an output coupler define a laser cavity of the SEL. A monolithic gain structure...
US-7,729,316 Receiving signals on a channel used for traffic and access in a communications system
Embodiments of the present invention can be used to efficiently receive access control and traffic information. In one embodiment, the invention includes...
US-7,729,272 Determining whether a transmission signal block was fully transmitted based on bit error probability
Methods, apparatuses, and systems to determine whether a transmission signal block was fully transmitted are described herein. The determination may be made at...
US-7,729,176 Program acceleration of a memory device
Selective program acceleration of a memory device is generally described. A method includes applying a first bias voltage to one or more bit lines coupled with a...
US-7,729,168 Reduced signal level support for memory devices
Embodiments of the invention are generally directed to systems, methods, and apparatuses for reduced signal level support for memory devices. In some...
US-7,729,121 Removable package underside device attach
In some embodiments, a stacked package assembly may include a first socket defining an interior cavity, a first semiconductor device coupled to the first socket,...
US-7,728,746 Signal transition feature based coding for serial link
Signal transition feature based coding for serial link is described herein. According to one embodiment, in response to a data stream transmitted onto a serial...
US-7,728,688 Power supply circuit for a phase-locked loop
A power supply circuit includes a first voltage regulator to generate a first supply voltage for a first circuit of a phase-locked loop and a second voltage...
US-7,727,892 Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnects
Described is a method and apparatus for forming interconnects with a metal-metal oxide electromigration barrier and etch-stop. In one embodiment of the...
US-7,727,886 Forming vias using sacrificial material
In one embodiment, the present invention includes a method for forming a sacrificial material layer, patterning it to obtain a first patterned sacrificial...
US-7,727,830 Fabrication of germanium nanowire transistors
In general, in one aspect, a method includes using the Germanium nanowire as building block for high performance logic, memory and low dimensional quantum effect...
US-7,727,815 Reactive gettering in phase change solders to inhibit oxidation at contact surfaces
A method for forming a high thermal conductivity heat sink to IC package interface is disclosed. The method uses reactive getter materials added to a two phase...
US-7,727,814 Microelectronic package interconnect and method of fabrication thereof
A method of interconnecting and an interconnect is provided to connect a first component and a second component of an integrated circuit. The interconnect...
US-7,727,805 Reducing stress in a flip chip assembly
In one embodiment, the present invention includes a method for depositing lead-free bumps on a package substrate, depositing an alloy material on the lead-free...
US-7,725,945 Discouraging unauthorized redistribution of protected content by cryptographically binding the content to...
In one aspect of the invention is a method for discouraging unauthorized redistribution of protected content. Content is bound to a customer I.D. associated with...
US-7,725,895 Processor control register virtualization to minimize virtual machine exits
Writing a control flag in a processor control register by a guest virtual machine. Determine whether the control flag is owned by the guest virtual machine....
US-7,725,887 Method and system for reducing program code size
In a method for reducing code size, replaceable subsets of instructions at first locations in areas of infrequently executed instructions in a set of...
US-7,725,886 Merger of tables storing protocol data unit related data
In general, in one aspect, the disclosure describes a method of determining if a first query for data related to a protocol data unit in a first table is a query...
US-7,725,858 Providing a moat capacitance
In one embodiment, the present invention includes an apparatus having core logic formed on a die, input/output (IO) buffers surrounding the core logic, and a...
US-7,725,757 Method and system for fast frequency switch for a power throttle in an integrated device
In one embodiment, the present invention includes a counter to count core clocks, where the counter has a value to be incremented from zero to one less than a...
US-7,725,751 Termination techniques for bus interfaces
Techniques involving the transfer of signals across interconnection media are disclosed. For instance, an apparatus may include an apparatus having an...
US-7,725,748 Low power subsystem for portable computers
An embedded subsystem is coupled to a shared database is synchronized with the notebook and has access to the hard drive. The subsystem is in operation when the...
US-7,725,747 Methods and apparatus to perform power management in processor systems
Methods of performing power management of a processor are disclosed. One example method includes obtaining a plurality of operating parameters related to the...
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