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Patent # Description
US-7,836,748 Chamber sealing valve
According to some embodiments, a test fluid may be provided into a chamber associated with a cooling system for an electronic integrated circuit. Moreover, a...
US-7,836,494 System and method for regulating the flow of information to or from an application
The flow of information to or from an application on a host machine is regulated by a trusted agent operating in conjunction with at least one security element,...
US-7,836,447 Method of efficient performance monitoring for symmetric multi-threading systems
Efficient performance monitoring for symmetric multi-threading systems is applicable to systems that have limited performance monitoring resources and enables...
US-7,836,435 Checking for memory access collisions in a multi-processor architecture
Checking for memory access collisions in a multiple processor architecture is described. Memory access collisions may be found by simulating an instruction to be...
US-7,836,383 Low density parity check (LDPC) code decoder
An embodiment of a decoder comprises processing elements operating on associative processing. The processing elements may comprise a logic and memory element....
US-7,836,380 Destination indication to aid in posted write buffer loading
Embodiments of the invention are generally directed to systems, methods, and apparatuses for a destination indication to aid in posted write buffer loading. In...
US-7,836,352 Method and apparatus for improving high availability in a PCI express link through predictive failure analysis
A method and apparatus is described herein for tracking errors for one of a plurality of lanes in a link, tracking errors for the link, and in the case of a root...
US-7,836,339 Computer memory power backup
According to an embodiment of the invention, a method and apparatus for computer memory power backup are described. According to one embodiment, a memory system...
US-7,836,316 Conserving power in processing systems
A network device may comprise an auxiliary processor to conserve the power of the network device. The auxiliary processor may modify one or more definition...
US-7,836,275 Method and apparatus for supporting address translation in a virtual machine environment
In one embodiment, a method includes receiving control transitioned from a virtual machine (VM) due to a privileged event pertaining to a translation-lookaside...
US-7,836,229 Synchronizing control and data paths traversed by a data transaction
In one embodiment, the present invention includes a method for determining if control and data portions of a data transaction are ready to be sent from an...
US-7,836,213 Coupling data buffers with memory interfaces
In one embodiment, the present invention includes a method including receiving a read request at a first buffer from a first one of multiple interfaces and...
US-7,836,195 Preserving packet order when migrating network flows between cores
In one embodiment, the present invention includes a method for receiving a first packet associated with a first network flow in a first descriptor queue...
US-7,836,165 Direct memory access (DMA) transfer of network interface statistics
In general, in one aspect, the disclosure describes a method that includes maintaining statistics, at a network interface, metering operation of the network...
US-7,836,144 System and method for a 3-hop cache coherency protocol
A system and method for implementing a cache coherency protocol are described. The system includes a first caching agent to send a first cache request to a home...
US-7,836,049 Syllabic search engines and related methods
An improved search engine, for a computing device or computer network, utilizes search strings comprising complete words and numbers representing a syllable...
US-7,836,003 Assisting a user experiencing cognitive decline by retracing footsteps
Briefly, in accordance with one or more embodiments, a user experiencing cognitive decline or a similar affliction may be assisted with the performance of daily...
US-7,835,587 Method and apparatus for local standard deviation based histogram equalization for adaptive contrast enhancement
Various embodiments for image contrast enhancement are described. In one or more embodiments, adaptive contrast enhancement may be realized by performing local...
US-7,835,356 Method and device for fragmented packet routing in virtualized environments
A method and device for routing fragmented data frames is provided. A data frame may be fragmented into a plurality of fragments, each fragment including a...
US-7,835,299 Method and system for power consumption reduction by network devices as a function of network activity
A method and system may provide power consumption reduction by a network device. A device on a network and its components each may capable of operating in a...
US-7,835,187 Boosting seed voltage for a memory device
A method and device using bitline-bitline capacitance between adjacent bitlines to boost seed voltage in a memory device are provided. The method may include a...
US-7,834,873 Display processing line buffers incorporating pipeline overlap
Apparatus, systems and methods for display processing line buffers incorporating pipeline overlap are disclosed. For example, an apparatus is disclosed including...
US-7,834,810 Antennae attachable to an electronic device enclosure or other structure
Attachable/detachable antennae for use with electronic systems.
US-7,834,426 High-k dual dielectric stack
The present invention discloses a method including: providing a Group III-V component semiconductor material; forming a first layer over a surface of the Group...
US-7,833,899 Multi-layer thick metallization structure for a microelectronic device, intergrated circuit containing same,...
A multi-layer thick metallization structure for a microelectronic device includes a first barrier layer (111), a first metal layer (112) over the first barrier...
US-7,833,889 Apparatus and methods for improving multi-gate device performance
Embodiments of an apparatus and methods for improving multi-gate device performance including methods to fabricate a plurality of multi-gate fins from a diffused...
US-7,833,887 Notched-base spacer profile for non-planar transistors
A method of forming a notched-base spacer profile for non-planar transistors includes providing a semiconductor fin having a channel region on a substrate and...
US-7,833,883 Precursor gas mixture for depositing an epitaxial carbon-doped silicon film
A precursor gas mixture for depositing an epitaxial carbon-doped silicon film is described. The precursor gas mixture is comprised of a volume of a silicon...
US-7,833,838 Method and apparatus for increasing the immunity of new generation microprocessors from ESD events
A method and apparatus for increasing the immunity of new generation microprocessors from electrostatic discharge events involve shielding the microprocessors at...
US-7,833,816 Forming a thin film thermoelectric cooler and structures formed thereby
Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a first plurality of openings through a first surface...
US-7,832,215 Thermoelectrically cooling electronic devices
A heat sink may be clamped to a thermoelectric cooler and vapor chamber using a U-shaped retention band. The band may attach underneath the vapor chamber,...
US-7,831,997 Secure and automatic provisioning of computer systems having embedded network devices
A provisioning method and mechanism for computer systems having embedded network devices. After an initial boot-up of a computer platform, an out-of-band (OOB)...
US-7,831,974 Method and apparatus for serialized mutual exclusion
A mechanism that associates a mutual exclusion lock with a shared data item and provides ownership of the mutual exclusion lock to multiple execution threads...
US-7,831,924 Method and apparatus to control the display of windows in a processing system
A processing system may include a display device, a primary window manager, and an auxiliary window manager. The primary window manager may display a first...
US-7,831,858 Extended fault resilience for a platform
In one embodiment, the present invention includes a method for allocating a fail-over memory region, determining if multiple processors have reached a rendezvous...
US-7,831,849 Platform communication protocol
A host chipset heartbeat may be utilized, in some embodiments, to handle interrupts from external devices on a power efficient basis. The availability of the...
US-7,831,821 System backup and recovery solution based on BIOS
A system performs system initialization for a computing device, comprising a module to back up one or more files of the computing device in response to a backup...
US-7,831,819 Filter micro-coded accelerator
Method and apparatus for a filter micro-code accelerator are described.
US-7,831,811 System and method for managing a register-based stack of operand tags
A virtual machine in a processing system manages type information for operands. In one embodiment, the virtual machine accomplishes the following results through...
US-7,831,776 Dynamic allocation of home coherency engine tracker resources in link based computing system
A home agent allocates trackers to each of a plurality of caching agents, monitors each caching agent's usage of the allocated trackers, and determines whether a...
US-7,831,762 Reducing the format time for bit alterable memories
In bit alterable memories, a particular header of a particular block may be programmed to a particular code to indicate that the block is to be considered empty....
US-7,831,758 Accelerating input/output (IO) throughput on solid-state memory-based mass storage device
In one embodiment, a portable mass storage device may include a bus hub having a first port to couple to a bus and other ports to connect to multiple...
US-7,831,747 Method and apparatus to generate a data descriptor
Embodiments are generally direct to a method and apparatus to generate a data descriptor. In one embodiment, a data descriptor is generated for a block of data...
US-7,831,713 System and method for managing distributed objects as a single representation
An architecture and method for managing at least two distinct machines (or objects) in which resources are shared as a single entity (or object) in an...
US-7,831,542 Iterative search with data accumulation in a cognitive control framework
Searching hypotheses for locations of objects in a playback image corresponding to a recorded image generated by a graphical user interface (GUI) of an...
US-7,831,278 Method and device for communicating data with a personal wireless storage device
A portable device is provided which includes a wireless communication module, a data storage module, and a controller for controlling the storage and/or...
US-7,831,115 Optical die structures and associated package substrates
Optical die structures and associated package substrates are generally described. In one example, an electronic device includes a package substrate having a...
US-7,830,980 System and method capable of implicit feedback for the devices with an unequal number of transmitter and...
An embodiment of the present invention provides a wireless station (STA) capable of implicit feedback in a wireless local area network, comprising at least one...
US-7,830,977 Providing CQI feedback with common code rate to a transmitter station
Methods and apparatuses for providing CQI feedback with common code rate to a transmitter station are described herein. In one implementation, the methods may...
US-7,830,882 Switch scaling for virtualized network interface controllers
A system bus may be used as an inter-switch communications link to transfer packets between virtualized interfaces on different virtualized network interface...
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