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Patent # Description
US-7,808,283 Synchronous frequency synthesizer
An apparatus for clock generation is presented. In one embodiment, the apparatus comprises a phase interpolator that generates an output with a phase value...
US-7,808,058 Method of forming a transistor having gate protection and transistor formed according to the method
A microelectronic device and a method of forming same. The method comprises: a transistor gate; a first spacer and a second spacer respectively adjacent a first...
US-7,808,053 Method, apparatus, and system for flash memory
Embodiments of the present invention provide apparatus, methods and systems that include a substrate including a central region and a peripheral region; a...
US-7,808,024 Ferroelectric polymer memory module
A ferroelectric polymer memory module includes a first set of layers including: a first ILD layer defining trenches therein; a first electrode layer disposed in...
US-7,807,573 Laser assisted chemical vapor deposition for backside die marking and structures formed thereby
Methods of forming a microelectronic structure are described. Embodiments of those methods include forming an identification mark on a portion of a backside of...
US-7,807,319 Photomask including contrast enhancement layer and method of making same
A photomask and a method of making same. The photomask includes a plate defining transparent regions in a predetermined pattern and opaque regions, the...
US-7,806,938 Security power control
A method and apparatus are described that control the supply of electrical power to one or more components of a computing device. Other embodiments are described...
US-7,805,955 Using refrigeration and heat pipe for electronics cooling applications
A cooling system includes a heat pipe and a refrigerator. A combination at least one or more of the heat pipe and the refrigerator is used to cool an electronic...
US-7,805,657 Techniques to determine transmission quality of a signal propagation medium
Techniques are described that can be used to identify a defective communication channel in a communications network. A decoder in a receiver may decode a signal...
US-7,805,627 Clock synchronization scheme for deskewing operations in a data interface
A technique includes providing transmitters that are each associated with a data bit line of a bus, and each transmitter is clocked by an associated transmit...
US-7,805,619 Circuit technique to reduce leakage during reduced power mode
Provided herein are schemes for reducing leakage in dynamic circuits during sleep modes.
US-7,805,603 Apparatus and method of protecting management frames in wireless LAN communications
Briefly, in accordance with one embodiment of the invention, an apparatus comprising Management Frames utilized in wireless communications associated with the...
US-7,805,597 Parallel link reset in link based system
A link based system including a plurality of processors is reset when transitioning from a slower speed to a higher speed mode during a booting process. One...
US-7,805,543 Hardware oriented host-side native command queuing tag management
Methods and apparatus for host-side Serial ATA Native Command Queuing (NCQ) tag management are disclosed. In one aspect, an exemplary apparatus may include a...
US-7,805,512 Remote configuration, provisioning and/or updating in a layer two authentication network
A device capable of remote configuration, provisioning and/or updating comprising a network detector capable of detecting a network regardless of the state of...
US-7,805,502 Extensible network services system
Automatically finding and using network services. An extensible framework is defined which allows any network service, new or old, to be defined. A base schema...
US-7,805,144 Channel assignment based on spatial strategies in a wireless network using adaptive antenna arrays
Channels are assigned based on co-spatial constraints in wireless network using spatial division multiple access. In one example, the invention includes...
US-7,805,008 Structural content filtration of hypotheses in a cognitive control framework
Structural content filtration to reduce the number of hypotheses for the location of an active object in a recorded image generated by a graphical user interface...
US-7,804,932 Double-feedback flexible non-integer frequency division circuit
An embodiment of this invention combines feed-forward and feedback frequency division circuits in a such a way, to provide greater flexibility in choosing the...
US-7,804,920 Closed loop adaptive clock RFI mitigation
A method according to one embodiment for mitigating radio frequency interference by identifying system clocks, identifying active radio channels, measuring clock...
US-7,804,903 Hardware-based CABAC decoder
A method of decoding a stream of compression-encoded image data. The method includes supplying at least two values to an adder. At least one of the values is...
US-7,804,896 Content adaptive noise reduction filtering for image signals
A method includes selecting a target pixel and comparing a value of the target pixel with a respective value of each of a plurality of pixels located in an area...
US-7,804,890 Method and system for response determinism by synchronization
A discussion of improving integrated device deterministic response to test vectors. For example, limiting the transmission delay for an integrated device's...
US-7,804,868 Chip carrier apparatus and method
A chip carrier having improver thermal properties, wherein the chip carrier may be formed having waist section, and a first transverse end portion joined to the...
US-7,804,851 Discovery technique for physical media interface aggregation
Various discovery techniques are described for physical media interface aggregation.
US-7,804,847 Interface and related methods for rate pacing in an ethernet architecture
An interface and related methods for rate pacing in an Ethernet architecture are described herein. In an embodiment, an effective data rate of communication...
US-7,804,800 Efficient training schemes for MIMO based wireless networks
Schemes are disclosed for efficiently training MIMO channels in wireless networks. In at least one embodiment, multiple STAs in a network may share a single...
US-7,804,799 Uplink contention based access with quick access channel
Embodiments of a wireless communication system and methods allocating bandwidth are generally described herein. Other embodiments may be described and claimed....
US-7,804,762 Method and apparatus for implementing downlink SDMA in a wireless network
Methods and structures are disclosed for use in implementing downlink spatial division multiple access (SDMA) in a wireless network. In at least one embodiment,...
US-7,804,733 System and method for memory phase shedding
Embodiments of the invention supply power to DRAM or other memory devices with a multi-phase voltage regulator. A power controller coupled to the multi-phase...
US-7,804,694 Reference layer openings
A component having reference layer openings to contribute towards achieving a differential impedance in a circuit, is described herein.
US-7,804,542 Spatio-temporal adaptive video de-interlacing for parallel processing
A method including, in some embodiments, comparing a preceding field and a succeeding field of a video signal for motion at a locus of a current pixel in a...
US-7,804,494 Pointing device with integrated audio input and associated methods
A mobile personal digital assistant (PDA) allows a user to enter information using both a touch screen and voice commands with a stylus. The stylus includes a...
US-7,804,082 Phase change memory system
A thin film phase change memory may be provided with a layer which changes between amorphous and crystalline states. The threshold voltage of that layer may be...
US-7,802,250 Support for transitioning to a virtual machine monitor based upon the privilege level of guest software
A system and method for allowing a virtual machine monitor to assume control of a system when the current privilege level of guest software meets a privilege...
US-7,802,146 Loading test data into execution units in a graphics card to test execution
Provided are a method and system for loading test data into execution units in a graphics card to test the execution units. Test instructions are loaded into a...
US-7,802,136 Compiler technique for efficient register checkpointing to support transaction roll-back
A method and apparatus for efficient register checkpointing is herein described. A transaction is detected in program code. A recovery block is inserted in the...
US-7,802,132 Technique to improve and extend endurance and reliability of multi-level memory cells in a memory device
A novel technique to improve and extend endurance and reliability of a memory device utilizing multi-level cells is disclosed. As a memory device ages, it's...
US-7,802,125 Over clocking detecting and permitting access to stored over clocking indicator in a power down state
A method and an apparatus to detect over clocking of a processor are illustrated. The over clocking detector may detect as to whether the system clock of a...
US-7,802,116 Subsystem power management
A method according to one embodiment may include generating, by subsystem voltage regulator circuitry, a subsystem power supply for subsystem circuitry based on,...
US-7,802,090 Determining composition of an initialization vector for encapsulating security payload processing
A method which includes receiving a request to perform encapsulating security payload (ESP) processing for data exchanged between a node and an other node over a...
US-7,802,085 Apparatus and method for distributing private keys to an entity with minimal secret, unique information
In some embodiments, a method and apparatus for distributing private keys to an entity with minimal secret, unique information are described. In one embodiment,...
US-7,802,083 Utilization based installation on a computing system
Methods, apparatuses, articles, and systems for performing an installation by a client system at a time when the client system is predicted to be below a level,...
US-7,802,082 Methods and systems to dynamically configure computing apparatuses
Methods and systems to dynamically configure computing apparatuses, such as desktop computers and portable computing devices, are disclosed. Embodiments...
US-7,802,081 Exposed sequestered partition apparatus, systems, and methods
Apparatus, systems, methods, and articles may operate to store one or more parameters associated with a pseudo-device in a device configuration table associated...
US-7,802,077 Trace indexing via trace end addresses
A new class traces for a processing engine, called "extended blocks," possess an architecture that permits possible many entry points but only a single exit...
US-7,802,076 Method and apparatus to vectorize multiple input instructions
An optimization unit to search for two or more candidate instructions in an instruction trace and to merge the two or more candidate instructions into a single...
US-7,802,061 Command-based control of NAND flash memory
Some embodiments of the invention use a command-based interface to control reads and writes with non-volatile memory devices. This may reduce the number of pins...
US-7,802,059 Object based conflict detection in a software transactional memory
Object-based conflict detection is described in the context of software transactional memory. In one example, a pointer is received for a block of instructions,...
US-7,802,057 Priority aware selective cache allocation
A method and apparatus for is herein described providing priority aware and consumption guided dynamic probabilistic allocation for a cache memory. Utilization...
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