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Avoiding execution of instructions in a second processor by committing
results obtained from speculative...
A device is presented including a first processor and a second processor. A number of memory devices are connected to the first processor and the second...
Chips providing single and consolidated commands
In some embodiments, a chip includes a link interface, monitoring circuitry to provide an activity indicator that is indicative of activity of the chip, and...
Repeated conflict acknowledgements in a cache coherency protocol
In a cache coherency protocol multiple conflict phases may be utilized to resolve a data request conflict condition. The multiple conflict phases may avoid...
Virtualization as emulation support
A processor based system including a processor and a storage subsystem communicatively coupled with the processor, an operating system stored in the storage...
Intelligent battery safety management system configured to compare
collected operational data with reference...
A method and apparatus for intelligent battery safety management. Some embodiments of a method for managing battery operation may include receiving a battery...
Sleep-mode statistics apparatus, systems, and methods
Embodiments of sleep-mode statistics apparatus, systems, and methods are described generally herein. Other embodiments may be described and claimed.
Null deepening for an adaptive antenna based communication station
A method and apparatus is described for modifying a smart antenna processing strategy determined from a set of signals received at an array of antenna elements...
Apparatus, system and method capable of integrating a cellular phone stack
in an extended firmware interface...
An embodiment of the present invention provides an apparatus, comprising a wireless device capable of integrating a cellular phone stack in an extended firmware...
System and method for transmitting data in a communication network
Disclosed is a system and method for transmitting data from a first base station to a first destination subscriber station (DSS). The first base station is...
Electrical generation of return-to-zero (RZ) data pattern with flexible
duty cycle adjustment for optical...
An electrical return to zero (RZ) encoder converts non-return to zero (NRZ) data, into of RZ data patterns with a flexibility for duty cycle adjustment so that...
Three-dimensional road map estimation from video sequences by tracking
Estimation of a 3D layout of roads and paths traveled by pedestrians is achieved by observing the pedestrians and estimating road parameters from the...
Method to provide transparent information in binary drivers via
Methods for providing and extracting hidden information in firmware images using steganographic processes. Information is hidden in binary firmware images, such...
Serial ethernet device-to-device interconnection
Described are a device and system to transmit 8B/10B code groups including Ethernet data frames in a device-to-device interconnection. Control messages may be...
Reconfigurable frame parser
A method and apparatus to perform frame parsing are described wherein a configuration module stores configuration information and a parsing module, connected to...
Group tag caching of memory contents
A method according to one embodiment may include receiving one or more packets from at least one external device and storing one or more packets in at least one...
Method and apparatus for gigabit packet assignment for multithreaded
A network processor that has multiple processing elements, each supporting multiple simultaneous program threads with access to shared resources in an interface....
Method, apparatus and system for client-based distributed PBX for
A system and associated processes to provide interactive public branch exchange (PBX) processes. The PBX processes including: session initiation protocol (SIP)...
Providing CQI feedback to a transmitter station in a closed-loop MIMO
Methods and apparatuses for reducing an amount of bandwidth required for feedback to a transmitter station in a closed-loop multiple-input multiple-output (MIMO)...
Method and apparatus to couple a module to a management controller on an
Embodiments are generally directed to a method and apparatus to couple a module to a management controller on an interconnect. In one embodiment, a method...
Extended synchronized clock
Some embodiments are directed to circuits comprising first and second PLLs. The first PLL generates a first clock signal based on a reference clock signal. The...
Current sensing scheme for non-volatile memory
A current sensing scheme for non-volatile memory is disclosed comprising an apparatus for determining one or more memory cell states in a non-volatile memory...
Reading phase change memories with select devices
A phase change memory including a threshold device, such as an ovonic threshold switch, and a storage device may be read. Reading the cell may involve applying a...
Cooling arrangement to cool components on circuit board
A circuit board including a blower thereon to cool a heat generating arrangement. The circuit board includes a board substrate; a blower disposed on the board...
Subdividing geometry images in graphics hardware
A system may include a graphics memory, a data bus, a processor, and a vertex shader. The data bus may be operatively connected to the graphics memory. The...
Dual reactive shunt low noise amplifier
A dual reactive shunt feedback low noise amplifier design may include a transconductance amplifier having a capacitor coupled across it and a pair of coupled...
Measuring electric and magnetic field
A field detection device such as a micro-strip portion of a transmission line may detect an electric field and a magnetic field induced by current steps injected...
Metal-metal bonding of compliant interconnect
Embodiments of the invention provide a first component with a compliant interconnect bonded to a second component with a land pad by a metal to metal bond. In...
Metal and alloy silicides on a single silicon wafer
Methods and apparatus relating to a single silicon wafer having metal and alloy silicides are described. In one embodiment, two different silicides may be...
Microelectronic assembly having second level interconnects including
solder joints reinforced with crack...
A microelectronic assembly and a method of forming the assembly. The microelectronic assembly includes a package having a package substrate having a die side and...
Stacked die package with stud spacers
A system may include a first integrated circuit die comprising a first upper surface, an integrated circuit package substrate comprising a second upper surface,...
Conductive interconnects along the edge of a microelectronic device
Embodiments of the invention include apparatuses and methods relating to conductive interconnects along the edges of a microelectronic device. In one embodiment,...
Apparatuses, a method, and a system for a non-volatile, probe-based memory device are disclosed herein. In various embodiments, probe-based memory may be...
Bit-erasing architecture for seek-scan probe (SSP) memory storage
An apparatus comprising a substrate, a heater formed on the substrate, and a phase-change layer formed on the heater. The heater comprises a heater layer and...
Using unstable nitrides to form semiconductor structures
Incompatible materials, such as copper and nitrided barrier layers, may be adhered more effectively to one another. In one embodiment, a precursor of copper is...
Method and core materials for semiconductor packaging
A semiconductor package comprises a semiconductor substrate that may comprise a core. The core may comprise one or more materials selected from a group...
Liquid cooling system
In some embodiments, a cooling device may be mounted to a portion of a chassis of an electronic system, wherein the cooling device may be releasably and...
Validating a memory type modification attempt
A system and process are described to enable at least one of a plurality of host agents executing on a system to update memory region types of a system memory,...
Multi-thread processing system for detecting and handling live-lock
conditions by arbitrating livelock priority...
Method, apparatus and system embodiments to assign priority to a thread when the thread is otherwise unable to proceed with instruction retirement. For at least...
Methods and apparatus for creating software basic block layouts
Methods and apparatus to create software basic block layouts are disclosed. In one example, a method identifies branch data associated with a plurality of...
Reducing the uncorrectable error rate in a lockstepped dual-modular
Embodiments of apparatuses and methods for reducing the uncorrectable error rate in a lockstepped dual-modular redundancy system are disclosed. In one...
Correcting intermittent errors in data storage structures
Embodiments of apparatuses and methods for correcting intermittent errors in data storage structures are disclosed. In one embodiment, an apparatus includes a...
Method and apparatus for lockstep processing on a fixed-latency
Methods of operating two or more devices in lockstep by generating requests at each device, comparing the requests, and forwarding matching requests to a...
Technique to create link determinism
A technique for promoting determinism among bus agents within a point-to-point (PtP) network. More particularly, embodiments of the invention relate to...
Method and apparatus to authenticate base and subscriber stations and
secure sessions for broadband wireless...
Methods and apparatus to authenticate base and subscriber stations and secure sessions for broadband wireless networks, such as IEEE P802.16-based networks. The...
Managed redundant enterprise basic input/output system store update
A basic input/output system may be stored on two different memories coupled to active management technology firmware and a trusted platform module. The trusted...
Hardware oriented target-side native command queuing tag management
Methods and apparatus for target-side SATA NCQ tag management are disclosed. In one aspect, an apparatus may include a status memory and a status manager circuit...
Rounding of binary integers
Methods and apparatus to provide rounding of a binary integer are described. In one embodiment, a value that indicates whether a divisor divides a binary integer...
Techniques for adaptive interference cancellation
Techniques to perform adaptive interference cancellation are described. A first apparatus may include a timing recovery module to produce a timing recovery...
Method and apparatus for high speed silicon optical modulation using PN
A method and apparatus for high speed silicon optical modulation is described using a PN diode. In one example, an optical waveguide has adjoining first and...
Substring detection system and method
A method, computer program product, apparatus, and system that detects a substring in an input data string by producing a fingerprint of a portion of the data...