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Multiband antenna array using electromagnetic bandgap structures
In some embodiments, a multiband antenna array using electromagnetic bandgap structures is presented. In this regard, an antenna array is introduced having two...
Dual data weighted average dynamic element matching in analog-to-digital
Methods and systems to provide dynamic element matching (DEM) in multi-phase sample systems include multiple uncorrelated, dual data weighted averaging, dynamic...
Process, voltage, and temperature compensated clock generator
According to some embodiments, a process, voltage, and temperature compensated clock generator is disclosed. The clock generator may be a charge-charge clock...
Ring oscillators for NMOS and PMOS source to drain leakage and gate
A ring oscillator circuit using only NMOS or only PMOS transistors is described. The ring oscillator circuit uses the equivalent of three transistors to form an...
Microelectronic package with wear resistant coating
A microelectronic package is provided. The microelectronic package includes a semiconductor substrate and a die having a top surface and a bottom surface,...
Shielded structures to protect semiconductor devices
An apparatus on a wafer, comprising; a first metal layer of a wall, a second metal layer of the wall, a third metal layer of the wall comprising; one or more...
Selective formation of dielectric etch stop layers
Methods to selectively form a dielectric etch stop layer over a patterned metal feature. Embodiments include a transistor incorporating such an etch stop layer...
Group II element alloys for protecting metal interconnects
A plurality of metal interconnects incorporating a Group II element alloy for protecting the metal interconnects and method to form and incorporate the Group II...
Quantum well MOSFET channels having uni-axial strain caused by metal
source/drains, and conformal regrowth...
Embodiments described include straining transistor quantum well (QW) channel regions with metal source/drains, and conformal regrowth source/drains to impart a...
Sub-resolution assist features
Systems and techniques relating to the layout and use of sub-resolution assist features. In one implementation, a mask includes a first feature and a second...
Controlling shape of a reticle with low friction film coating at backside
In an embodiment of the invention, an apparatus includes a reticle having a frontside including a pattern to be imaged onto a semiconductor wafer, a thin film...
Phase shift mask structure and fabrication process
A photomask and method for fabricating a photomask are generally described. In one example, a photomask includes a substrate, a multilayer (ML) stack having a...
Temperature measurement with reduced extraneous infrared in a processing
Temperature measurement using a pyrometer in a processing chamber is described. The extraneous light received by the pyrometer is reduced. In one example, a...
Support system for semiconductor wafers
A semiconductor wafer may be secured to a wafer support system by causing a supported surface of the semiconductor wafer to be at a lower gas pressure than an...
Task switching with a task containing code region to adjust priority
Briefly, techniques to reduce the impact of interrupts and swaps on the completion time of tasks. In an embodiment, a code segment within a task adjusts the...
System and method to deprivilege components of a virtual machine monitor
In some embodiments, the invention involves a system to deprivilege components of a virtual machine monitor and enable deprivileged service virtual machines...
Generating efficient parallel code using partitioning, coalescing, and
degenerative loop and guard removal
Code is affine partitioned to generate affine partitioning mappings. Parallel code is generated based on the affine partitioning mappings. Generating the...
Apparatus and method for dynamic binary translator to support precise
exceptions with minimal optimization...
A method and apparatus for dynamic binary translator to support precise exceptions with minimal optimization constraints. In one embodiment, the method includes...
Method and apparatus to estimate energy consumed by central processing
Briefly, a processor and a method of estimating an active energy consumption of two or more cores of a processor based on dispatching micro operations to one or...
Method and apparatus for verifying authenticity of initial boot code
A programmable processor initializes its state, then computes and verifies a hash of a boot code region of memory before executing any user instructions in the...
Launching a secure kernel in a multiprocessor system
In one embodiment of the present invention, a method includes verifying an initiating logical processor of a system; validating a trusted agent with the...
Instruction segment recording scheme
In a front-end system for a processor, a recording scheme for instruction segments stores the instructions in reverse program order. Instruction segments may be...
Method and apparatus for optimizing line writes in cache coherent systems
A method and apparatus for optimizing line writes in cache coherent systems. A new cache line may be allocated without loading data to fill the new cache line...
Synchronizing recency information in an inclusive cache hierarchy
In one embodiment, the present invention includes a method for receiving a cache access request for data present in a lower-level cache line of a lower-level...
Method for optimizing virtualization technology and memory protections
using processor-extensions for page...
In a virtualized processor based system causing a transition to a virtual machine monitor executing on the processor based system in response to a modification...
Point-to-point link negotiation method and apparatus
Point-to-point links between devices are brought up at a slowest available speed, and a faster link speed is negotiated after reaching an operational state.
Apparatus, systems, and methods to support service calls in an electronic
In an embodiment, an apparatus, method, and/or system support a service request made by a computer user in an Internet cafe or similar electronic service...
Methods and apparatus for providing an access profile system associated
with a broadband wireless access network
Embodiments of methods and apparatus for providing an access profile system associated with a broadband wireless access network are generally described herein....
High speed receiver
In one embodiment, a receiver includes a voltage margin controller, a set of first components coupled to the voltage margin control, and a set of offset...
Systems and methods for multi-element antenna arrays with aperture control
Embodiments include systems and methods for controlling beam direction of an array of antenna elements in a wireless communications system. In one embodiment,...
Multicarrier communication system and methods for communicating with
subscriber stations of different bandwidth...
A multicarrier base station communicates with subscriber stations of different bandwidth profiles by allocating time slots in downlink and uplink frames and...
Device, system and method of adjustment of a delivery mechanism according
to access categories
Embodiments of the invention provide devices, systems and methods of selecting one or more power save parameters of a wireless device according to an expected...
Memory agent with error hardware
A memory agent that communicates with another memory agent over links may include error hardware to monitor errors in the links. In some embodiments, the error...
Modular server architecture with Ethernet routed across a backplane
utilizing an integrated Ethernet switch module
A modular server system includes a midplane having a system management bus and a plurality of blade interfaces on the midplane. The blade interfaces are in...
Illumination modulation technique
A technique includes pulse width modulating an illuminating beam of a light to establish a pixel intensity and modulating the illuminating beam to create...
Method and apparatus for multi-level ray tracing
A method, apparatus, and system related to thermal management. The method includes generating a beam including a group of rays; evaluating the beam against a...
Cooling solutions for die-down integrated circuit packages
Systems for cooling the backside of a semiconductor die located in a die-down integrated circuit (IC) package are described. The IC package is attached to the...
iTFC with optimized C(T)
A method including depositing a suspension of a colloid comprising an amount of nano-particles of a ceramic material on a substrate; and thermally treating the...
Process charging and electrostatic damage protection in
A SOI device features a conductive pathway between active SOI devices and a bulk SOI substrate. The conductive pathway provides the ability to sink ...
Laminating magnetic materials in a semiconductor device
A technique includes forming overlaying magnetic metal layers over a semiconductor substrate. The technique includes forming at least one resistance layer...
Forming self-aligned nano-electrodes
A nano-electrode or nano-wire may be etched centrally to form a gap between nano-electrode portions. The portions may ultimately constitute a single electron...
Preventing silicide formation at the gate electrode in a replacement metal
A hard mask may be formed and maintained over a polysilicon gate structure in a metal gate replacement technology. The maintenance of the hard mask, such as a...
System and method for configuring a virtual network interface card
A system includes an interface device that executes a driver and a processing device that executes instructions to implement a virtual machine, and to implement...
Disambiguation in dynamic binary translation
A method and apparatus for disambiguating in a dynamic binary translator is described. The method comprises selecting a code segment for load-store memory...
Speculative code motion for memory latency hiding
Various embodiments that may be used in performing speculative code motion for memory latency hiding are disclosed. One embodiment comprises extracting an...
Apparatus and method capable of a unified quasi-cyclic low-density
parity-check structure for variable code...
An embodiment of the present invention provides an apparatus, comprising a transceiver capable of a unified quasi-cyclic low-density parity-check structure for...
Providing a deterministic idle time window for an idle state of a device
In one embodiment, the present invention includes a method for receiving at a target device a request for a deterministic idle window from an initiator device...
Predict computing platform memory power utilization
A method is to include implementing at least one statistical prediction model to predict memory power utilization and reduce power consumption for a computing...
Exclusive access for secure audio program
Executing a monitor on a platform, the monitor capable of providing exclusive, secure access to an audio I/O device of the platform, executing a first partition...
System and method for trusted early boot flow
In some embodiments, the invention involves extending trusted computing environments to the boot firmware. In at least one embodiment, the present invention is...