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Patent # Description
US-8,068,566 Unified multi-mode receiver detector
In general, in one aspect, the disclosure describes a unified simplified maximum likelihood detector to be utilized with multiple input multiple output (MIMO)...
US-8,068,554 Multiple input, multiple output wireless communication system, associated methods and data structures
Briefly, in accordance with one or more embodiments, in response to receiving a wireless communication signal, a non-uniform codebook is generated based at...
US-8,068,495 Mechanisms for data rate improvement in a wireless network
A wireless network arrangement includes a host device in communication with a wireless network module (e.g., an ultrawideband (UWB) module, etc.) through a...
US-8,068,488 Packet format for a distributed system
A method is provided for transmitting a packet including information describing a bus transaction to be executed at a remote device. A bus transaction is...
US-8,068,459 Adaptive frequency reuse method of radio resources management and allocation
A method for managing and allocating radio resources (RRMA method) of multiple radio resource types to subscriber stations is disclosed. The RRMA method...
US-8,068,405 Ferroelectric memory and method in which polarity of domain of ferroelectric memory is determined using ratio...
Methods and arrangements for data storage are discussed. Embodiments include applying a first voltage between a tip and an electrode, thereby forming a...
US-8,068,371 Methods and systems to improve write response times of memory cells
Methods and systems to dynamically control state-retention strengths of a plurality of memory cells during a write operation to a subset of the memory cells....
US-8,068,328 Nanolithographic method of manufacturing an embedded passive device for a microelectronic application, and...
A method of manufacturing an embedded passive device for a microelectronic application comprises steps of providing a substrate (110, 210, 310),...
US-8,068,116 Methods, systems, and data structures for generating a rasterizer
Methods, systems and data structures produce a rasterizer. A graphical state is detected on a machine architecture. The graphical state is used for assembling a...
US-8,068,112 Image buffering techniques
A system, apparatus, method and article to perform buffering techniques are described. The apparatus may include a buffer having a fixed number of storage slots...
US-8,067,856 Power management system
A power supply system includes at least one power supply module and at least one redundant power supply module. A power supply module may include a charging...
US-8,067,818 Nonplanar device with thinned lower body portion and method of fabrication
A nonplanar semiconductor device having a semiconductor body formed on an insulating layer of a substrate. The semiconductor body has a top surface opposite a...
US-8,067,266 Methods for the fabrication of microelectronic device substrates by attaching two cores together during fabrication
The present disclosure relates to fabricating substrates for use in microelectronic device packages. In at least one embodiment, two substrate cores may be...
US-8,067,256 Method of making microelectronic package using integrated heat spreader stiffener panel and microelectronic...
A method of making a microelectronic package, and a microelectronic package made according to the method. The method includes: bonding and thermally coupling a...
US-8,065,726 Scalable anti-replay windowing
The present disclosure provides a method for scalable anti-replay windowing. According to one exemplary embodiment, the method may include receiving at least...
US-8,065,685 Method, system and apparatus for a transformation engine for use in the processing of structured documents
Systems, methods and apparatuses for embodiments of a transformation engine for structured documents are disclosed. More specifically, instruction code may be...
US-8,065,678 Method and apparatus for scheduling the processing of commands for execution by cryptographic algorithm cores...
A method and apparatus for scheduling the processing of commands by a plurality of cryptographic algorithm cores in a network processor.
US-8,065,677 Method, device, and system for seamless migration of a virtual machine between platforms with different I/O...
A method, apparatus, system, and computer readable medium are disclosed. In one embodiment the method includes detecting a virtual machine (VM) attempting to...
US-8,065,576 Test access port
A semiconductor chip is described having a plurality of processing cores. The semiconductor chip also includes a plurality of test controllers. Each test...
US-8,065,555 System and method for error correction in cache units
A method and a processor may include storing a first set of data in a data array in a cache unit substantially concurrently to reading a second set of data from...
US-8,065,543 Method, system, and apparatus for dynamic clock adjustment
A method, apparatus, article of manufacture, and system, the method including, in some embodiments, determining an impedance of a power distribution network of...
US-8,065,501 Indexing a translation lookaside buffer (TLB)
A processor is to comprise a central processing unit (CPU), an address generation unit (AGU), an index generation unit and a translation look-aside buffer...
US-8,065,491 Efficient non-transactional write barriers for strong atomicity
A method and apparatus for providing optimized strong atomicity operations for non-transactional writes is herein described. Locks are acquired upon initial...
US-8,065,490 Hardware acceleration of strongly atomic software transactional memory
In accordance with some embodiments, software transactional memory may be used for both managed and unmanaged environments. If a cache line is resident in a...
US-8,065,488 Mechanism for effectively caching streaming and non-streaming data patterns
A method and apparatus for efficiently caching streaming and non-streaming data is described herein. Software, such as a compiler, identifies last use streaming...
US-8,065,441 Method and apparatus for supporting universal serial bus devices in a virtualized environment
A method for performing virtualization, includes managing data between a virtual machine and a bus controller by transmitting an input output (IO) request from...
US-8,065,440 Enabling and disabling device images on a platform without disrupting BIOS or OS
Device images, for example IDE mass storage device images, may be enabled and disabled without disrupting a host system. In one embodiment, the invention...
US-8,064,944 Power control with signal quality estimation for smart antenna communications systems
A method for power control with signal quality estimation for smart antenna communications system is described. The method, for example, starts with a transmit...
US-8,064,928 System and method for providing location based services (LBS) to roaming subscribers in a wireless access network
Embodiments of a wireless access network and method for providing a location based service (LBS) to a visiting mobile station are disclosed. In some...
US-8,064,828 Techniques for wireless personal area network communications with efficient spatial reuse
An embodiment of the present invention provides an apparatus, comprising at least one transceiver operable in a wireless personal area network (WPAN), wherein...
US-8,064,728 Traceability marks
The formation of marks on devices is described. In one embodiment, a method for marking a device includes forming a plurality of unique marks sequentially on a...
US-8,064,682 Defect analysis
In one embodiment, a method to analyze a semiconductor wafer comprises extracting inline defect data from a data source, counting a total number of inline...
US-8,064,605 Methods and apparatus for providing upgradeable key bindings for trusted platform modules
A processing system with a trusted platform module (TPM) supports migration of digital keys. For instance, an application in the processing system may create a...
US-8,064,536 Link calibration
In some embodiments, provided are methods and circuits to control the power efficiency of a transceiver or a transmitter in a scalable I/O link (a link whose...
US-8,064,476 Techniques for quick access channel information loading in wireless networks
An embodiment of the present invention provides a method of quick access channel information loading in wireless networks, comprising mapping at least one quick...
US-8,064,332 Avoiding collisions between users if map containing persistent scheduling information is lost
Briefly, in accordance with one or more embodiments, a MAP may be used by a base station to allocate network users for one or more users in a wireless network...
US-8,064,265 Programming bit alterable memories
Program failures during programming can be corrected during reading using an error correcting code. This allows an array to pass programming more readily,...
US-8,064,237 Identifying and accessing individual memory devices in a memory channel
In one embodiment of the invention, a memory integrated circuit is provided including a memory array, a register, and control logic coupled to the register. The...
US-8,064,224 Microelectronic package containing silicon patches for high density interconnects, and method of manufacturing same
A microelectronic package comprises a substrate (110), a silicon patch (120) embedded in the substrate, a first interconnect structure (131) at a first location...
US-8,063,907 Apparatus and method for selectable hardware accelerators in a data driven architecture
A method and apparatus employing selectable hardware accelerators in a data driven architecture are described. In one embodiment, the apparatus includes a...
US-8,063,618 Supply voltage control based at least in part on power state of integrated circuit
For one disclosed embodiment, switching voltage regulator circuitry may be controlled to supply a voltage to at least a portion of an integrated circuit....
US-8,063,482 Heat spreader as mechanical reinforcement for ultra-thin die
A technique to fabricate a package. A thin wafer supported by a wafer support substrate (WSS) is formed. The WSS-supported thin wafer layer is diced into a...
US-8,063,460 Spin torque magnetic integrated circuits and devices therefor
Spin torque magnetic integrated circuits and devices therefor are described. A spin torque magnetic integrated circuit includes a first free ferromagnetic layer...
US-8,063,447 Multiple-gate transistors and processes of making same
A microelectronic device includes a P-I-N (p+ region, intrinsic semiconductor, and n+ region) semiconductive body with a first gate and a second gate. The first...
US-8,063,382 Ozone-free ionic wind
In one embodiment, an air mover may include a first electrode, a second electrode and an ionization device to selectively ionize molecules in an electric field...
US-8,063,375 Sensible motion detector
According to some embodiments, an apparatus having a first sensor having a first adjustable lens and a second sensor having a second adjustable lens is...
US-8,062,921 Phase change memories with improved programming characteristics
A phase change memory may be made with improved speed and stable characteristics over extended cycling. The alloy may be selected by looking at alloys that...
US-8,062,841 Multiplex data collection and analysis in bioanalyte detection
Method and device to collect multiplex data simultaneously in analyte detection and analyze the data by experimentally trained software (machine-learning) is...
US-8,060,876 Methods and apparatus for creating an isolated partition for a virtual trusted platform module
A data processing system isolates a virtual trusted platform module (vTPM) manager in the processing system from other management software in the processing...
US-8,060,762 Processor power management associated with workloads
Some embodiments provide determination of a processor performance characteristic associated with a first workload, and determination of a processor performance...
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