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Patent # Description
US-8,214,598 System, method, and apparatus for a cache flush of a range of pages and TLB invalidation of a range of entries
Systems, methods, and apparatus for performing the flushing of a plurality of cache lines and/or the invalidation of a plurality of translation look-aside...
US-8,214,596 Apparatus and method for segmented cache utilization
In some embodiments, a non-volatile cache memory may include a segmented non-volatile cache memory configured to be located between a system memory and a mass...
US-8,214,574 Event handling for architectural events at high privilege levels
Methods and apparatus to perform event handling operations are described. In one embodiment, after an event (such as an architectural event occurs), the...
US-8,214,573 Method and system for handling a management interrupt event in a multi-processor computing device
A method and system for handling a management interrupt, such as a system management interrupt (SMI) and/or a platform management interrupt (PMI), includes...
US-8,214,525 Addresses assignment for adaptor interfaces
An initial configuration is maintained assigning multiple local interfaces to one initial local address. For each local interface, a remote address of a remote...
US-8,214,414 Combined set bit count and detector logic
A merged datapath for PopCount and BitScan is described. A hardware circuit includes a compressor tree utilized for a PopCount function, which is reused by a...
US-8,214,237 Methods and apparatus for resource allocation in computer architectures
Methods and apparatuses for searching for an optimal resource allocation configuration are disclosed. First and second configurations for allocating resources...
US-8,213,894 Integrated circuit passive signal distribution
For one disclosed embodiment, an integrated circuit may comprise an internal transmission line in one or more layers of the integrated circuit. The internal...
US-8,213,887 Pre-distorting a transmitted signal for offset cancellation
In one embodiment, the present invention includes a pre-driver to receive data of a first clock phase and to pre-drive the data, a driver coupled to the...
US-8,213,804 Semiconductor optical amplifier for an external cavity diode laser
In one embodiment, a gain medium for an external cavity diode laser (ECDL) includes a gain section to provide a gain operation on optical energy in the ECDL...
US-8,213,618 Protecting content on client platforms
A method, computer system, and computer-readable medium with instructions to provide a client security management layer and a content player that ensure that...
US-8,213,542 Highly optimized digital IQ transmitter chain
Circuitry separates a modulation signal into digital sign and magnitude signal components. The digital magnitude signal is converted to an analog magnitude...
US-8,213,528 Apparatus and associated methods to perform space-frequency interleaving in a multicarrier wireless...
An apparatus and associated methods for performing space-frequency interleaving in a multicarrier wireless communication system is generally described.
US-8,213,344 Method and apparatus for antenna allocation on a multi-radio platform
In a multi-radio wireless device, a first radio and a second radio share a plurality of antennas. A MAC coordination engine may coordinate the activities of the...
US-8,213,305 Dynamic service management for multicore processors
A system, apparatus, method and article to perform dynamic service management for multicore processors are described. The apparatus may include, for example, a...
US-8,213,303 Generating, at least in part, and/or receiving, at least in part, at least one request
In an embodiment, an apparatus is provided that may include circuitry to generate, at least in part, and/or receive, at least in part, at least one request that...
US-8,213,291 Wireless data transmission methods, devices, and systems
Method and system for creating a radio block header that identifies a selected data block, a first compression scheme to compress a first encoded instance of...
US-8,213,145 Output driver protection
Embodiments of an output driver comprising a switching module configured to multiplex a protection transistor between a protection mode and a current mirror...
US-8,212,542 Load adaptive power delivery
Embodiments disclosed herein include a power monitor and controller which are used to control the operation of a voltage regulator depending on an operating...
US-8,212,350 Space and cost efficient incorporation of specialized input-output pins on integrated circuit substrates
In some embodiments an Integrated Circuit package includes a plurality of system functional pins, at least one system functional pin depopulation zone, and at...
US-8,212,183 Method and apparatus for utilizing thermal energy generated by medical diagnostic devices
This invention relates to the use of system thermal energy generated by equipment, such as an ultrasound sensing device, to transfer heat to the ...
US-8,211,772 Two-dimensional condensation for uniaxially strained semiconductor fins
Techniques are disclosed for enabling multi-sided condensation of semiconductor fins. The techniques can be employed, for instance, in fabricating fin-based...
US-8,211,771 Multiple-gate transistors and processes of making same
A microelectronic device includes a P-I-N (p+ region, intrinsic semiconductor, and n+ region) semiconductive body with a first gate and a second gate. The first...
US-8,211,501 Fluorination pre-treatment of heat spreader attachment indium thermal interface material
The formation of electronic assemblies including a heat spreader coupled to a die through a thermal interface material formed from an indium preform, is...
US-8,209,989 Microarchitecture control for thermoelectric cooling
An integrated circuit is cooled by microarchitecture controlled Peltier effect cooling. In one embodiment, a temperature sensor thermally coupled to at least a...
US-8,209,689 Live lock free priority scheme for memory transactions in transactional memory
A method and apparatus for avoiding live-lock during transaction execution is herein described. Counting logic is utilized to track successfully committed...
US-8,209,609 Audio-visual search and browse interface (AVSBI)
An audio-visual search and browse interface (AVSBI) is described. In an embodiment, a user interface module displays one or more media collections, where each...
US-8,209,579 Generalized multi-threshold decoder for low-density parity check codes
Methods, apparatus, and systems are provided for error correction of a communication signal. A generalized multiple threshold scheme for iteratively decoding a...
US-8,209,574 Correcting for data losses with feedback and response
A digital content transmission and reception system that uses feedback and re-transmission of missing content is described. A content transmission system...
US-8,209,563 Strategy to verify asynchronous links across chips
Various embodiments of the invention provide a frequency shifter to vary the frequency of data transmitted over time, such as to increase and decrease the...
US-8,209,559 Low power polling techniques
Techniques are described to provide the capability to halt execution of a thread by a processor and potentially lower power consumption of the processor while...
US-8,209,551 Security for RAID systems
Methods and apparatus for accessing a redundant array of independent drives (RAID) storage device are disclosed. In some embodiments file data is broken into...
US-8,209,542 Methods and apparatus for authenticating components of processing systems
When a processing system boots, it may retrieve an encrypted version of a cryptographic key from nonvolatile memory to a processing unit, which may decrypt the...
US-8,209,523 Data moving processor
A data moving processor includes a code memory coupled to a code fetch circuit and a decode circuit coupled to the code fetch circuit. An address stack is...
US-8,209,493 Systems and methods for scheduling memory requests during memory throttling
Embodiments of the invention are generally directed to systems, methods, and apparatuses for improving power/performance tradeoffs associated with multi-core...
US-8,209,490 Protocol for maintaining cache coherency in a CMP
The present application is a protocol for maintaining cache coherency in a CMP. The CMP design contains multiple processor cores with each core having it own...
US-8,209,480 DRAM selective self refresh
In some embodiments, an electronic apparatus comprises a communication interface, an input/output interface, a processor, and logic to collect, in the...
US-8,209,466 Methods and systems to allocate addresses in a high-endurance/low-endurance hybrid flash memory
Methods and systems to selectively map higher-usage addresses to higher-endurance memory cells of a flash memory, and lower-usage addresses to lower-endurance...
US-8,209,456 Integrating non-peripheral component interconnect (PCI) resources into a personal computer system
In one embodiment, the present invention includes an apparatus having an adapter to communicate according to a personal computer (PC) protocol and a second...
US-8,208,877 Digital modulator and method for initiating ramp power transitions in a mobile handset transmitter
A digital modulator for a portable handset using 8PSK or EDGE modulation with a direct launch transmitter is used to controllably adjust the transmit power of...
US-8,208,741 Low-latency remote display rendering using tile-based rendering systems
Apparatus, systems and methods for low latency remote display rendering using tile-based rendering systems are disclosed. In one implementation, a system...
US-8,208,560 Bit depth enhancement for scalable video coding
A video system includes an analyzer and a bit depth predictor. The analyzer receives a first coded video signal, which is indicative of first values for pixels....
US-8,208,539 Dynamically configuring a video decoder cache for motion compensation
A video decoder cache used for motion compensation data may be dynamically reconfigured. In some embodiments, it may be reconfigured on picture or frame...
US-8,208,305 Arrangement of pairs of NAND strings that share bitline contacts while utilizing distinct sources lines
A non-volatile microelectronic memory that has a memory cell array, which includes memory cell string pairs that share a bitline contact, that have separate...
US-8,208,250 External thermal solution for a mobile computing device
A method, system, and apparatus are disclosed. In one embodiment method includes causing a cooling medium to flow through a hollow cable. The cable couples an...
US-8,207,978 Simplification of 3D texture address computation based on aligned, non-perspective objects
Apparatus, systems and methods for the simplification of 3D texture address computations based on aligned, non-perspective objects are disclosed. For example, a...
US-8,207,770 Digital phase lock loop
An apparatus may comprise a time-to-digital circuit architecture. Other embodiments are described and claimed.
US-8,207,453 Glass core substrate for integrated circuit devices and methods of making the same
Disclosed are embodiments of a glass core substrate for an integrated circuit (IC) device. The glass core substrate includes a glass core and build-up...
US-8,207,057 Microball assembly methods, and packages using maskless microball assemblies
A method of forming a microball grid array includes adhering a microball precursor material to a transfer medium under conditions to reflect a selective charge...
US-8,206,460 Security system
Described herein are one or more implementations of a security system for one or more protected devices. The security system implements an authentication system...
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