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Patent # Description
US-7,872,864 Dual chamber sealed portable computer
In general, in one aspect, the disclosure describes a laptop computer that can allow for enhanced cooling of a passively cooled notebook while maintaining the...
US-7,872,598 Accelerated decompression
Techniques for decompressing a compressed input by determining, according to an ordering of allowable codewords, an offset for a variable length codeword...
US-7,871,916 Transistor gate electrode having conductor material layer
Various embodiments of the invention relate to a PMOS device having a transistor channel of silicon germanium material on a substrate, a gate dielectric having a...
US-7,871,569 Biosensor utilizing a resonator having a functionalized surface
Systems and methods for detecting the presence of biomolecules in a sample using biosensors that incorporate resonators which have functionalized surfaces for...
US-7,870,565 Systems and methods for secure host resource management
Systems and methods are described herein to provide for secure host resource management on a computing device. Other embodiments include apparatus and system for...
US-7,870,545 Protecting shared variables in a software transactional memory system
For a variable accessed at least once in a software-based transactional memory system (STM) defined (STM-defined) critical region of a program, modifying an...
US-7,870,382 Auditable and track-able key distribution and installation system and method for wireless networks
An auditable and track-able key distribution and installation method and system for wireless networks. The method includes registering an installation device and...
US-7,870,373 System and method for automatic update of embedded data
A system and method for maintaining computer platform components in an optimal state. The method determines whether a platform includes an out-of-band processor,...
US-7,870,363 Methods and arrangements to remap non-volatile storage
Methods and arrangements for remapping the map between logical space and physical space in non-volatile storage are described. Embodiments include ...
US-7,870,268 Method, system, and program for managing data transmission through a network
Provided are a method, system, and program for managing data transmission from a source to a destination through a network. The destination imposes a window...
US-7,870,081 Parallelization of bayesian network structure learning
A master computing node directs parallel structure learning with intelligent computational task distribution. The master computing node may determine what...
US-7,869,809 Radio resource measurement and estimation
Apparatus and systems, as well as methods and articles, may operate to conduct radio measurement request and response operations between two stations to...
US-7,869,660 Parallel entropy encoding of dependent image blocks
A method of entropy encoding image or video data may include entropy encoding a number of blocks independently and in parallel to generate a number of bit...
US-7,869,334 Seek-scan probe (SSP) memory with sharp probe tips formed at CMOS-compatible temperatures
Embodiments of a process comprising forming one or more micro-electro-mechanical (MEMS) probe on a conductive metal oxide semiconductor (CMOS) wafer, wherein...
US-7,869,228 Power delivery systems and methods with dynamic look-up table
According to some embodiments, information about a power delivery stage is determined for a plurality of operating condition values. The determined information...
US-7,868,897 Apparatus and method for memory address re-mapping of graphics data
A method and apparatus for creating, updating, and using guest physical address (GPA) to host physical address (HPA) shadow translation tables for translating...
US-7,868,318 Quantum well field-effect transistors with composite spacer structures, apparatus made therewith, and methods...
A quantum well (QW) layer is provided in a semiconductive device. The QW layer is covered with a composite spacer above QW layer. The composite spacer includes...
US-7,867,891 Dual metal interconnects for improved gap-fill, reliability, and reduced capacitance
Embodiments of apparatus and methods for forming dual metal interconnects are described herein. Other embodiments may be described and claimed.
US-7,867,863 Method for forming self-aligned source and drain contacts using a selectively passivated metal gate
A transistor structure includes a semiconductor substrate with a first surface, a diffusion region at the first surface of the substrate, a sacrificial gate...
US-7,867,843 Gate structures for flash memory and methods of making same
A process may include forming a polysilicon pinnacle above and on a polysilicon island and further forming a floating gate from the polysilicon pinnacle and...
US-7,867,787 Forming inductor and transformer structures with magnetic materials using damascene processing for integrated...
Methods and associated structures of forming microelectronic devices are described. Those methods may include forming a first layer of magnetic material and at...
US-7,867,786 Ferroelectric layer with domains stabilized by strain
The present invention describes a method including: providing a substrate; forming an underlying layer over the substrate; heating the substrate; forming a...
US-7,867,687 Methods and compositions for reducing line wide roughness
Embodiments of the invention provide a non-chemically amplified photoresist, which results in reduced line wide roughness (LWR). In accordance with one...
US-7,867,003 Wire bale independent load mechanism
Electronic assemblies are described. One embodiment includes a circuit board and a socket coupled to the circuit board. The assembly also includes a load...
US-7,865,886 Blocking of nested loops having feedback or feedforward indexes
A method and apparatus for to blocking nested loops having feedback or feedforward indexing. An embodiment of a method includes receiving a computer code...
US-7,865,885 Using transactional memory for precise exception handling in aggressive dynamic binary optimizations
Dynamic optimization of application code is performed by selecting a portion of the application code as a possible transaction. A transaction has a property that...
US-7,865,823 Method and apparatus for schema validation
In one embodiment, the invention may include receiving an XML schema and document with first, second, third, and fourth nodes. The second and third nodes may...
US-7,865,822 Method and apparatus for parallel validation of documents
A method for validating a document by fragmenting the document, validating elements fully contained in each single fragment and validating elements spanning two...
US-7,865,775 Remote firmware recovery
Embodiments of the present invention provide methods, systems, and apparatus for instantiating, by a computing system, a firmware recovery module in response to...
US-7,865,762 Methods and apparatus for handling errors involving virtual machines
A virtual machine monitor (VMM) in a data processing system handles errors involving virtual machines (VMs) in the processing system. For instance, an error...
US-7,865,753 Resource power controller to return a resource to an up state based on an estimate of a size of a gap in data...
Embodiments of the invention are generally directed to systems, methods, and apparatuses for a resource power controller. In some embodiments, an integrated...
US-7,865,752 Port-based packet filter
A method, apparatus, and program product for reducing unwanted host wake-up messages. A host computer finds a port in use by a host application, selects program...
US-7,865,751 Microarchitecture controller for thin-film thermoelectric cooling
A device having multiple cores executes an algorithm to control Thin-Film Thermoelectric Coolers (TFTEC) that employ the Peltier effect to remove heat from the...
US-7,865,740 Logging changes to blocks in a non-volatile memory
Provided are a method and device for logging changes to blocks in a non-volatile memory. Security bits are maintained for blocks of cells in a non-volatile...
US-7,865,712 Method and apparatus for booting a processing system
Machine-readable media, methods, apparatus and system for booting a processing system are described. In an embodiment, whether an encrypted version of a closed...
US-7,865,683 Identifier associated with memory locations for managing memory accesses
Embodiments of apparatuses, articles, methods, and systems for associating identifiers with memory locations for controlling memory accesses are generally...
US-7,865,670 Invalidating translation lookaside buffer entries in a virtual machine (VM) system
One embodiment of the present invention is a technique to invalidate entries in a translation lookaside buffer (TLB). A TLB in a processor has a plurality of TLB...
US-7,865,634 Managing a buffer for media processing
A method and apparatus to perform buffer management for media processing are described.
US-7,865,370 Content filtering for a digital audio signal
According to some embodiments, content filtering is provided for a digital audio signal.
US-7,865,196 Device, system, and method of coordinating wireless connections
Embodiments of the present invention provide a method, apparatus and system for wireless stations periodically operating over a channel pre-designated for...
US-7,864,864 Context buffer address determination using a plurality of modular indexes
According to some embodiments, context information is accessed for a current image block being processed. The context information may be, for example, associated...
US-7,864,768 Device, system and method of multicast/broadcast communication
An embodiment of the present invention provides an apparatus, comprising a transmitter to transmit, in response to an incoming multicast communication frame...
US-7,864,720 Power management for wireless devices
In some embodiments, a method to manage power in a wireless communication device, comprises in a wireless networking adaptor, changing an operational status of a...
US-7,864,701 Apparatus, system and method capable of decreasing management frame size in wireless networks
An embodiment of the present invention provides an apparatus, comprising a transceiver capable of transmitting decreased size management messages in a wireless...
US-7,864,604 Multiple address outputs for programming the memory register set differently for different DRAM devices
A method, device, and system are disclosed. In one embodiment, the method includes programming a first On Die Termination (ODT) value into a first plurality of...
US-7,864,189 Converting color data to a color palette
In one embodiment, the present invention includes a method to convert a pixel tuple in a red, green, blue (RGB) color space having R, G, and B color values into...
US-7,864,177 System and methods for real-time rendering with global and specular illumination
Frames of image data representative of a scene containing deformable geometry are computed for display on a display device. Frame animation data is computed for...
US-7,863,710 Dislocation removal from a group III-V film grown on a semiconductor substrate
Dislocation removal from a group III-V film grown on a semiconductor substrate is generally described. In one example, an apparatus includes a semiconductor...
US-7,861,406 Method of forming CMOS transistors with dual-metal silicide formed through the contact openings
Methods and associated structures of forming a microelectronic device are described. Those methods may include amorphizing at least one contact area of a...
US-7,861,249 Thread to thread communication
Thread to thread communication is provided. A first thread registers with a gateway for receiving communication. Registration includes identifying a location for...
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