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Patent # Description
US-7,882,498 Method, system, and program of a compiler to parallelize source code
Provided are a method, system, and program for parallelizing source code with a compiler. Source code including source code statements is received. The source...
US-7,882,415 3-Stripes gilbert low density parity-check codes
A method and apparatus are provided for a coding process of a communication signal. A 3-stripes parity-check matrix is generated from a parity-check matrix of a...
US-7,882,381 Managing wasted active power in processors based on loop iterations and number of instructions executed since...
Methods of managing wasted active power of processors in computer systems and other electronic devices are disclosed. In one aspect, a method may include...
US-7,882,341 System and method to enable parallelization of early platform initialization
In some embodiments, the invention involves reducing the time required for a platform to boot to its target application/operating-system using parallelization of...
US-7,882,339 Primitives to enhance thread-level speculation
A processor may include an address monitor table and an atomic update table to support speculative threading. The processor may also include one or more...
US-7,882,325 Method and apparatus for a double width load using a single width load port
A single micro-instruction to perform either an N-bit or a 2N-bit load is provided. A microprocessor having an N-bit load port performs either an N-bit load or a...
US-7,882,318 Tamper protection of software agents operating in a vitual technology environment methods and apparatuses
Methods, apparatuses, articles, and systems for comparing a first security domain of a first memory page of a physical device to a second security domain of a...
US-7,882,311 Non-snoop read/write operations in a system supporting snooping
Techniques that may utilize generic tracker structures to provide data coherency in a multi-node system that supports non-snoop read and write operations. The...
US-7,882,255 Method and apparatus for maintaining local area network ("LAN") and wireless LAN ("WLAN") security associations
Cooperating entities share a signaling interface. Each entity establishes a security association between itself and an endpoint, and one of the entities...
US-7,881,698 Network based archiving of user-specific information in a communication system
User-specific information (e.g., call log information, contact information, etc.) normally stored within a mobile user device associated with a user is also...
US-7,881,614 Optically connecting computer components
A central component of a processor based system, the central component including a processor and an optical interface to transmit data encoded as an optical...
US-7,881,475 Systems and methods for negotiating security parameters for protecting management frames in wireless networks
Systems and methods provide a mechanism for wireless stations and access points to negotiate security parameters for protecting management frames. The access...
US-7,881,470 Network mobility security management
A node that couples to the Internet establishes a secure connection with another node that couples to the Internet. The secure connection to be established via...
US-7,881,391 OFDM receiver and method for decoding OFDM symbols of two or more data streams with reduced multiplication...
Embodiments of an OFDM receiver and methods for decoding OFDM symbols of two or more data streams with reduced multiplication operations are generally described...
US-7,881,390 Increased discrete point processing in an OFDM communication system
Methods and apparatus provide increased symbol length with more subcarriers in a fixed-bandwidth system. The subcarriers spacing may be reduced to provide...
US-7,881,341 Reconfigurable media controller to accommodate multiple data types and formats
A media controller is reconfigurable to handle different formats and types of data. In one embodiment, the invention includes a media access controller coupled...
US-7,880,837 Black and white color cholesteric liquid crystal display
A cholesteric display may be formed, in some embodiments, using a single display element to produce multi-colors for display. A cholesteric material may be...
US-7,880,310 Direct device attachment on dual-mode wirebond die
A dual-mode integrated circuit comprises wirebondable and solderable electrical connectors.
US-7,880,284 Embedded power gating
With embodiments disclosed herein, the distribution of gated power is done using on-die layers without having to come back out and use package layers.
US-7,880,231 Integration of a floating body memory on SOI with logic transistors on bulk substrate
A method and the resultant memory is described for forming an array of floating body memory cells and logic transistors on an SOI substrate. The floating bodies...
US-7,880,124 Assembly packaging using induction heating
An embodiment of the present invention is a technique to package a device. Heat is localized on a die having bumps on a package substrate using a first induction...
US-7,879,764 Electrically active combinatorial chemical (EACC) chip for biochemical analyte detection
Apparatus and methods are disclosed for electrically active combinatorial-chemical (EACC) chips for biochemical analyte detection. An apparatus includes a...
US-7,879,739 Thin transition layer between a group III-V substrate and a high-k gate dielectric layer
Embodiments of the invention provide a method to form a high-k dielectric layer on a group III-V substrate with substantially no oxide of the group III-V...
US-7,879,675 Field effect transistor with metal source/drain regions
A semiconductor device comprising a gate electrode formed on a gate dielectric layer formed on a semiconductor film. A pair of source/drain regions are formed...
US-7,878,016 Device and method for on-die temperature measurement
A system for measuring and managing thermal operations of a processor core on a semiconductor die using a sensor positioned in a hotspot of the processor core. A...
US-7,877,666 Tracking health of integrated circuit structures
Methods and apparatus to track the health of integrated circuit structures are described. In an embodiment, a counter may be updated when the status of a portion...
US-7,877,589 Configuring a device for operation on a computing platform
A method which includes initializing a device following a power cycle. The initialization includes an agent for the device implementing one or more command...
US-7,877,583 Method and apparatus for assigning thread priority in a processor or the like
In a multi-threaded processor, thread priority variables are set up in memory. The actual assignment of thread priority is based on the expiration of a thread...
US-7,877,519 Selecting one of a plurality of adapters to use to transmit a packet
Provided are a method, system, and program for selecting one of a plurality of adapters to use to transmit a packet. A packet is generated by a protocol driver...
US-7,877,504 Techniques for entry lookups
Techniques to store entries so that minimal sequential memory accesses are used to determine all relevant entries. Entries may be grouped into blocks. The order...
US-7,877,339 Method and system of creating an approximate kernel matrix to train a kernel machine
A method and system of creating an approximate kernel matrix to train a kernel machine. In one embodiment of the invention, a set of kernel machine training data...
US-7,877,099 Computing system with off-load processing for networking related tasks
A method is described that comprises executing a service selection method on an off load processor of a computing system to select an available network service...
US-7,876,839 Receiver and method for channel estimation for multicarrier communication systems
Embodiments of system and method for generating channel estimates in a wireless network are generally described herein. Other embodiments may be described and...
US-7,876,765 Method for supporting IP network interconnectivity between partitions in a virtualized environment
A method for preventing loopback of data packets sent between entities residing on a single host. In one embodiment, an auxiliary address shared among entities...
US-7,876,313 Graphics controller, display controller and method for compensating for low response time in displays
Embodiments of a graphics controller, display controller and method for compensating for low-response-time (LRT) displays are generally described herein. Other...
US-7,875,973 Package substrate including surface mount component mounted on a peripheral surface thereof and microelectronic...
A microelectronic combination and a method of making the combination. The combination includes a package substrate including a substrate body having a peripheral...
US-7,875,937 Semiconductor device with a high-k gate dielectric and a metal gate electrode
A semiconductor device is described. That semiconductor device comprises a high-k gate dielectric layer that is formed on a substrate that applies strain to the...
US-7,875,934 Semiconductor substrate with islands of diamond and resulting devices
Disclosed is a method of forming a substrate having islands of diamond (or other material, such as diamond-like carbon), as well as integrated circuit devices...
US-7,875,932 Semiconductor on insulator apparatus
A method and apparatus for producing a relatively thin, relatively uniform semiconductor layer which has improved carrier mobility. In an embodiment, a...
US-7,875,519 Metal gate structure and method of manufacturing same
A method of manufacturing a metal gate structure includes providing a substrate (110) having formed thereon a gate dielectric (120), a work function metal (130)...
US-7,875,503 Reducing underfill keep out zone on substrate used in electronic device processing
Electronic devices and methods for fabricating electronic devices are described. One method includes providing a substrate with a die attach area, and forming a...
US-7,875,415 Helical pixilated photoresist
A helical pixilated photoresist includes a photoacid generator, a photoimageable polymer comprising a self-assembly moiety and a solubility switch, the...
US-7,873,943 Inserting stack clearing code in conservative garbage collection
A location to insert stack clearing code into a method to be executed in an execution environment of a computer system is determined. The stack clearing code is...
US-7,873,892 Techniques to perform forward error correction for an electrical backplane
Techniques to perform forward error correction for an electrical backplane are described. An apparatus comprises a physical layer unit having a forward error...
US-7,873,846 Enabling a heterogeneous blade environment
In one embodiment, the present invention includes a method for receiving a request for power-up of a first blade of a chassis, enabling the first blade to...
US-7,873,698 Alert management messaging
Techniques are described for providing alert management messages in a broadcast environment to individual recipients or to identifiable groups of recipients.
US-7,873,522 Measurement of spoken language training, learning and testing
The fluency of a spoken utterance or passage is measure and presented to the speaker and to others. In one embodiment, a method is described that includes...
US-7,873,134 Clock generation system
Disclosed herein are clock generator systems comprising first and second stage PLLs thereby allowing for both lower PLL bandwidth filtering and higher bandwidth...
US-7,873,068 Flexibly integrating endpoint logic into varied platforms
An integrated endpoint having a virtual port coupled between an upstream fabric and an integrated device fabric that includes a multi-function logic to handle...
US-7,872,892 Identifying and accessing individual memory devices in a memory channel
In one embodiment of the invention, a memory integrated circuit is provided including a memory array, a register, and control logic coupled to the register. The...
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