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Patent # Description
US-7,865,753 Resource power controller to return a resource to an up state based on an estimate of a size of a gap in data...
Embodiments of the invention are generally directed to systems, methods, and apparatuses for a resource power controller. In some embodiments, an integrated...
US-7,865,752 Port-based packet filter
A method, apparatus, and program product for reducing unwanted host wake-up messages. A host computer finds a port in use by a host application, selects program...
US-7,865,751 Microarchitecture controller for thin-film thermoelectric cooling
A device having multiple cores executes an algorithm to control Thin-Film Thermoelectric Coolers (TFTEC) that employ the Peltier effect to remove heat from the...
US-7,865,740 Logging changes to blocks in a non-volatile memory
Provided are a method and device for logging changes to blocks in a non-volatile memory. Security bits are maintained for blocks of cells in a non-volatile...
US-7,865,712 Method and apparatus for booting a processing system
Machine-readable media, methods, apparatus and system for booting a processing system are described. In an embodiment, whether an encrypted version of a closed...
US-7,865,683 Identifier associated with memory locations for managing memory accesses
Embodiments of apparatuses, articles, methods, and systems for associating identifiers with memory locations for controlling memory accesses are generally...
US-7,865,670 Invalidating translation lookaside buffer entries in a virtual machine (VM) system
One embodiment of the present invention is a technique to invalidate entries in a translation lookaside buffer (TLB). A TLB in a processor has a plurality of TLB...
US-7,865,634 Managing a buffer for media processing
A method and apparatus to perform buffer management for media processing are described.
US-7,865,370 Content filtering for a digital audio signal
According to some embodiments, content filtering is provided for a digital audio signal.
US-7,865,196 Device, system, and method of coordinating wireless connections
Embodiments of the present invention provide a method, apparatus and system for wireless stations periodically operating over a channel pre-designated for...
US-7,864,864 Context buffer address determination using a plurality of modular indexes
According to some embodiments, context information is accessed for a current image block being processed. The context information may be, for example, associated...
US-7,864,768 Device, system and method of multicast/broadcast communication
An embodiment of the present invention provides an apparatus, comprising a transmitter to transmit, in response to an incoming multicast communication frame...
US-7,864,720 Power management for wireless devices
In some embodiments, a method to manage power in a wireless communication device, comprises in a wireless networking adaptor, changing an operational status of a...
US-7,864,701 Apparatus, system and method capable of decreasing management frame size in wireless networks
An embodiment of the present invention provides an apparatus, comprising a transceiver capable of transmitting decreased size management messages in a wireless...
US-7,864,604 Multiple address outputs for programming the memory register set differently for different DRAM devices
A method, device, and system are disclosed. In one embodiment, the method includes programming a first On Die Termination (ODT) value into a first plurality of...
US-7,864,189 Converting color data to a color palette
In one embodiment, the present invention includes a method to convert a pixel tuple in a red, green, blue (RGB) color space having R, G, and B color values into...
US-7,864,177 System and methods for real-time rendering with global and specular illumination
Frames of image data representative of a scene containing deformable geometry are computed for display on a display device. Frame animation data is computed for...
US-7,863,710 Dislocation removal from a group III-V film grown on a semiconductor substrate
Dislocation removal from a group III-V film grown on a semiconductor substrate is generally described. In one example, an apparatus includes a semiconductor...
US-7,861,406 Method of forming CMOS transistors with dual-metal silicide formed through the contact openings
Methods and associated structures of forming a microelectronic device are described. Those methods may include amorphizing at least one contact area of a...
US-7,861,249 Thread to thread communication
Thread to thread communication is provided. A first thread registers with a gateway for receiving communication. Registration includes identifying a location for...
US-7,861,245 Method and apparatus for facilitating recognition of an open event window during operation of guest software in...
In one embodiment, a method includes transitioning control to a virtual machine (VM) upon receiving a request from a virtual machine monitor (VMM), determining...
US-7,861,116 Device, system, and method for optimized concurrent error detection
A method, apparatus and system for accepting a plurality of user-selected properties pre-designated for detecting errors in portions of a circuit, accepting a...
US-7,861,099 Method and apparatus for user-activity-based dynamic power management and policy creation for mobile platforms
A method and apparatus for user activity-based dynamic power management and policy creation for mobile platforms are described. In one embodiment, the method...
US-7,861,098 Method and apparatus for user-activity-based dynamic power management and policy creation for mobile platforms
A method and apparatus for user activity-based dynamic power management and policy creation for mobile platforms are described. In one embodiment, the method...
US-7,861,068 Method and apparatus for using dynamic workload characteristics to control CPU frequency and voltage scaling
An electronic system may include a memory storing processor-executable program code and a processor in communication with the memory and operative in conjunction...
US-7,861,053 Supporting un-buffered memory modules on a platform configured for registered memory modules
A RDIMM enabled memory controller may support a UDIMM by way of a register chip and a PLL chip being implemented in operational relationship with a memory slot...
US-7,861,027 Providing a peripheral component interconnect (PCI)-compatible transaction level protocol for a system on a...
In one embodiment, the present invention includes an apparatus having an adapter to communicate according to a personal computer (PC) protocol and a second...
US-7,861,024 Providing a set aside mechanism for posted interrupt transactions
In one embodiment, a method includes receiving an incoming posted transaction in a processor complex from a peripheral device, determining if the transaction is...
US-7,860,469 Sleep optimization for mobile devices in a wireless network
Briefly, in accordance with one or more embodiments, a subscriber station in sleep mode is capable of sending and/or receiving traffic during sleep mode without...
US-7,860,240 Native composite-field AES encryption/decryption accelerator circuit
A system comprises reception of input data of a Galois field GF(2.sup.k), mapping of the input data to a composite Galois field GF(2.sup.nm), where k=nm,...
US-7,860,183 Multiple-input multiple-output multicarrier communication system with joint transmitter and receiver adaptive...
A system for communicating through a multicarrier communication channel estimates a channel transfer function H.sub.nm(K) each of a plurality of subcarriers of a...
US-7,860,129 Device, system and method for data transfer optimization
Devices, systems and methods for data transfer optimization. A computing platform may, for example, modify a first property of a communication network in...
US-7,860,105 Connections of nodes on different networks
A connection is established between a node on a first network and at least one node on a second network lacking a valid address on the first network by receiving...
US-7,859,298 Method and system to facilitate configurable input/output (I/O) termination voltage reference
A method and system to facilitate configurable input/output (I/O) termination voltage reference in a transmitter or receiver. In one embodiment of the invention,...
US-7,859,081 Capacitor, method of increasing a capacitance area of same, and system containing same
A capacitor includes a substrate (110, 210), a first electrically insulating layer (120, 220) over the substrate, and a fin (130, 231) including a semiconducting...
US-7,859,053 Independently accessed double-gate and tri-gate transistors in same process flow
A method for fabricating double-gate and tri-gate transistors in the same process flow is described. In one embodiment, a sacrificial layer is formed over stacks...
US-7,859,028 Independently controlled, double gate nanowire memory cell with self-aligned contacts
A double gate, dynamic storage device and method of fabrication are disclosed. A back (bias gate) surrounds three sides of a semiconductor body with a front gate...
US-7,858,981 Strained NMOS transistor featuring deep carbon doped regions and raised donor doped source and drain
Some embodiments of the present invention include providing carbon doped regions and raised source/drain regions to provide tensile stress in NMOS transistor...
US-7,858,525 Fluorine-free precursors and methods for the deposition of conformal conductive films for nanointerconnect seed...
A method including introducing a fluorine-free organometallic precursor in the presence of a substrate; and forming a conductive layer including a moiety of the...
US-7,858,481 Method for fabricating transistor with thinned channel
A method of fabricating a MOS transistor having a thinned channel region is described. The channel region is etched following removal of a dummy gate. The source...
US-7,857,139 Invertible front opening unified pod
A front opening unified pod (FOUP) for holding wafers is invertible and compatible with process machines in an inverted orientation. The FOUP can safely...
US-7,856,633 LRU cache replacement for a partitioned set associative cache
A method of partitioning a memory resource, associated with a multi-threaded processor, includes defining the memory resource to include first and second...
US-7,856,584 Unequal error protection apparatus, systems, and methods
Apparatus and systems, as well as methods and articles, encode a data word into an unequal error protection (UEP) codeword and transmit first and second portions...
US-7,856,551 Dynamically discovering a system topology
In one embodiment, the present invention includes a method for dynamically discovering a topology of a system having a plurality of point-to-point (PTP) links...
US-7,856,537 Hybrid hardware and software implementation of transactional memory access
Embodiments of the invention relate a hybrid hardware and software implementation of transactional memory accesses in a computer system. A processor including a...
US-7,856,465 Combined fast fourier transforms and matrix operations
Embodiments of a hardware accelerator having a circuit configurable to perform a plurality of matrix operations and Fast Fourier Transforms (FFT) are presented...
US-7,856,348 System and method for generation of synthetic parallel application kernels using tracing information
A method and apparatus may automatically generate a synthetic kernel application for use in optimizing applications on a parallel computing system using...
US-7,856,212 Millimeter-wave phase-locked loop with injection-locked frequency divider using quarter-wavelength transmission...
Embodiments of a millimeter-wave phase-locked loop with an injection-locked frequency divider (ILFD) are generally described herein. Other embodiments may be...
US-7,856,000 Apparatus and method capable of improved coexistence of multiple wireless communication techniques
Techniques involving wireless communications are disclosed. For instance, an embodiment provides an apparatus having a first transceiver and a second...
US-7,855,594 Fine gain and phase adjustment of analog quadrature filters
Methods and apparatus to fine gain and/or phase adjustment of analog quadrature filters are described. In one embodiment, gain and/or phase of an analog...
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