Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: intel





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-9,998,284 Methods and apparatus to provide isolated execution environments
Methods and apparatus to provide isolated execution environments are disclosed. In some examples, the methods and apparatus identify a request from a host...
US-9,998,263 Scheduling resources for orthogonal frequency division multiple access uplink transmissions
This disclosure describes systems, methods, and devices related to a flexible connectivity framework. A first device may send a trigger frame to a second...
US-9,998,238 Method and device for mitigating interference due to a wireless charging signal
The disclosure relates to a mobile device, comprising: a radio receiver configured to receive a radio signal; a power receiving unit (PRU) configured to receive...
US-9,998,197 Signaling techniques to support downlink (DL) multi-user multiple-input multiple-output (MU-MIMO) in 60 GHz...
Signaling techniques to support DL MU-MIMO in 60 GHz wireless networks are described. According to various such techniques, a transmitting 60 GHz-capable device...
US-9,998,195 Station (STA), access point (AP) and method for uplink sounding
Embodiments of an access point (AP), station (STA) and method for uplink sounding are generally described herein. The AP may transmit an uplink (UL) sounding...
US-9,998,184 Exploratory beamforming training techniques for 60 GHz devices
Exploratory beamforming training techniques for 60 GHz devices are described. In one embodiment, for example, an apparatus may comprise a station (STA)...
US-9,998,162 Scalable stochastic successive approximation register analog-to-digital converter
Some embodiments include apparatuses and methods using capacitor circuitry to sample a value of an input signal; comparators to compare the value of the input...
US-9,998,142 Techniques for invariant-reference compression
Techniques and apparatus for performing an invariant-reference compression/decompression process are described. In one embodiment, for example an apparatus to...
US-9,998,125 Clock calibration using asynchronous digital sampling
Described is an apparatus which comprises: an asynchronous clock generator to generate an asynchronous clock signal; a digital sampler for sampling a signal...
US-9,997,942 Battery charging method and apparatus with power point check and switchable control
In embodiments, apparatuses, methods and systems associated with battery charging are disclosed herein. In various embodiments, a reference current selector may...
US-9,997,563 Logic chip including embedded magnetic tunnel junctions
An embodiment integrates memory, such as spin-torque transfer magnetoresistive random access memory (STT-MRAM) within a logic chip. The STT-MRAM includes a...
US-9,997,457 Cobalt based interconnects and methods of fabrication thereof
An embodiment includes a metal interconnect structure, comprising: a dielectric layer disposed on a substrate; an opening in the dielectric layer, wherein the...
US-9,997,444 Microelectronic package having a passive microelectronic device disposed within a package body
A microelectronic package including a passive microelectronic device disposed within a package body, wherein the package body is the portion of the...
US-9,997,414 Ge/SiGe-channel and III-V-channel transistors on the same die
Techniques are disclosed for forming Ge/SiGe-channel and III-V-channel transistors on the same die. The techniques include depositing a pseudo-substrate of...
US-9,997,377 Methods of forming configurable microchannels in package structures
Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include...
US-9,997,290 Variable inductor and wireless communication device including variable device for conversion of a baseband...
Embodiments of a variable inductor and a communication device are generally described herein. The variable inductor may comprise a signal wire and a control...
US-9,997,227 Non-volatile ferroelectric logic with granular power-gating
Described is an apparatus which comprises: a first power domain having a first inverter to be powered by a first switchable positive supply and a first...
US-9,997,207 Low-power, high-accuracy current reference for highly distributed current references for cross point memory
A highly distributed current reference for a solid-state memory comprises a centrally located current digital-to-analog converter (IDAC) and a plurality of...
US-9,996,892 Apparatus and method for efficient graphics processing in a virtual execution environment
An apparatus and method are described for improving the efficiency of graphics operations in a virtual execution environment. For example, one embodiment of a...
US-9,996,733 User authentication via image manipulation
An initial image associated with a stored profile of the user is presented on a display device. Input including a manipulation of the initial image to transform...
US-9,996,731 Human head detection in depth images
Systems, devices and methods are described including receiving a depth image and applying a template to pixels of the depth image to determine a location of a...
US-9,996,711 Asset protection of integrated circuits during transport
An integrated circuit (IC) provisioned for asset protection has a primary circuit portion, such as a microprocessor or system-on-chip, that can be selectively...
US-9,996,708 SMS4 acceleration processors having encryption and decryption mapped on a same hardware
A processing system includes a processing core and a hardware accelerator communicatively coupled to the processing core. The hardware accelerator includes a...
US-9,996,487 Coherent fabric interconnect for use in multiple topologies
An apparatus having a fabric interconnect that supports multiple topologies and method for using the same are disclosed. In one embodiment, the apparatus...
US-9,996,475 Maintaining processor resources during architectural events
In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second...
US-9,996,466 Apparatus, system and method for caching compressed data
Techniques and mechanisms to efficiently cache data based on compression of such data. The technologies of the present disclosure include cache systems,...
US-9,996,449 Instruction and logic for a convertible innovation and debug engine
A processor includes an innovation engine, a non-volatile memory, a reserved device, one or more user-defined devices, and logic to execute the user-defined...
US-9,996,438 Chunk redundancy architecture for memory
An integrated circuit (IC) includes addressable blocks of memory, and at least one redundant block of memory. A block of memory includes two or more chunks of...
US-9,996,386 Mid-thread pre-emption with software assisted context switch
Methods and apparatus relating to mid-thread pre-emption with software assisted context switch are described. In an embodiment, one or more threads executing on...
US-9,996,361 Byte and nibble sort instructions that produce sorted destination register and destination index mapping
A processor comprises a first register to store a plurality of data items at a plurality of positions within the first register, a second register, and an...
US-9,996,356 Method and apparatus for recovering from bad store-to-load forwarding in an out-of-order processor
Apparatus and method for detecting and recovering from incorrect memory dependence speculation in an out-of-order processor are described herein. For example,...
US-9,996,350 Hardware apparatuses and methods to prefetch a multidimensional block of elements from a multidimensional array
Methods and apparatuses relating to a prefetch instruction to prefetch a multidimensional block of elements from a multidimensional array into a cache. In one...
US-9,996,347 Hardware apparatuses and methods relating to elemental register accesses
Methods and apparatuses relating to a vector instruction with a register operand with an elemental offset are described. In one embodiment, a hardware processor...
US-9,996,320 Fused multiply-add (FMA) low functional unit
An example processor includes a register and a fused multiply-add (FMA) low functional unit. The register stores first, second, and third floating point (FP)...
US-9,996,319 Floating point (FP) add low instructions functional unit
An example processor includes a register and an ADD low functional unit. The register stores first, second, and third floating point (FP) values. The ADD low...
US-9,996,279 Integrity protection for system management mode
Various embodiments are directed to providing integrity protection for a system management mode. During initialization, a hash value of a system management mode...
US-9,996,227 Apparatus and method for digital content navigation
An electronic device includes a processor, a memory for storing digital content and a display. The processor forms a content navigation bar for the digital...
US-9,996,162 Wearable sensor system for providing a personal magnetic field and techniques for horizontal localization...
A wearable sensor system is disclosed that provides a measurable magnetic field that changes horizontally within the range of motion of human limbs. The...
US-9,996,143 Apparatus and method for selectively disabling one or more analog circuits of a processor during a low power...
A disable module may be coupled to an analog circuit of an electronic circuit. The disable module may detect an input voltage that is supplied to the analog...
US-9,996,142 Selective power management for pre-boot firmware updates
Technologies for updating firmware in a pre-boot environment include a mobile computing device having a firmware environment and an operating system. In the...
US-9,996,135 Controlling operating voltage of a processor
In an embodiment, a processor includes a core domain with a plurality of cores and a power controller having a first logic to receive a first request to...
US-9,996,133 Detection of undocking for electronic devices
In one example a power management module comprises logic, at least partially including hardware logic, to detect a disconnection on at least one signaling...
US-9,996,131 Electrical fast transient tolerant input/output (I/O) communication system
Apparatuses, systems and methods associated with electrical fast transient tolerant input/output (I/O) communication (e.g., universal serial bus (USB)) design...
US-9,996,127 Method and apparatus for proactive throttling for improved power transitions in a processor core
A processor and method are described for performing proactive throttling of execution unit ports. For example, one embodiment of a processor core comprises: a...
US-9,996,113 Techniques for solar cell management for computing devices
Embodiments of an apparatus, system and method are described for managing one or more solar cells for a mobile computing device. An apparatus may comprise, for...
US-9,996,110 Direct attach dock cooling leveraging maximum silicon junction temperature control
Methods and apparatus relating for direct attach dock cooling leveraging Maximum Silicon Junction Temperature (Tj) control are described. In an embodiment,...
US-9,995,791 Power consumption monitoring device for a power source
Examples are disclosed for an integrated circuit (IC) device coupled to a battery-operated power supply unit, such as an IC in a mobile computing device or...
US-9,995,789 Secure remote debugging of SoCs
Techniques for secure remote debugging of SoCs are described. The SoC includes an intellectual property (IP) block, a microcontroller, and a fabric coupled to...
US-9,995,785 Stacked semiconductor package and method for performing bare die testing on a functional die in a stacked...
Stacked semiconductor packages and methods for performing bare die testing on a functional silicon die in a stacked semiconductor package are described. In an...
US-9,993,723 Techniques for low power monitoring of sports game play
Various embodiments are directed to techniques for reducing electric power employed by devices of a game play monitoring system that collects data during game...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.