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| Patent # | Description |
|---|---|
| US-9,560,044 |
Gesture-based signature authentication Embodiments of the invention are generally directed to systems, methods, devices, and machine-readable mediums for implementing gesture-based signature... |
| US-9,559,960 |
Network congestion management Technologies for managing congestion of a communication channel includes a network device for receiving a network packet from a computing device destined for... |
| US-9,559,953 |
Path splitting with a connection-oriented network In one embodiment this disclosure provides a network device that includes an input port configured to link to a first device to receive a packet from the first... |
| US-9,559,905 |
Type-C retimer state machine and a protocol for inband control and
configuration An apparatus for retimer configuration and control is described herein. The apparatus includes at least one retimer. The is to receive an inband low frequency... |
| US-9,559,884 |
Co-phasing of transmissions from multiple infrastructure nodes Briefly, in accordance with one or more embodiments, mobile station or user equipment receives pilot signals from two or more infrastructure nodes in a... |
| US-9,559,878 |
Phase adjustment circuit for clock and data recovery circuit Described are phase adjustment circuits for clock and data recovery circuits (CDRs). Systems and apparatuses may include an input to receive a serial data... |
| US-9,559,851 |
Secure pairing for secure communication across devices Technologies for securely pairing a first computing device with a second computing device include the first computing device to generate a session message key... |
| US-9,559,848 |
Method, apparatus, and instructions for safely storing secrets in system
memory Embodiments of an invention for method, apparatus, and instructions for safely storing secrets in system memory are disclosed. In one embodiment, a processor... |
| US-9,559,810 |
Methods and arrangements for a check sequence According to various aspects of the present disclosure, medium access control (MAC) sublayer logic of a device or a system may generate and implement a preamble... |
| US-9,559,761 |
Proximity-based services discovery privacy This application discusses, among other things, apparatus and methods for providing device-to-device (D2D) discovery privacy. In an example, a method can... |
| US-9,559,726 |
Use of error correcting code to carry additional data bits Integrated circuits, systems and methods are disclosed in which data bits protected by error correction code (ECC) detection and correction may be increased... |
| US-9,559,719 |
Single amplifer bi-quad sigma-delta modulator Some embodiments include apparatus and methods using a first stage including an integrator, a second stage coupled to the first stage, the second stage... |
| US-9,559,698 |
Spintronic logic element An embodiment includes a C-element logic gate implemented as a spin logic device that provides a compact and low-power implementation of asynchronous logic by... |
| US-9,559,578 |
Apparatus and system for generating a signal with phase angle
configuration Described herein is an apparatus and system for generating a signal with phase angle configuration. The apparatus comprises an array of switch-resistors, each... |
| US-9,559,445 |
Card edge connectors Techniques for manufacturing an add-in card are described. An example of an add-in card in accordance with the described techniques includes a circuit board... |
| US-9,559,434 |
Method for closed-loop tuner in a receiver antenna Described herein are architectures, platforms and methods for implementing a closed-loop tuner in a receiver circuitry of a portable device. For example, the... |
| US-9,559,419 |
Reflector and a multi band antenna The present invention relates to a reflector for an antenna comprising a first reflector assembly and at least one second reflector assembly, the first... |
| US-9,559,215 |
Method and apparatus for making p-channel thin film transistors for OLED
and LED active matrix flat panel displays Embodiments of the invention include sulfur alloyed InGaZnO (IGZOS) thin film transistors (TFTs) and methods of making such devices. In one embodiment, the... |
| US-9,559,160 |
Common-substrate semiconductor devices having nanowires or semiconductor
bodies with differing material... Common-substrate semiconductor devices having nanowires or semiconductor bodies with differing material orientation or composition and methods to form such... |
| US-9,559,146 |
Phase-change memory cell implant for dummy array leakage reduction Embodiments of the present disclosure describe phase-change memory cell implant for dummy array leakage reduction. In an embodiment, an apparatus includes a... |
| US-9,559,088 |
Multi-chip package having a substrate with a plurality of vertically
embedded die and a process of forming the same An apparatus includes a substrate having a land side having a plurality of contact pads and a die side opposite the land side. The apparatus includes a first... |
| US-9,559,060 |
Method of forming stacked trench contacts and structures formed thereby Methods and associated structures of forming a microelectronic device are described. Those methods may include forming a structure comprising a first contact... |
| US-9,559,037 |
Package integrated synthetic jet device Embodiments include a synthetic jet device formed within layers of a package substrate, such as to provide a controlled airflow for sensing or cooling... |
| US-9,558,947 |
Pattern decomposition lithography techniques Techniques are disclosed for realizing a two-dimensional target lithography feature/pattern by decomposing (splitting) it into multiple unidirectional target... |
| US-9,558,807 |
Apparatuses and systems for increasing a speed of removal of data stored
in a memory cell Embodiments include apparatuses, methods, and systems including a circuit which may increase a speed of removal of data stored in a memory cell. In embodiments,... |
| US-9,558,560 |
Connected component labeling in graphics processors Systems and methods may provide for obtaining data associated with an image and using a plurality of threads in a graphics processor to conduct a single... |
| US-9,558,389 |
Reliable fingertip and palm detection Embodiments of a system and method for detecting a palm of a hand using an image are generally described herein. A method for detecting a palm of a hand may... |
| US-9,558,378 |
Always-available embedded theft reaction subsystem A system to provide an always-on embedded anti-theft protection for a platform is described. The system in one embodiment comprises an arming logic to move the... |
| US-9,558,330 |
Technologies for digital rights managment of 3D printable models Technologies for 3D printing digital rights management (DRM) include a 3D printing device communicatively coupled with a 3D model storage server and a rights... |
| US-9,558,148 |
Method to optimize network data flows within a constrained system Methods, apparatus, and software for optimizing network data flows within constrained systems. The methods enable data to be transferred between PCIe cards in... |
| US-9,558,146 |
IWARP RDMA read extensions Apparatus, method and system for supporting Remote Direct Memory Access (RDMA) Read V2 Request and Response messages using the Internet Wide Area RDMA Protocol... |
| US-9,558,145 |
Method, apparatus and system for measuring latency in a physical unit of a
circuit In an embodiment, an apparatus includes a counter to count between a start value and an end value according to a local clock signal, a first register to store... |
| US-9,558,144 |
Serial bus electrical termination control Some embodiments include apparatuses and methods having a node to couple to a serial bus, and a controller to provide a control signal to one of a first circuit... |
| US-9,558,142 |
Split transaction protocol for a bus system A method of and apparatus for communicating between a host and an agent. The method includes the step of performing a first transaction between a host... |
| US-9,558,132 |
Socket management with reduced latency packet processing Generally, this disclosure provides systems, methods and computer readable media for management of sockets and device queues for reduced latency packet... |
| US-9,558,127 |
Instruction and logic for a cache prefetcher and dataless fill buffer A processor includes a cache hierarchy and an execution unit. The cache hierarchy includes a lower level cache and a higher level cache. The execution unit... |
| US-9,558,121 |
Two-level cache locking mechanism A virtually tagged cache may be configured to index virtual address entries in the cache into lockable sets based on a page offset value. When a memory... |
| US-9,558,120 |
Method, apparatus and system to cache sets of tags of an off-die cache
memory Techniques and mechanism to provide a cache of cache tags in determining an access to cached data. In an embodiment, a tag storage stores a first set including... |
| US-9,558,118 |
Tracing mechanism for recording shared memory interleavings on multi-core
processors A memory race recorder (MRR) is provided. The MRR includes a multi-core processor having a relaxed memory consistency model, an extension to the multi-core... |
| US-9,558,066 |
Exchanging ECC metadata between memory and host system Providing access to an external memory controller to internal error correction bits from a memory device for use as metadata bits by the memory controller. In a... |
| US-9,558,030 |
Method, apparatus, and system to handle transactions received after a
configuration change request Methods, apparatuses, and systems for handling transactions received after a configuration request, the method, for example, comprising: receiving a... |
| US-9,558,006 |
Continuous automatic tuning of code regions Described herein are mechanisms for continuous automatic tuning of code regions for optimal hardware configurations for the code regions. One mechanism... |
| US-9,558,005 |
Reliable and deterministic live migration of virtual machines Technologies for live virtual machine migration include a plurality of compute nodes and a datacenter manager. The datacenter manager issues a request to... |
| US-9,557,998 |
Systems, apparatuses, and methods for performing delta decoding on packed
data elements Systems, apparatuses, and methods for performing delta decoding on packed data elements of a source and storing the results in packed data elements of a... |
| US-9,557,953 |
Private image viewer Techniques related to viewing a private image are described herein. The techniques may include a public device including a processor and a public display to... |
| US-9,557,819 |
Gesture input with multiple views, displays and physics Gesture input with multiple displays, views, and physics is described. In one example, a method includes generating a three dimensional space having a plurality... |
| US-9,557,804 |
Dynamic power limit sharing in a platform A method and apparatus for dynamic power limit sharing among the modules in the platform. In one embodiment of the invention, the platform comprises a processor... |
| US-9,557,778 |
Hinge for a device Particular embodiments described herein provide for device that includes a first housing, a cradle, and a hinge that rotatable couples the first housing to the... |
| US-9,557,226 |
Current-mode digital temperature sensor apparatus Described is a current-mode thermal sensor apparatus which comprises: a first transistor with a gate terminal coupled to a first node; a second transistor with... |
| US-9,555,597 |
Foam core chassis An apparatus and computing device are described herein. The apparatus includes a chassis cover of a computing device. The apparatus also includes a foam core.... |
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