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Stressed semiconductor using carbon and method for producing the same
A stressed semiconductor using carbon is provided. At least one carbon layer containing diamond is formed either below a semiconductor layer or above a...
Multi-chip packaging using an interposer with through-vias
One embodiment relates to forming a plurality of vias extending partially through a body, the vias including sidewalls defined by the body. An insulating layer...
Method of fabricating a transformer device
A planar transformer or balun device, having small trace spacing and high mutual coupling coefficient, and a method of fabricating the same is disclosed. The...
Mechanism to transition control between components in a virtual machine
In some embodiments, the invention efficiently manages, sets up, controls and performs communication between isolated components using portals. In a platform...
System and method for controlling switching between VMM and VM using
enabling value of VMM timer indicator and...
In one embodiment, a method includes transitioning control to a virtual machine (VM) from a virtual machine monitor (VMM), determining that a VMM timer indicator...
Method and system for reducing program code size
In a method for reducing code size a replaceable subset of instructions at a first location within a set of instructions and a matching target subset of...
Methods and apparatuses for designing integrated circuits using virtual
Methods and apparatuses for analyzing and/or designing integrated circuits using virtual transparent cells disclosed. Some embodiments comprise calculating model...
Method and system for setting a breakpoint
A method for setting a breakpoint includes the following: receiving an input specifying a location for insertion of a breakpoint in the executable program;...
Bus communication enumeration
Provided are a method, system, and program for initializing a processor of a computer system, to enumerate a remote bus and remote devices coupled to the remote...
Power optimized dynamic port association
A method, device, system, and computer readable medium are disclosed. In one embodiment the method includes dynamically associating a newly active port in a...
Mapping SDVO functions from PCI express interface
An embodiment of the present invention is a technique to map pins on an interface connector to signals for a digital display. A first group of signal traces maps...
Generic bootstrapping protocol (GBP)
Embodiments of methods and apparatus for discovering a bootstrapping server by a mobile station, and bootstrapping the mobile station are disclosed. In some...
Provider presence information
In some embodiments, a client computer includes a memory, a client presence program adapted to be located in the memory, and a processor. The processor is...
Digital low pass filter
Over-sampled data is filtered by receiving a word of over-sampled data including sample bits for each of a plurality of data bits, detecting a sample bit having...
Techniques for unified management communication for virtualization systems
Techniques for unified management communications for virtual systems are described. An apparatus may comprise a first server emulated using a first virtual...
Gradually degrading multimedia recordings
A system including a recording device in which multiple lesser quality recordings of a program, e.g., recordings at a reduced bit rate, are determined by...
Variable optical power limiter
A variable optical power limiter is disclosed. An apparatus according to aspects of the present invention includes an optical waveguide disposed in semiconductor...
Methods and apparatus for retrieving images from a large collection of
An image retrieval program (IRP) may be used to query a collection of digital images. The IRP may include a mining module to use local and global feature...
Apparatus, system and method capable of aggregate compression in a
An embodiment of the present invention provides an apparatus, comprising a transmitter capable of compressing header information in an aggregate of Media Access...
Arranging SDMA poll groups by response length
A base station may organize poll groups into groups having similar predicted durations of subsequent responses. In one embodiment predicted durations may be...
Compact alphanumeric keyboard
An apparatus comprises an input keypad having a plurality of keys. The input keypad outputs an output signal that is indicative of either a single depressed key...
Systems and methods to laminate passives onto substrate
A method may include depositing a dielectric layer onto a substrate, removing portions of the dielectric layer to create a plurality of separated non-removed...
Replacement spacers for MOSFET fringe capacitance reduction and processes
of making same
A process includes planarizing a microelectronic device that includes a gate stack and adjacent trench contacts. The process also includes removing a gate spacer...
Chamber sealing valve
According to some embodiments, a test fluid may be provided into a chamber associated with a cooling system for an electronic integrated circuit. Moreover, a...
System and method for regulating the flow of information to or from an
The flow of information to or from an application on a host machine is regulated by a trusted agent operating in conjunction with at least one security element,...
Method of efficient performance monitoring for symmetric multi-threading
Efficient performance monitoring for symmetric multi-threading systems is applicable to systems that have limited performance monitoring resources and enables...
Checking for memory access collisions in a multi-processor architecture
Checking for memory access collisions in a multiple processor architecture is described. Memory access collisions may be found by simulating an instruction to be...
Low density parity check (LDPC) code decoder
An embodiment of a decoder comprises processing elements operating on associative processing. The processing elements may comprise a logic and memory element....
Destination indication to aid in posted write buffer loading
Embodiments of the invention are generally directed to systems, methods, and apparatuses for a destination indication to aid in posted write buffer loading. In...
Method and apparatus for improving high availability in a PCI express link
through predictive failure analysis
A method and apparatus is described herein for tracking errors for one of a plurality of lanes in a link, tracking errors for the link, and in the case of a root...
Computer memory power backup
According to an embodiment of the invention, a method and apparatus for computer memory power backup are described. According to one embodiment, a memory system...
Conserving power in processing systems
A network device may comprise an auxiliary processor to conserve the power of the network device. The auxiliary processor may modify one or more definition...
Method and apparatus for supporting address translation in a virtual
In one embodiment, a method includes receiving control transitioned from a virtual machine (VM) due to a privileged event pertaining to a translation-lookaside...
Synchronizing control and data paths traversed by a data transaction
In one embodiment, the present invention includes a method for determining if control and data portions of a data transaction are ready to be sent from an...
Coupling data buffers with memory interfaces
In one embodiment, the present invention includes a method including receiving a read request at a first buffer from a first one of multiple interfaces and...
Preserving packet order when migrating network flows between cores
In one embodiment, the present invention includes a method for receiving a first packet associated with a first network flow in a first descriptor queue...
Direct memory access (DMA) transfer of network interface statistics
In general, in one aspect, the disclosure describes a method that includes maintaining statistics, at a network interface, metering operation of the network...
System and method for a 3-hop cache coherency protocol
A system and method for implementing a cache coherency protocol are described. The system includes a first caching agent to send a first cache request to a home...
Syllabic search engines and related methods
An improved search engine, for a computing device or computer network, utilizes search strings comprising complete words and numbers representing a syllable...
Assisting a user experiencing cognitive decline by retracing footsteps
Briefly, in accordance with one or more embodiments, a user experiencing cognitive decline or a similar affliction may be assisted with the performance of daily...
Method and apparatus for local standard deviation based histogram
equalization for adaptive contrast enhancement
Various embodiments for image contrast enhancement are described. In one or more embodiments, adaptive contrast enhancement may be realized by performing local...
Method and device for fragmented packet routing in virtualized
A method and device for routing fragmented data frames is provided. A data frame may be fragmented into a plurality of fragments, each fragment including a...
Method and system for power consumption reduction by network devices as a
function of network activity
A method and system may provide power consumption reduction by a network device. A device on a network and its components each may capable of operating in a...
Boosting seed voltage for a memory device
A method and device using bitline-bitline capacitance between adjacent bitlines to boost seed voltage in a memory device are provided. The method may include a...
Display processing line buffers incorporating pipeline overlap
Apparatus, systems and methods for display processing line buffers incorporating pipeline overlap are disclosed. For example, an apparatus is disclosed including...
Antennae attachable to an electronic device enclosure or other structure
Attachable/detachable antennae for use with electronic systems.
High-k dual dielectric stack
The present invention discloses a method including: providing a Group III-V component semiconductor material; forming a first layer over a surface of the Group...
Multi-layer thick metallization structure for a microelectronic device,
intergrated circuit containing same,...
A multi-layer thick metallization structure for a microelectronic device includes a first barrier layer (111), a first metal layer (112) over the first barrier...
Apparatus and methods for improving multi-gate device performance
Embodiments of an apparatus and methods for improving multi-gate device performance including methods to fabricate a plurality of multi-gate fins from a diffused...
Notched-base spacer profile for non-planar transistors
A method of forming a notched-base spacer profile for non-planar transistors includes providing a semiconductor fin having a channel region on a substrate and...