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Patent # Description
US-8,111,521 Package-based filtering and matching solutions
A microelectronic package having a radio frequency (RF) amplifier circuit and, incorporating harmonic rejection filters and matching circuits integrally formed...
US-8,110,930 Die backside metallization and surface activated bonding for stacked die packages
Methods and apparatus to provide die backside metallization and/or surface activated bonding for stacked die packages are described. In one embodiment, an...
US-8,110,920 In-package microelectronic apparatus, and methods of using same
A mounting substrate for a processor includes a die side and a land side with a processor footprint configured on the die side. The processor footprint is...
US-8,110,899 Method for incorporating existing silicon die into 3D integrated stack
An apparatus including a first die including a plurality of conductive through substrate vias (TSVs); and a plurality of second dice each including a plurality...
US-8,110,877 Metal-insulator-semiconductor tunneling contacts having an insulative layer disposed between source/drain...
A contact to a source or drain region. The contact has a conductive material, but that conductive material is separated from the source or drain region by an...
US-8,110,458 Fabrication of germanium nanowire transistors
In general, in one aspect, a method includes using the Germanium nanowire as building block for high performance logic, memory and low dimensional quantum...
US-8,108,984 Method for manufacturing integrated circuit inductors having slotted magnetic material
Methods of manufacture of integrated circuit inductors having slotted magnetic material will be described. The methods may employ electro- or electroless...
US-8,108,897 Method and apparatus for displaying entertainment system data upon selection of a video data display
A graphical user interface (GUI) includes a first window that displays video data of a first entertainment selection. A first area of the first window displays...
US-8,108,867 Preserving hardware thread cache affinity via procrastination
A method, device, system, and computer readable medium are disclosed. In one embodiment the method includes managing one or more threads attempting to steal...
US-8,108,863 Load balancing for multi-threaded applications via asymmetric power throttling
A first execution time of a first thread executing on a first processing unit of a multiprocessor is determined. A second execution time of a second thread...
US-8,108,856 Method and apparatus for adaptive integrity measurement of computer software
Systems and methods are described herein that discuss how a computing platform executing a virtualized environment, in one example, can be integrity verified...
US-8,108,776 User interface for multimodal information system
A method and system for providing a user interface for information services related to multimodal information on a computer system is presented. A system for...
US-8,108,761 Optimizing the size of memory devices used for error correction code storage
Systems, methods, and apparatuses for optimizing the size of memory devices used for error correction code storage. An apparatus (such as a memory module) may...
US-8,108,756 Techniques to perform forward error correction for an electrical backplane
Techniques to perform forward error correction for an electrical backplane are described. An apparatus comprises a physical layer unit having a forward error...
US-8,108,676 Link key injection mechanism for personal area networks
According to one embodiment, a method is disclosed. The method includes generating a link key at a secure component within a first personal area network device...
US-8,108,670 Client apparatus and method with key manager
In some embodiments, an apparatus comprises a certificate store to store a current certificate associated with a key pair including a current public key and a...
US-8,108,668 Associating a multi-context trusted platform module with distributed platforms
In one embodiment, the present invention includes a method for creating an instance of a virtual trusted platform module (TPM) in a central platform and...
US-8,108,665 Decoupled hardware configuration manager
The present disclosure relates to a technique or device to allow hardware related drivers to present a centralized configuration program and, more particularly,...
US-8,108,627 Array comparison and swap operations
A transactional memory system, method and apparatus are disclosed. An embodiment of the method includes attempting to acquire a write lock provided by an...
US-8,108,584 Use of completer knowledge of memory region ordering requirements to modify transaction attributes
A method and system of relaxing the ordering of a read completion by setting an ordering attribute in the read completion. The relaxed ordering allows the read...
US-8,108,542 Method and apparatus to determine broadcast content and scheduling in a broadcast system
A broadcast system, method and apparatus providing content on demand. In one embodiment, the disclosed broadcast system includes a server that broadcasts...
US-8,108,324 Forward feature selection for support vector machines
In one embodiment, the present invention includes a method for training a Support Vector Machine (SVM) on a subset of features (d') of a feature set having (d)...
US-8,107,879 Device, system, and method of establishing multiple wireless connections
Device, system, and method of establishing multiple wireless connections. For example, a system includes: a tag to store wireless connection information...
US-8,107,510 Method and apparatus for non-cooperative coexistence between wireless communication protocols
A method and apparatus of reducing interference between wireless communication protocols is disclosed. The method comprises reducing interference between a...
US-8,106,440 Selective high-k dielectric film deposition for semiconductor device
Embodiments of the present invention describe a method of fabricating a III-V quantum well transistor with low current leakage and high on-to-off current ratio....
US-8,105,848 Programmable electromagnetic array for molecule transport
An embodiment of the invention relates to a device comprising (1) an array of electromagnetic elements comprising coils, metal cores, and metal core heads, and...
US-8,104,172 Method buffer coating having a physical mixture of high toughness polymer and a low shrinkage polymer
Embodiments of buffer coatings for semiconductor and integrated circuit manufacturing are presented herein.
US-8,103,908 Method and system for recovery of a computing environment during pre-boot and runtime phases
A method and system for recovery of a computing environment includes monitoring during a pre-boot phase and a runtime phase of a computing device for selection...
US-8,103,883 Method and apparatus for enforcing use of danbury key management services for software applied full volume...
A method, system, and computer-readable storage medium containing instructions for controlling access to data stored on a plurality of storage devices...
US-8,103,858 Efficient parallel floating point exception handling in a processor
Methods and apparatus are disclosed for handling floating point exceptions in a processor that executes single-instruction multiple-data (SIMD) instructions. In...
US-8,103,831 Efficient method and apparatus for employing a micro-op cache in a processor
Methods and apparatus for using micro-op caches in processors are disclosed. A tag match for an instruction pointer retrieves a set of micro-op cache line...
US-8,103,830 Disabling cache portions during low voltage operations
Methods and apparatus relating to disabling one or more cache portions during low voltage operations are described. In some embodiments, one or more extra bits...
US-8,103,816 Technique for communicating interrupts in a computer system
A technique to enable efficient interrupt communication within a computer system. In one embodiment, an advanced programmable interrupt controller (APIC) is...
US-8,103,218 Method and apparatus for scheduling transmissions in a wireless communication system
Machine-readable media, methods, apparatus and system for scheduling transmissions in a wireless communication system are described. In some embodiments, a base...
US-8,102,960 Adaptation of a digital receiver
A method and apparatus to improve adaptation speed of a digital receiver is presented. The receiver includes an equalizer to initiate adaptation to a...
US-8,102,901 Techniques to manage wireless connections
A system, apparatus, method and article to manage wireless connections are described. The apparatus may include a connection management module to automatically...
US-8,102,712 NAND programming technique
A NAND memory array is programmed applying a programming voltage Vpgm as a double pulse programming pulse if a data pattern associated with memory cells that...
US-8,102,414 Obtaining consumer electronic device state information
Apparatus, systems, and methods may operate to obtain an image of a consumer electronic device, the image comprising at least one visual indication of a first...
US-8,101,485 Replacement gates to enhance transistor strain
Some embodiments of the present invention include apparatuses and methods relating to NMOS and PMOS transistor strain.
US-8,101,471 Method of forming programmable anti-fuse element
A programmable anti-fuse element includes a substrate (224), an N-well (426) in the substrate, an electrically insulating layer (427) over the N-well, and a...
US-8,100,314 Carbon nanotubes solder composite for high performance interconnect
An embodiment of the present invention is an interconnect technique. Carbon nanotubes (CNTs) are prepared. A CNT-solder composite paste is formed containing the...
US-8,099,786 Embedded mechanism for platform vulnerability assessment
Embodiments of the present invention provide an embedded mechanism for platform vulnerability assessment. In various embodiments, a management component of a...
US-8,099,730 Heterogeneous virtualization of host and guest OS having different register sizes using translation layer to...
Machine-readable media, methods, apparatus and system are described. In some embodiments, a virtual machine monitor of a computer platform may comprise a...
US-8,099,718 Method and system for whitelisting software components
A method and system for whitelisting software components is disclosed. In a first operating environment, runtime information may be collected about a first...
US-8,099,687 Interchangeable connection arrays for double-sided DIMM placement
A memory module has an array of connections. The array of connections is arranged in rows and columns such that there are first and second outer columns....
US-8,099,619 Voltage regulator with drive override
Techniques to enable voltage regulators to adjust for coming load changes are presented herein. In some embodiments, a functional block such as a microprocessor...
US-8,099,587 Compressing and accessing a microcode ROM
An arrangement is provided for compressing microcode ROM ("uROM") in a processor and for efficiently accessing a compressed "uROM". A clustering-based approach...
US-8,099,581 Synchronizing a translation lookaside buffer with an extended paging table
A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest...
US-8,099,574 Providing protected access to critical memory regions
Hardware of a virtualized processor based system detecting a specified type of memory access to an identified region of memory and in response to the detecting...
US-8,099,538 Increasing functionality of a reader-writer lock
In one embodiment, the present invention includes a method for accessing a shared memory associated with a reader-writer lock according to a first concurrency...
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