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Patent # Description
US-7,971,190 Machine learning performance analysis tool
In general, in one aspect, the disclosure describes a method that includes interrupting a program running on a processor. The active instruction that was...
US-7,971,084 Power management in electronic systems
In one embodiment, an electronic apparatus comprises at least one processor and a computer readable medium coupled to the processor and comprising logic...
US-7,971,081 System and method for fast platform hibernate and resume
In some embodiments, an apparatus includes processor cores, a smaller non-volatile memory, a larger non-volatile memory to hold an operating system, programs,...
US-7,971,074 Method, system, and apparatus for a core activity detector to facilitate dynamic power management in a...
A system and method to provide source controlled dynamic power management. An activity detector in a source determines expected future resource usage. Based on...
US-7,971,057 Exclusive access for secure audio program
Executing a monitor on a platform, the monitor capable of providing exclusive, secure access to an audio I/O device of the platform, executing a first partition...
US-7,971,048 System and method for establishing a trust domain on a computer platform
Embodiments of the invention provide systems and methods associated with a measurement engine in a server platform. In one such embodiment of the invention, the...
US-7,970,989 Write ordering on disk cached platforms
A hard disk cache includes entries to be written to a disk, and also includes ordering information describing the order that they should be written to the disk....
US-7,970,961 Method and apparatus for distributed direct memory access for systems on chip
A distributed direct memory access (DMA) method, apparatus, and system is provided within a system on chip (SOC). DMA controller units are distributed to...
US-7,970,953 Serial ATA port addressing
In one aspect, a shared transport layer frame information structure (FIS) generation logic may generate FISes for each of a plurality of SATA ports. In a...
US-7,970,940 Domain name system lookup latency reduction
A technique to reduce the latency of a remote DNS lookup operation is disclosed. More specifically, a machine-readable medium, method, device, and system are...
US-7,970,573 Techniques for determining orientation of a three-axis accelerometer
A method, apparatus, and article containing computer instructions are described. Embodiments may use accelerometer data regarding forward motion by a wearer of...
US-7,970,509 Component identification system and method thereof
Disclosed are a system and a method for identifying components in an assembly. The system comprises an assembly including one or more components and a power...
US-7,970,287 Multi-level optical data communication circuit
A driver circuit is coupled to an optical waveguide transmitter. The driver circuit has a current generator that is in series with the transmitter, and a...
US-7,970,215 Automatic generation of compact code tables
An apparatus includes a compact table generator module and a storage medium. The compact table generator creates a compact code table having multiple code word...
US-7,970,068 Mobile channel estimation for DBV-T COFDM demodulator
A channel estimator for use in a DVB-T system is capable of high Doppler performance without incurring restrictive delay spread limitations, in a hardware...
US-7,969,934 System and method for transferring wireless network access passwords
The present disclosure provides an access node for transferring and/or assigning network passwords. The access node includes a first interface for sending and...
US-7,969,873 Data transmission scheme with scheduling optimization for physical channel group
A novel apparatus for and a method of optimized data transmission whereby an input data stream is distributed over a plurality of physical channels within a...
US-7,969,437 Method and apparatus for triangle representation
Embodiments of the invention provide for accelerated polygon intersection testing of rays against a set of polygons. The amount of computation required in the...
US-7,969,117 Method and device for charging peripherals
The invention includes a peripheral charging system for a computer. The peripheral charging system comprises a retention mechanism configured to retain a...
US-7,968,976 Guard ring extension to prevent reliability failures
An embodiment of the present invention is a technique to prevent reliability failures in semiconductor devices. A trench is patterned in a polyimide layer over...
US-7,968,957 Transistor gate electrode having conductor material layer
Various embodiments of the invention relate to a PMOS device having a transistor channel of silicon germanium material on a substrate, a gate dielectric having...
US-7,968,952 Stressed barrier plug slot contact structure for transistor performance enhancement
A method for forming a slot contact structure for transistor performance enhancement. A contact opening is formed to expose a contact region, and a slot contact...
US-7,968,457 Sandwiched metal structure silicidation for enhanced contact
Embodiments of an apparatus and methods for forming enhanced contacts using sandwiched metal structures are generally described herein. Other embodiments may be...
US-7,968,395 Systems and methods for reducing contact to gate shorts
A method for reducing contact to gate shorts in a semiconductor device and the resulting semiconductor device are described. In one embodiment, a gate is formed...
US-7,968,392 Tri-gate integration with embedded floating body memory cell using a high-K dual metal gate
Dual-gate memory cells and tri-gate CMOS devices are integrated on a common substrate. A plurality of silicon bodies are formed from a monocrystalline silicon...
US-7,967,942 Polymer matrices for polymer solder hybrid materials
Embodiments of the present invention provide various polymeric matrices that may be used as a binder matrix for polymer solder hybrid thermal interface...
US-7,966,624 Using message passing interface (MPI) profiling interface for emulating different MPI implementations
In one embodiment, the present invention includes a method for receiving an application linked against a first application binary interface (ABI), providing an...
US-7,966,609 Optimal floating-point expression translation method based on pattern matching
Embodiments of the present invention include code generation methods. In one embodiment, a table of patterns is generated. Each pattern in the table includes an...
US-7,966,606 Methods and apparatus for generating branchless code for select statements
In one embodiment, the present invention includes a method for determining whether a select statement can be transformed, and if so selecting a first or second...
US-7,966,511 Power management coordination in multi-core processors
Systems and methods of managing power provide for issuing a first operating requirement from a first processor core and issuing a second operating requirement...
US-7,966,506 Saving power in a computer system
A power management unit (PMU) may promote a processing core from a working state to a first non-working power saving state after receiving a signal from an...
US-7,966,482 Interleaving saturated lower half of data elements from two source registers of packed data
An apparatus includes an instruction decoder, first and second source registers and a circuit coupled to the decoder to receive packed data from the source...
US-7,966,476 Determining length of instruction with escape and addressing form bytes without evaluating opcode
A method, apparatus and system are disclosed for decoding an instruction in a variable-length instruction set. The instruction is one of a set of new types of...
US-7,966,458 Method and apparatus for controlling a primary operating system and an appliance operating system on the same...
One embodiment includes a personal computer device comprising at least one machine to execute a primary user operating system, a first physical memory to be...
US-7,966,456 Method for reducing number of writes in a cache memory
Disclosed is a method for reducing number of writes in a write-back non-volatile cache memory. The method comprises: writing a plurality of data in the cache...
US-7,966,382 Enabling access to media content in media servers in remote networks
Provided are a method, system, and program enabling access to media content in media servers in remote networks. Available devices are discovered in a network...
US-7,966,037 Method and apparatus for multi-radio traffic arbitration in wireless communication protocols
A method and apparatus of coordinating operation of subsystems implementing different wireless communication protocols is disclosed. The method comprises...
US-7,965,979 Methods and apparatus for providing an extended-local area system based on short messaging service
Embodiments of methods and apparatus for providing an extended-local area system based on short messaging service are generally described herein. Other...
US-7,965,770 Shared logic for decoding and deinterlacing of compressed video
One embodiment includes a method that includes receiving a compressed video stream. The method also includes decoding a number of blocks of the compressed video...
US-7,965,767 Two-dimensional filtering architecture
A first filtering module filters actual pixel values in a first direction (e.g., vertically), and a second filtering module filters interpolated pixel values...
US-7,965,763 Determining a bit error rate (BER) using interpolation and superposition
In one embodiment, the present invention includes a method for receiving a jitter profile and a step response of a channel coupled between a transmitter and a...
US-7,965,741 Method, apparatus, and system for idle state definition for power management
A predetermined network packet is utilized for power reduction in either or both of a transmitter and receiver when information is not needed. Upon detection of...
US-7,965,702 Reliable reporting of location data
A machine, such as a mobile device having telephony features, such as a voice over Internet Protocol (VoIP) telephony application, is configured with a secure...
US-7,965,667 Power management in wireless network
Embodiments of apparatuses, articles, methods, and systems for power management in wireless networks are generally described herein. Other embodiments may be...
US-7,965,545 Reducing temporal changes in phase change memories
A phase change memory in the reset state may be heated to reduce or eliminate electrical drift.
US-7,964,965 Forming thick metal interconnect structures for integrated circuits
Embodiments of an apparatus and methods for forming thick metal interconnect structures for integrated structures are generally described herein. Other...
US-7,964,866 Low power floating body memory cell based on low bandgap material quantum well
Embodiments of the invention relate to apparatus, system and method for use of a memory cell having improved power consumption characteristics, using a...
US-7,964,490 Methods of forming nickel sulfide film on a semiconductor device
Embodiments of the present invention describe a method of forming nickel sulfide layer on a semiconductor device. A nickel sulfide layer is formed on a...
US-7,964,447 Process of making carbon nanotube array that includes impregnating the carbon nanotube array with metal
A carbon nanotube (CNT) array is patterned on a substrate. The substrate can be a microelectronic die or a heat sink for a die. The patterned CNT array is...
US-7,964,174 Nanotube growth and device formation
An apparatus and method for forming catalyst particles to grow nanotubes is disclosed. In addition, an apparatus and method for forming nanotubes using the...
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