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High-throughput memory-efficient BI-SOVA decoder architecture
Described herein are one or more implementations of a high-throughput and memory-efficient "windowed" bidirectional Soft Output Viterbi Algorithm (BI-SOVA)...
Validating data using processor instructions
In one embodiment, the present invention includes a method for determining from a data block in a buffer a number of first operands in a first portion of the...
Techniques for entering a low-power link state
Techniques to cause a point-to-point link between system components to engage in a negotiation process that may lead to the link transitioning from an active...
Delta checkpoints for a non-volatile memory indirection table
According to some embodiments, delta checkpoints are provided for a non-volatile memory indirection table to facilitate a recovery process after a power loss...
Method, system, and apparatus for runtime power estimation
Assertions of sentinel nodes within a device may be used to calculate device power consumption at runtime. These power estimates may be used to estimate a...
Tracking temporal use associated with cache evictions
A method and apparatus for tracking temporal use associated with cache evictions to reduce allocations in a victim cache is disclosed. Access data for a number...
Black-box host stack latency measurement
A method comprises sniffing an input from a client device to a host device and an output from the host device to the client device; recording a first time...
TXOP duration adaptation for dual radio devices
Transmission opportunity (TXOP) duration is adapted for a wireless local area network (WLAN) transceiver in a dual radio wireless device based on an end of free...
Method for simultaneous modular exponentiations
The present disclosure provides a method for performing modular exponentiation. The method may include generating a first remainder (xp) based on an encrypted...
System and method for compensation of non-linear transmitter distortion
A system, apparatus, method and article to provide compensation of non-linear transmitter distortion are described. The apparatus may include a receiver node...
Dynamically configuring a video decoder cache for motion compensation
A video decoder cache used for motion compensation data may be dynamically reconfigured. In some embodiments, it may be reconfigured on picture or frame...
Techniques to provide a channel quality indicator
In a wireless network, simultaneous support of distributed and contiguous sub-carrier allocation may be accomplished in the same sub-frame or time zone....
Method for improving power efficiency of subscriber stations
Disclosed is a method for improving power efficiency of subscriber stations in a communication network. A subscriber station is uniquely identified by a base...
Method and apparatus for flow control initialization
According to one embodiment of the invention, a credit/debit flow control mechanism performs credit initialization by a combination of standard protocol level...
Area efficient programmable read only memory (PROM) array
A programmable ROM (PROM) architecture includes cascode NMOS transistors with a fuse bit cell that is arrayed, with sleep transistors located in each column of...
Collapsible contact switch
Embodiments of the invention describe a contact switch, which may include a bottom electrode structure including a bottom actuation electrode and a top...
Dielectric spacers for metal interconnects and method to form the same
A plurality of metal interconnects incorporating dielectric spacers and a method to form such dielectric spacers are described. In one embodiment, the...
Photo-activated field effect transistor for bioanalyte detection
The application relates to a device and method for performing analyte detection, especially biomolecule detection. The device and method combine photo-induced...
Method and apparatus for combined electrochemical synthesis and detection
Described are devices and methods for detecting binding on an electrode surface. In addition, devices and methods for electrochemically synthesizing polymers...
Apparatus for solder crack deflection
An apparatus that includes a first component defining an interior of the apparatus; a first solder composition exterior to the first component; a second solder...
Method of enabling selective area plating on a substrate
A method of enabling selective area plating on a substrate includes forming a first electrically conductive layer (310) over substantially all of the substrate,...
Methods and apparatus for providing an insertion and integrity protection
system associated with a wireless...
Embodiments of methods and apparatus for providing an insertion and integrity protection system associated with a wireless communication platform are generally...
Authenticated distributed detection and inference
Embodiments of the present invention provide apparatuses, methods, and systems for authenticated distributed detection and inference. In various embodiments, an...
Mode selection for data transmission in wireless communication channels
based on statistical parameters
A method and communication system for selecting a mode for encoding data for transmission in a wireless communication channel between a transmit unit and a...
Apparatus and method for unilaterally loading a secure operating system
within a multiprocessor environment
An apparatus and method for unilaterally loading a secure operating system within a multiprocessor environment are described. The method includes disregarding a...
Selectively powered retirement unit using a partitioned allocation array
and a partitioned writeback array
In one embodiment, the present invention includes a retirement unit to receive and retire executed instructions. The retirement unit may include a first array...
Applying quality of service (QoS) to a translation lookaside buffer (TLB)
In one embodiment, the present invention includes a translation lookaside buffer (TLB) having storage locations each including a priority indicator field to...
Cache coherent switch device
In one embodiment, the present invention includes a switch device to be coupled between a first semiconductor component and a processor node by interconnects of...
Globally unique transaction identifiers
In one embodiment of the present invention, a method includes identifying a transaction from a first processor to a second processor of a system with a...
Method and apparatus for peer-to-peer services
A method and apparatus for peer-to-peer services have been described.
Interference suppression in computer radio modems
The present invention can reduce interference generated by processors and other computing devices when a connected radio is active. In one embodiment, the...
Recovering precoded data using a Mueller-Muller recovery mechanism
In one embodiment, the present invention includes an apparatus having a digital signal processor (DSP) coupled to receive a digitized signal. The DSP may be...
Supporting both packet and circuit-based wireless networks
Middleware may accommodate both packet data and circuit data services in the same cellular telephone. A cellular telephone may travel between networks that are...
System and method of dynamically optimizing a transmission mode of
wirelessly transmitted information
The present invention includes a method of optimizing a transmission mode of wirelessly transmitted data. The method includes selecting a first transmission...
Network adapter with TCP support
A network adapter and corresponding method for its use are disclosed. The network adapter has an operational mode that allows a host CPU to offload transmission...
Isolated P-well architecture for a memory device
A memory device and a method to prevent or reduce program disturb by isolating P-wells of strings in a non-volatile memory array. During a program operation,...
System and apparatus of reconfigurable transceiver design for multi-mode
A reconfigurable transceiver is claimed for a wide range of I/O systems. The reconfigurable transmitter of the reconfigurable transceiver is capable of...
Copper die bumps with electromigration cap and plated solder
Embodiments of the invention include apparatuses and methods relating to copper die bumps with electtomigration cap and plated solder. In one embodiment, an...
Methods for fabricating fine line/space (FLS) routing in high density
interconnect (HDI) substrates
A method for fabricating fine line and space routing described. The method includes providing a substrate having a dielectric layer and a seed layer disposed...
Contactless flash memory array
A method for forming a contactless flash memory cell array is disclosed. According to an embodiment of the invention, a plurality of active regions is formed on...
Techniques to manage critical region interrupts
Briefly, techniques to manage interrupts and swaps of threads operating in critical region. In an embodiment, a thread is to be interrupted during a first...
Methods and apparatus to provide a modular native method invocation system
Methods and apparatus to provide a modular native method invocation (NMI) system are described herein. In an example method, first NMI information associated...
Providing error correction coding for probed data
In one embodiment, the present invention includes a method for receiving an error correction code for information from a first port of a first agent and...
Decoupled clocking in testing architecture and method of testing
A test architecture and method of testing are disclosed to allow multiple scan controllers, which control different scan chain designs in multiple logic blocks,...
System and method for selecting optimal processor performance levels by
using processor hardware feedback...
An embodiment of the present invention is a system and method relating to adaptive power management using hardware feedback to select optimal processor...
Method, apparatus and system to dynamically choose an aoptimum power state
Some embodiments of the invention include an apparatus and method for dynamically choosing an optimum power state. In some embodiments, the optimum power state...
Determining length of instruction with multiple byte escape code based on
information from other than opcode byte
A method, apparatus and system are disclosed for decoding an instruction in a variable-length instruction set. The instruction is one of a set of new types of...
Protection of user-level applications based on page table information
In one embodiment, the present invention includes a virtual machine monitor (VMM) to access a protection indicator of a page table entry (PTE) of a page of a set...
Methods and apparatuses for nonvolatile memory wear leveling
Apparatuses, systems, and computer program products that enable wear leveling of nonvolatile memory devices, such as flash memory devices, are disclosed. One or...
Speculative distributed conflict resolution for a cache coherency protocol
A conflict resolution technique provides consistency such that all conflicts can be detected by at least one of the conflicting requestors if each node monitors...