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Patent # Description
US-8,019,939 Detecting data mining processes to increase caching efficiency
Methods and apparatus to detect a data mining process are presented. In one embodiment the method comprising monitoring access of a process to a resource and...
US-8,019,887 Method, system, and program for managing a speed at which data is transmitted between network adaptors
Provided are a method, system, and program for managing data transmissions at a local network device communicating with a linked network device over a network,...
US-8,019,715 Data partitioning and critical section reduction for bayesian network structure learning
In a parallel system, multiple threads operate in parallel to perform network structure learning. A global score cache is partitioned into multiple split score...
US-8,019,585 Systems and methods for critical node filtering of integrated circuits
Systems, apparatuses, methods, and computer program products for performing silicon debugging and isolating faults in integrated circuits are disclosed. Some...
US-8,019,370 Method and apparatus for a power-efficient framework to maintain data synchronization of a mobile personal...
An apparatus and method for a power-efficient framework to maintain data synchronization of a mobile personal computer (MPC) are described. In one embodiment,...
US-8,019,303 Multi-antenna multicarrier receiver and methods for adaptively adjusting a receive data rate based on channel...
A multicarrier receiver changes receive capabilities based on a current channel utilization. The number of antennas used to receive multicarrier communication...
US-8,019,026 Downlink preamble processing techniques for initial acquisition
An apparatus, system, method, and article for downlink (DL) preamble processing for initial acquisition are described. The apparatus may include an...
US-8,019,010 OFDM transmitter and method for multi-user MIMO transmissions
An orthogonal-frequency division multiplexed (OFDM) transmitter is configured to transmit a data unit in accordance with a multiple-input multiple-output (MIMO)...
US-8,019,007 Device, system, and method of flicker noise mitigation
Device, system, and method of flicker noise mitigation. For example, an apparatus includes a digital adaptive filter to mitigate flicker noise from a received...
US-8,018,992 Performing adaptive external equalization
In one embodiment, the present invention includes a method communicating control information for an external adaptive equalization process for a channel coupled...
US-8,018,935 Address search
In general, in one aspect, the disclosure describes a method of searching for an address within a collection of addresses. The method includes identifying a...
US-8,018,916 Techniques to couple HARQ-ARQ in wireless networks
An embodiment of the present invention provides an apparatus, comprising a transceiver adapted to reduce ARQ overhead by coupling HARQ and ARQ feedback...
US-8,018,890 Techniques using a hop-by-hop approach for automatic repeat request (ARQ) in wireless relay networks
An embodiment of the present invention provides an apparatus, comprising a transceiver adapted for use in a hop by hop (HbH) relay network and configured to...
US-8,018,821 Protection layers for media protection during fabrication of probe memory device
A micro-electro-mechanical system (MEMS) seek-scan probe (SSP) memory device utilizes a protective layer over the delicate media layer to protect the media...
US-8,018,763 Adaptive wordline programming bias of a phase change memory
The leakage current and power consumption of phase change memories may be reduced using adaptive word line biasing. Depending on the particular voltage applied...
US-8,018,530 Adaptive video de-interlacing
In some embodiments, a method includes receiving a plurality of video signal fields, characterizing at least one portion of at least one of the plurality of...
US-8,018,288 High-linearity low noise amplifier
Embodiments of a high-linearity low-noise amplifier (LNA) are generally described herein. Other embodiments may be described and claimed. In some embodiments,...
US-8,018,073 Electronic packages with fine particle wetting and non-wetting zones
Spreading or keep out zones may be formed in integrated circuit packages by altering the roughness of package surfaces. The surface roughness can be altered by...
US-8,018,063 Solder joint reliability in microelectronic packaging
A microelectronic assembly and method for fabricating the same are described. In an example, a microelectronic assembly includes a microelectronic device having...
US-8,017,933 Compositionally-graded quantum-well channels for semiconductor devices
A compositionally-graded quantum well channel for a semiconductor device is described. A semiconductor device includes a semiconductor hetero-structure disposed...
US-8,017,568 Cleaning residues from semiconductor structures
Supercritical carbon dioxide may be utilized to remove resistant residues such as those residues left when etching dielectrics in fluorine-based plasma gases....
US-8,017,498 Multiple die structure and method of forming a connection between first and second dies in same
A multiple die structure includes a first die (110), a second die (120), a carbon nanotube (130) having a first end (131) in physical contact with the first die...
US-8,017,463 Expitaxial fabrication of fins for FinFET devices
A fin for a finFET is described. The fin is a portion of a layer of material, where, another portion of the layer of material resides on a sidewall.
US-8,017,022 Selective electroless plating for electronic substrates
In some embodiments, selective electroless plating for electronic substrates is presented. In this regard, a method is introduced including forming a film on a...
US-8,016,023 Method and an apparatus for cooling a computer
A method including sensing a temperature of an electronic component in a portable computing device; circulating a fluid between one of a first heat transfer...
US-8,015,557 Methods and apparatus to support mixed-mode execution within a single instruction set architecture process of a...
Methods and apparatus to support the execution of a managed application that is linked to a native library or application are disclosed. The disclosed methods...
US-8,015,473 Method, system, and apparatus for ECC protection of small data structures
Data structures of different sizes may be stored in memory using different ECC schemes. A memory device may include multiple ECC engines to support error...
US-8,015,468 Channel estimation and fixed thresholds for multi-threshold decoding of low-density parity check codes
A method and apparatus are provided for error correction of a communication signal. A multiple fixed threshold scheme for iteratively decoding a received...
US-8,015,429 Clock and data recovery (CDR) method and apparatus
Embodiments of methods and apparatus for clock and data recovery are disclosed. In some embodiments, a method for recovering data from an input data stream of a...
US-8,015,392 Updating instructions to free core in multi-core processor with core sequence table indicating linking of...
A method of updating execution instructions of a multi-core processor comprising receiving execution instructions at a processor including multiple programmable...
US-8,015,365 Reducing back invalidation transactions from a snoop filter
In one embodiment, the present invention includes a method for receiving an indication of a pending capacity eviction from a caching agent, determining whether...
US-8,014,720 Service provisioning utilizing near field communication
Embodiments of the present invention provide methods, apparatuses, and programming instructions configured to enable a device to receive provisioning data over...
US-8,014,530 Method and apparatus for authenticated, recoverable key distribution with no database secrets
A method and apparatus for authenticated recoverable key distribution are described. In one embodiment, an application key is provided to an integrated chip...
US-8,014,461 Scalable system to adaptively transmit and receive including adaptive antenna signal and back-end processors
An adaptive baseband processing system having a scalable architecture to allow scaling to support adaptive transmission and receive, at different granularity,...
US-8,014,418 Allocating burst data units to available time-slots
A network device of a network environment may support burst switched technology. The network device may comprise a burst generator, a scheduler, and a content...
US-8,014,413 Shared input-output device
In some embodiments, a shared IO device includes a plurality of packet filters associated with a plurality of virtual systems sharing the shared I/O device and...
US-8,014,282 Hashing packet contents to determine a processor
The disclosure includes a description of an apparatus having circuitry to determine a first hash value for a first packet tuple of a first packet traveling in a...
US-8,013,715 Canceling self-jammer signals in an RFID system
A device and method for canceling one or more self-jammer signals in a radio-frequency identification system.
US-8,013,444 Solder joints with enhanced electromigration resistance
Electronic assemblies and solders used in electronic assemblies are described. One embodiment includes a die and a substrate, with a solder material positioned...
US-8,013,439 Injection molded metal stiffener for packaging applications
In some embodiments, an injection molded metal stiffener for packaging applications is presented. In this regard, an apparatus is introduced comprising a...
US-8,013,426 Transistor having raised source/drain self-aligned contacts and method of forming same
A transistor structure and a method of forming same. The transistor structure includes: a semiconductor substrate having a gate-side surface; a gate disposed on...
US-8,013,401 Selectively depositing aluminum in a replacement metal gate process
A method for carrying out a replacement metal gate process comprises providing a transistor in a reactor, wherein the transistor includes a gate stack, removing...
US-8,013,368 Replacement gates to enhance transistor strain
Some embodiments of the present invention include apparatuses and methods relating to NMOS and PMOS transistor strain.
US-8,012,878 Atomic layer volatilization process for metal layers
A two-stage method to remove a metal layer from a substrate surface comprises using a CMP process to remove a first portion of the metal layer from the...
US-8,012,816 Double pass formation of a deep quantum well in enhancement mode III-V devices
A quantum well is formed for a deep well III-V semiconductor device using double pass patterning. In one example, the well is formed by forming a first...
US-8,012,808 Integrated micro-channels for 3D through silicon architectures
Some embodiments of the present invention include apparatuses and methods relating to integrated micro-channels for removing heat from 3D through silicon...
US-8,012,651 Mounting a pellicle to a frame
A pellicle membrane is mounted between an outer frame and an inner frame. At least one of the frames is attached to the reticle without using conventional...
US-8,010,990 Acceleration of packet flow classification in a virtualized system
A computer system having a plurality of virtual machines is provided. Each virtual machine in the computer system has an associated policy (rules) database and...
US-8,010,969 Mechanism for monitoring instruction set based thread execution on a plurality of instruction sequencers
A technique to monitor software thread performance and update software that issues or uses the thread(s) to reduce performance-inhibiting events. At least one...
US-8,010,965 Automatic task performance as scheduled using embedded secondary processor
A system, apparatus and method to receive, schedule, and perform a task automatically on a multi-processor device are described herein. In various embodiments,...
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