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Patent # Description
US-8,218,337 Apparatus and method for embedding components in small-form-factor, system-on-packages
According to various aspects of the present disclosure, an apparatus is disclosed that includes a small form factor mobile platform including a ...
US-8,218,323 Apparatus and method for embedding components in small-form-factor, system-on-packages
According to various aspects of the present disclosure, an apparatus is disclosed that includes a small form factor mobile platform including a ...
US-8,218,082 Content adaptive noise reduction filtering for image signals
A method includes selecting a target pixel and comparing a value of the target pixel with a respective value of each of a plurality of pixels located in an area...
US-8,217,942 Subdividing geometry images in graphics hardware
A system may include a graphics memory, a data bus, a processor, and a vertex shader. The data bus may be operatively connected to the graphics memory. The...
US-8,217,696 Adaptive digital phase locked loop
In some embodiments, a digital PLL is disclosed with a dynamically controllable filter for changing the effective DPLL bandwidth in response to one or more...
US-8,217,504 Article and panel comprising semiconductor chips, casting mold and methods of producing the same
A panel with a reconfigured wafer including semiconductor chips arranged in rows and columns on semiconductor device positions includes: at least one...
US-8,217,435 Floating body memory cell having gates favoring different conductivity type regions
A method for fabricating floating body memory cells (FBCs), and the resultant FBCs where gates favoring different conductivity type regions are used is...
US-8,217,383 High hole mobility p-channel Ge transistor structure on Si substrate
The present disclosure provides an apparatus and method for implementing a high hole mobility p-channel Germanium ("Ge") transistor structure on a Silicon...
US-8,217,272 Apparatus and method for embedding components in small-form-factor, system-on-packages
According to various aspects of the present disclosure, an apparatus is disclosed that includes a small form factor mobile platform including a ...
US-8,216,881 Method for fabricating a semiconductor and semiconductor package
A method for fabricating a semiconductor chip module and a semiconductor chip package is disclosed. One embodiment provides a first layer, a second layer, and a...
US-8,216,071 Method and apparatus for software delivery and management
A method and apparatus for software delivery and management includes receiving an electronic catalog identifying one or more game titles, displaying at least a...
US-8,215,536 Rotational-flow spray nozzle and process of using same
A solder-flux composition is sprayed onto a substrate by rotating the solder-flux composition inside a spray cap, and before the solder-flux liquid exits the...
US-8,214,914 Securing wakeup network events
In an embodiment, a method is provided. The method of this embodiment provides receiving a packet having a wake-up pattern, and waking up if the wake-up pattern...
US-8,214,902 Determination by circuitry of presence of authorized and/or malicious data
An embodiment may include circuitry that may be comprised in a host. The host may include memory and a host processor to execute an operating system. The...
US-8,214,871 Signal compression for fiber node
A method, device and network for compressing cable modem data signals and conserving bandwidth within the network. Cable modems transmit upstream data signals...
US-8,214,867 Delivery of feedback information to scheduling service to determine optimum broadcast times based upon client...
Delivery of feedback information to a scheduling service to determine optimum broadcast times based upon client platform tuner contention is described. A usage...
US-8,214,837 Method, apparatus and system for dynamically allocating sequestered computing resources
A method, apparatus, and system enable sequestered partitions on a device. A scheduler may allocate resources to each of the sequestered partitions and...
US-8,214,830 Performance in a virtualization architecture with a processor abstraction layer
Embodiments of apparatuses and methods for improving performance in a virtualization architecture are disclosed. In one embodiment, an apparatus includes a...
US-8,214,818 Method and apparatus to achieve maximum outer level parallelism of a loop
In one embodiment, the present invention includes a method for constructing a data dependency graph (DDG) for a loop to be transformed, performing statement...
US-8,214,780 Optimization of verification of chip design
Embodiments of methods and apparatus for optimization of verification of a chip design are disclosed. In various embodiments, a method for reducing a number of...
US-8,214,677 Voltage regulator with suspend mode
A system is disclosed. The system includes a central processing unit (CPU) to operate in one or more low power sleep states, and a power converter. The power...
US-8,214,626 Method and apparatus for shuffling data
Method, apparatus, and program means for shuffling data. The method of one embodiment comprises receiving a first operand having a set of L data elements and a...
US-8,214,598 System, method, and apparatus for a cache flush of a range of pages and TLB invalidation of a range of entries
Systems, methods, and apparatus for performing the flushing of a plurality of cache lines and/or the invalidation of a plurality of translation look-aside...
US-8,214,596 Apparatus and method for segmented cache utilization
In some embodiments, a non-volatile cache memory may include a segmented non-volatile cache memory configured to be located between a system memory and a mass...
US-8,214,574 Event handling for architectural events at high privilege levels
Methods and apparatus to perform event handling operations are described. In one embodiment, after an event (such as an architectural event occurs), the...
US-8,214,573 Method and system for handling a management interrupt event in a multi-processor computing device
A method and system for handling a management interrupt, such as a system management interrupt (SMI) and/or a platform management interrupt (PMI), includes...
US-8,214,525 Addresses assignment for adaptor interfaces
An initial configuration is maintained assigning multiple local interfaces to one initial local address. For each local interface, a remote address of a remote...
US-8,214,414 Combined set bit count and detector logic
A merged datapath for PopCount and BitScan is described. A hardware circuit includes a compressor tree utilized for a PopCount function, which is reused by a...
US-8,214,237 Methods and apparatus for resource allocation in computer architectures
Methods and apparatuses for searching for an optimal resource allocation configuration are disclosed. First and second configurations for allocating resources...
US-8,213,894 Integrated circuit passive signal distribution
For one disclosed embodiment, an integrated circuit may comprise an internal transmission line in one or more layers of the integrated circuit. The internal...
US-8,213,887 Pre-distorting a transmitted signal for offset cancellation
In one embodiment, the present invention includes a pre-driver to receive data of a first clock phase and to pre-drive the data, a driver coupled to the...
US-8,213,804 Semiconductor optical amplifier for an external cavity diode laser
In one embodiment, a gain medium for an external cavity diode laser (ECDL) includes a gain section to provide a gain operation on optical energy in the ECDL...
US-8,213,618 Protecting content on client platforms
A method, computer system, and computer-readable medium with instructions to provide a client security management layer and a content player that ensure that...
US-8,213,542 Highly optimized digital IQ transmitter chain
Circuitry separates a modulation signal into digital sign and magnitude signal components. The digital magnitude signal is converted to an analog magnitude...
US-8,213,528 Apparatus and associated methods to perform space-frequency interleaving in a multicarrier wireless...
An apparatus and associated methods for performing space-frequency interleaving in a multicarrier wireless communication system is generally described.
US-8,213,344 Method and apparatus for antenna allocation on a multi-radio platform
In a multi-radio wireless device, a first radio and a second radio share a plurality of antennas. A MAC coordination engine may coordinate the activities of the...
US-8,213,305 Dynamic service management for multicore processors
A system, apparatus, method and article to perform dynamic service management for multicore processors are described. The apparatus may include, for example, a...
US-8,213,303 Generating, at least in part, and/or receiving, at least in part, at least one request
In an embodiment, an apparatus is provided that may include circuitry to generate, at least in part, and/or receive, at least in part, at least one request that...
US-8,213,291 Wireless data transmission methods, devices, and systems
Method and system for creating a radio block header that identifies a selected data block, a first compression scheme to compress a first encoded instance of...
US-8,213,145 Output driver protection
Embodiments of an output driver comprising a switching module configured to multiplex a protection transistor between a protection mode and a current mirror...
US-8,212,542 Load adaptive power delivery
Embodiments disclosed herein include a power monitor and controller which are used to control the operation of a voltage regulator depending on an operating...
US-8,212,350 Space and cost efficient incorporation of specialized input-output pins on integrated circuit substrates
In some embodiments an Integrated Circuit package includes a plurality of system functional pins, at least one system functional pin depopulation zone, and at...
US-8,212,183 Method and apparatus for utilizing thermal energy generated by medical diagnostic devices
This invention relates to the use of system thermal energy generated by equipment, such as an ultrasound sensing device, to transfer heat to the ...
US-8,211,772 Two-dimensional condensation for uniaxially strained semiconductor fins
Techniques are disclosed for enabling multi-sided condensation of semiconductor fins. The techniques can be employed, for instance, in fabricating fin-based...
US-8,211,771 Multiple-gate transistors and processes of making same
A microelectronic device includes a P-I-N (p+ region, intrinsic semiconductor, and n+ region) semiconductive body with a first gate and a second gate. The first...
US-8,211,501 Fluorination pre-treatment of heat spreader attachment indium thermal interface material
The formation of electronic assemblies including a heat spreader coupled to a die through a thermal interface material formed from an indium preform, is...
US-8,209,989 Microarchitecture control for thermoelectric cooling
An integrated circuit is cooled by microarchitecture controlled Peltier effect cooling. In one embodiment, a temperature sensor thermally coupled to at least a...
US-8,209,689 Live lock free priority scheme for memory transactions in transactional memory
A method and apparatus for avoiding live-lock during transaction execution is herein described. Counting logic is utilized to track successfully committed...
US-8,209,609 Audio-visual search and browse interface (AVSBI)
An audio-visual search and browse interface (AVSBI) is described. In an embodiment, a user interface module displays one or more media collections, where each...
US-8,209,579 Generalized multi-threshold decoder for low-density parity check codes
Methods, apparatus, and systems are provided for error correction of a communication signal. A generalized multiple threshold scheme for iteratively decoding a...
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