Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: intel





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-8,286,039 Disabling outbound drivers for a last memory buffer on a memory channel
Memory apparatus and methods utilizing multiple bit lanes may redirect one or more signals on the bit lanes. A memory agent may include a redrive circuit having...
US-8,286,016 Microarchitecture controller for thin-film thermoelectric cooling
A device having multiple cores executes an algorithm to control Thin-Film Thermoelectric Coolers (TFTEC) that employ the Peltier effect to remove heat from the...
US-8,286,014 Power management for a system on a chip (SoC)
In one embodiment, the present invention includes a method for sending a first link handshake signal between a first subsystem and a power management unit (PMU)...
US-8,285,994 Two-way authentication between two communication endpoints using a one-way out-of-band (OOB) channel
Techniques for two-way authentication between two communication endpoints (e.g., two devices) using a one-way out-of-band (OOB) channel are presented. Here, in...
US-8,285,909 Hardware assisted endpoint idleness detection for USB host controllers
In some embodiments, an electronic apparatus comprises at least one memory module, and a universal serial bus (USB) host controller coupled to the memory,...
US-8,285,907 Packet processing in switched fabric networks
Methods and apparatus, including computer program products, implementing techniques for forming an Advanced Switching (AS) packet by applying AS path binding...
US-8,285,789 Flattened butterfly processor interconnect network
A multiprocessor computer system comprises a folded butterfly processor interconnect network, the folded butterfly interconnect network comprising a traditional...
US-8,285,557 Apparatus, system and method for buffering audio data to allow low power states in a processing system during...
An audio data stream from a processing system may be buffered to allow low power states in the processing system during audio playback. An audio buffer may be...
US-8,284,800 OFDM communications using bit allocation tables
Messages transmitted between a receiver and a transmitter are used to maximize a communication data rate. In particular, a multicarrier modulation system uses...
US-8,284,766 Multi-core processor and method of communicating across a die
A multi-core die is provided that allows packets to be communicated across the die using resources of a packet switched network and a circuit switched network.
US-8,284,740 Techniques to share multimedia and enable cellular phone conference calling using ad-hoc wireless networks
An embodiment of the present invention provides an apparatus, comprising a wireless handset operable in a wireless wide area network (WWAN) and a wireless local...
US-8,284,725 Techniques to negotiate capabilities between networked devices
Techniques for signaling capabilities of a mobile station using a capabilities index as well as a fall back mechanism in case of system failure. The...
US-8,284,311 Screen filled display of digital video content
A dynamic region, such as subtitles, is detected in a stream of digital video, and displayed along with a static region also in the stream, such as a video...
US-8,283,771 Multi-die integrated circuit device and method
In some embodiments, provided is an integrated circuit with a first die coupled to a second die. The second die has through-silicon vias disposed through it to...
US-8,283,653 Non-planar germanium quantum well devices
Techniques are disclosed for forming a non-planar germanium quantum well structure. In particular, the quantum well structure can be implemented with group IV...
US-8,283,234 Memory including bipolar junction transistor select devices
An array is formed by a plurality of cells, wherein each cell is formed by a bipolar junction selection transistor having a first, a second, and a control...
US-8,281,402 Network vulnerability assessment of a host platform from an isolated partition in the host platform
According to embodiments of the present invention, host platform device includes an embedded firmware agent that may detect an attempt by the host platform...
US-8,281,387 Method and apparatus for supporting a virtual private network architecture on a partitioned platform
A computer system includes a service partition, not directly accessible to a user, having a security agent to inspect data entering and exiting the computer...
US-8,281,229 Firmware verification using system memory error check logic
Embodiments of an invention for verifying firmware using system memory error check logic are disclosed. In one embodiment, an apparatus includes an execution...
US-8,281,155 Content protection using block reordering
An apparatus and method for protecting a content item such as a digitally encoded movie, an electronic programming guide, or the like, by reordering blocks of...
US-8,281,135 Enforcing use of chipset key management services for encrypted storage devices
A method, system, and computer-readable storage medium containing instructions for controlling access to data stored on a plurality of storage devices...
US-8,281,123 Apparatus and method for managing and protecting information during use of semi-trusted interfaces
A system and method for managing private information while using semi-trusted interfaces is described. In an embodiment, an intermediate node may receive a...
US-8,281,122 Generation and/or reception, at least in part, of packet including encrypted payload
An embodiment may include circuitry to generate, at least in part, and/or receive, at least in part, a packet. The packet may include at least one field and an...
US-8,281,116 System and method for utilizing a protected/hidden region of semiconductor based memory/storage
A method for accessing a protected area of a solid-state storage device via firmware control is described. During system initialization, firmware components are...
US-8,281,109 Compressed instruction format
A technique for decoding an instruction in a variable-length instruction set. In one embodiment, an instruction encoding is described, in which legacy, present,...
US-8,281,101 Dynamic random access memory with shadow writes
Methods and apparatus are disclosed for reducing write-to-read turnaround times using shadow writes in memory controllers and in DRAM. Embodiments of...
US-8,281,083 Device, system and method of generating an execution instruction based on a memory-access instruction
Embodiments of the present invention provide an apparatus, system, and method of generating an execution instruction. Some demonstrative embodiments my include...
US-8,281,078 Multi-level cache prefetch
Methods and apparatus relating to multi-level cache prefetch are described. In some embodiments, a data parking logic updates a prefetch request with one or...
US-8,281,060 Virtual heterogeneous channel for message passing
A technique includes using a virtual channel between a first process and a second process to communicate messages between the processes. Each message contains...
US-8,281,043 Out-of-band access to storage devices through port-sharing hardware
A method, apparatus, system, and computer program product for enabling out-of-band access to storage devices through port-sharing hardware. Providing...
US-8,280,945 Method and system for dynamic application layer gateways
A method and system are disclosed for providing functionality on a network. A mobile agent moves from a first node to a target node and, at the target node,...
US-8,280,936 Packed restricted floating point representation and logic for conversion to single precision float
An apparatus for expanding an immediate vector of restricted data structures may include logic connected to a first memory and a second memory connected to the...
US-8,280,826 Combining speculative physics modeling with goal-based artificial intelligence
In one embodiment, the present invention includes a method for identifying a deformable object of a scene of a computer game that is visible by an artificial...
US-8,280,431 Apparatus for end-user transparent utilization of computational, storage, and network capacity of mobile...
Mobile devices, systems, and methods enable individual mobile devices and network services to utilize idle mobile computer resources through virtualization and...
US-8,280,417 Short user messages in system control signaling
Short user messages can be conveyed in system management signaling for a data or telephony network. In one example, a first control message is sent from a first...
US-8,280,335 Dynamic RFI detection
Provided herein are different embodiments for performing radio frequency interference (RFI) detection in electronic devices such as mobile computing systems.
US-8,279,972 System and method capable of implicit feedback for the devices with an unequal number of transmitter and...
An embodiment of the present invention provides a wireless station (STA) capable of implicit feedback in a wireless local area network, comprising at least one...
US-8,279,935 Method and apparatus for image quality control in video data
In one embodiment of the invention, a method for controlling video image quality may include receiving digital video data into a buffer that is coupled to a...
US-8,279,913 Configurable transceiver
A system is disclosed for operating a plurality of receiver paths and/or a plurality of transmitter paths in a single mode or multiple mode configuration.
US-8,279,886 Dataport and methods thereof
A context-free (stateless) dataport may allow multiple processors to perform read and write operations on a shared memory. The operations may include, for...
US-8,279,813 Method and apparatus of subchannelization of wireless communication system
A method and apparatus to transmit pilot subcarriers over uplink channels. The pilot subcarriers includes symbols which hierarchically structured. The symbol...
US-8,279,790 Packet buffering based at least in part upon packet receipt time interval weighted moving average
An embodiment may include circuitry to be comprised in a node. The node may be communicatively coupled to a network and may include a host processor to execute...
US-8,279,689 Low power termination for memory modules
An apparatus is provided that includes a memory controller to provide a first on-die termination (ODT) signal and a second ODT signal, a memory channel, a first...
US-8,279,355 Method and apparatus to support multi-channel reception
In accordance with various aspects of the disclosure, a method and apparatus for receiving multiple channels from a broadcast source and interfacing to multiple...
US-8,279,240 Video scaling techniques
A video scaler is disclosed. A polyphase filter can be used to generate interpolated pixels. The values of pixels adjacent an interpolated pixel are examined to...
US-8,279,213 Synchronized media processing
An electronic device comprises a central processing unit, a graphics processing unit, and a power control unit comprising logic to develop a predictive model of...
US-8,278,752 Microelectronic package and method for a compression-based mid-level interconnect
A microelectronic package includes first substrate (120) having first surface area (125) and second substrate (130) having second surface area (135). The first...
US-8,278,741 Sidewall photodetector
Sidewall photodetectors for integrated photonic devices and their method of manufacture. An embodiment includes a p-i-n film stack formed on a sidewall of a...
US-8,278,718 Stressed barrier plug slot contact structure for transistor performance enhancement
A method for forming a slot contact structure for transistor performance enhancement. A contact opening is formed to expose a contact region, and a slot contact...
US-8,278,692 Soft error reduction circuit and method
In some embodiments, complementary charge-collecting diffusions (transistor diffusions, e.g., drain or source areas) are disposed close to each other. In some...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.