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Patent # Description
US-9,578,037 Allowing varied device access based on different levels of unlocking mechanisms
Systems and methods may provide for receiving runtime input from one or more unlock interfaces of a device and selecting a level of access with regard to the...
US-9,578,008 Technologies for secure bootstrapping of virtual network functions
Technologies for bootstrapping virtual network functions in a network functions virtualization (NFV) network architecture include a virtual network function...
US-9,577,953 Determination of a suitable target for an initiator by a control plane processor
A first computational device receives a response generated by a second computational device for a third computational device. A target that is suitable for use...
US-9,577,799 Wireless device, method, and computer readable media for signaling a resource allocation in a high-efficiency...
Wireless device, computer readable medium, and methods for signaling a resource allocation in a high-efficiency (HE) signal field are disclosed. A HE wireless...
US-9,577,793 Soft buffer management
Soft buffer management circuitry is provided for use in a device of a wireless communication system. The soft buffer management circuitry has input circuitry...
US-9,577,791 Notification by network element of packet drops
Methods and apparatus for implementing notification by network elements of packet drops. In response to determining a packet is to be dropped, a network element...
US-9,577,784 System, device, and method for securing voice authentication and end-to-end speech interaction
A method, device, and system for secure end-to-end audio recognition is disclosed. A client device launches an application that connects with a server. The...
US-9,577,768 Method for determining a performance of a MIMO communication and communication device
A method for determining a performance of a MIMO communication is described comprising determining an estimate for the performance of the communication when...
US-9,577,684 High frequency time interleaved digital to time converter (DTC)
Described herein are technologies related to an implementation of a time interleaved digital-to-time converter (DTC) topology to generate high frequency phase...
US-9,577,668 Systems and apparatuses for performing CABAC parallel encoding and decoding
Apparatuses, systems, and computer program products that encode and/or decode information of a video stream, such as an MPEG-4 video stream, are disclosed. Some...
US-9,577,641 Spin transfer torque based memory elements for programmable device arrays
Disclosed herein are semiconductor device arrays, such as, Field Programmable Gate Arrays (FPGAs) and Complex Programmable Logic Arrays (CPLAs) that use...
US-9,577,634 Scalable crossbar apparatus and method for arranging crossbar circuits
Described is an apparatus (e.g., a router) which comprises: multiple ports; and a plurality of crossbar circuits arranged such that at least one crossbar...
US-9,577,581 Signal amplifier with active power management
A system for amplifying a signal with active power management according to one embodiment includes a first digital to analog converter (DAC) circuit configured...
US-9,577,523 Dual mode voltage regulator with reconfiguration capability
A dual mode voltage regulator according to one embodiment includes a passive regulator circuit, a switching regulator circuit, and a controller circuit...
US-9,577,448 Integration of wireless charging unit in a wireless device
Described herein are techniques related to one or more systems, apparatuses, methods, etc. for implementing a wireless charging and a wireless connectivity in a...
US-9,577,190 Thermal management structure for low-power nonvolatile filamentary switch
Heat-trapping bulk layers or thermal-boundary film stacks are formed between a heat-assisted active layer and an associated electrode to confine such transient...
US-9,577,060 Piezoresistive resonator with multi-gate transistor
An embodiment includes a first nonplanar transistor including a first fin that includes first source and drain nodes, and a first channel between the first...
US-9,577,057 Semiconductor device contacts
Techniques are disclosed for forming contacts in silicon semiconductor devices. In some embodiments, a transition layer forms a non-reactive interface with the...
US-9,577,030 Semiconductor structure having a capacitor and metal wiring integrated in a same dielectric layer
Semiconductor structures having capacitors and metal wiring integrated in a same dielectric layer are described. For example, a semiconductor structure includes...
US-9,576,942 Integrated circuit assembly that includes stacked dice
An integrated circuit assembly that includes a substrate; a member formed on the substrate; a first die mounted to the substrate within an opening in the member...
US-9,576,918 Conductive paths through dielectric with a high aspect ratio for semiconductor devices
Conductive paths through a dielectric are described that have a high aspect ratio for semiconductor devices. In one example, a plurality of conductive...
US-9,576,909 Bumpless die-package interface for bumpless build-up layer (BBUL)
Embodiments of the present disclosure are directed towards bumpless interfaces to an embedded silicon die, in integrated circuit (IC) package assemblies. In one...
US-9,576,608 Techniques for indexing video files
In one embodiment, an apparatus may include a processor circuit and a keyframe indexing module that is operative on the processor circuit to map sensor data...
US-9,576,479 Road crossing assistance for the visually impaired using two transmitted messages from beacons
Disclosed herein are techniques and systems to guide a visually impaired user through an urban area, such as, across a crosswalk. A mobile device may receive...
US-9,576,384 Hierarchical index bits for multi-sampling anti-aliasing
In accordance with some embodiments, a control surface stores the index bits in a tile using multi-sampling anti-aliasing. By determining whether all the...
US-9,576,346 Non-local means image denoising with an adaptive directional spatial filter
System, apparatus, method, and computer readable media for edge-enhanced non-local means (NLM) image denoising. In embodiments, edge detail is preserved in...
US-9,576,139 Techniques for a secure graphics architecture
Techniques for implementing a secure graphics architecture are described. In one embodiment, for example, an apparatus may comprise a processor circuit and a...
US-9,576,077 Generating and displaying media content search results on a computing device
Technologies for generating and displaying media search results on a computing device include determining search criteria based on media stored and/or accessed...
US-9,575,922 Apparatus, system, and method for improving equalization with a software equalization algorithm
A system and method consistent with the present disclosure includes determining a jitter tolerance of a particular lane of a communication link corresponding to...
US-9,575,895 Providing common caching agent for core and integrated input/output (IO) module
In one embodiment, the present invention includes a multicore processor having a plurality of cores, a shared cache memory, an integrated input/output (IIO)...
US-9,575,863 Apparatus of wireless gigabit display extension (WDE) device
In accordance with some embodiments, a DisplayPort control plane may be supported over a Wireless Gigabit Alliance or other wireless air interface. Some...
US-9,575,853 Accelerated data recovery in a storage system
One embodiment provides a storage system. The storage system includes storage system control logic to identify at least one target storage device in response to...
US-9,575,807 Processing accelerator with queue threads and methods therefor
Techniques related to a processing accelerator with queue threads are described herein.
US-9,575,806 Monitoring accesses of a thread to multiple memory controllers and selecting a thread processor for the thread...
A method of an aspect includes running a plurality of threads on a plurality of thread processors. Memory accesses, of a thread of the plurality that is running...
US-9,575,766 Causing an interrupt based on event count
Some implementations provide techniques and arrangements for causing an interrupt in a processor in response to an occurrence of a number of events. A first...
US-9,575,765 Coalescing adjacent gather/scatter operations
According to one embodiment, a processor includes an instruction decoder to decode a first instruction to gather data elements from memory, the first...
US-9,575,757 Efficient zero-based decompression
A processor core including a hardware decode unit to decode vector instructions for decompressing a run length encoded (RLE) set of source data elements and an...
US-9,575,727 Methods for generating random data using phase change materials and related devices and systems
Devices and systems operable to generate random numbers are disclosed and described. Such include an array of phase change material cells electrically coupled...
US-9,575,566 Technologies for robust two-dimensional gesture recognition
Technologies for performing two-dimensional gesture recognition are described. In some embodiments the technologies include systems, methods, and computer...
US-9,575,561 Method, apparatus and system for interacting with content on web browsers
A method, apparatus and system enable indirect remote interaction with a web browser. In one embodiment, remote user gestures may be captured and processed to...
US-9,575,559 Gaze-assisted touchscreen inputs
Embodiments related to gaze-assisted touchscreen inputs are disclosed. In some embodiments, a computing system may receive a gaze location signal indicative of...
US-9,575,552 Device, method and system for operation of a low power PHY with a PCIe protocol stack
Translation circuitry for facilitating communication between a protocol stack for a PCIe.TM. communication protocol and a PHY layer for a low power...
US-9,575,551 GNSS services on low power hub
In one embodiment an controller comprises logic, at least partially including hardware logic, configured to logic, at least partially including hardware logic,...
US-9,575,543 Providing an inter-arrival access timer in a processor
In an embodiment, a processor includes multiple cores each to independently execute instructions and a power control unit (PCU) coupled to the cores to control...
US-9,575,537 Adaptive algorithm for thermal throttling of multi-core processors with non-homogeneous performance states
In an embodiment, a processor comprises: a plurality of cores each to execute instructions; a plurality of thermal sensors, at least one of which is associated...
US-9,575,536 Methods and apparatus to estimate power performance of a job that runs on multiple nodes of a distributed...
A non-transitory computer readable storage medium having stored thereon instructions executable by one or more processors to perform operations including:...
US-9,575,341 Solid state LIDAR circuit with waveguides tunable to separate phase offsets
A solid state photonics circuit having a liquid crystal (LC) layer for beam steering. The LC layer can provide tuning of an array of waveguides by controlling...
US-9,575,269 Active optical cable assembly
Described are embodiments of apparatuses and systems of an active optical cable assembly including a connector plug configured to resist stress to optical...
US-9,574,832 Enabling an aluminum heat exchanger with a working fluid
In one embodiment, a heat exchanger may be formed using a corrosion-resistant aluminum material to enable usage of water as a working fluid for the exchanger....
US-9,573,541 Systems, methods, and apparatus for identifying an occupant of a vehicle
Certain embodiments of the invention may include systems, methods, and apparatus for identifying an occupant of a vehicle. According to an example embodiment of...
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