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Multi-level cache prefetch
Methods and apparatus relating to multi-level cache prefetch are described. In some embodiments, a data parking logic updates a prefetch request with one or...
Virtual heterogeneous channel for message passing
A technique includes using a virtual channel between a first process and a second process to communicate messages between the processes. Each message contains...
Out-of-band access to storage devices through port-sharing hardware
A method, apparatus, system, and computer program product for enabling out-of-band access to storage devices through port-sharing hardware. Providing...
Method and system for dynamic application layer gateways
A method and system are disclosed for providing functionality on a network. A mobile agent moves from a first node to a target node and, at the target node,...
Packed restricted floating point representation and logic for conversion
to single precision float
An apparatus for expanding an immediate vector of restricted data structures may include logic connected to a first memory and a second memory connected to the...
Combining speculative physics modeling with goal-based artificial
In one embodiment, the present invention includes a method for identifying a deformable object of a scene of a computer game that is visible by an artificial...
Apparatus for end-user transparent utilization of computational, storage,
and network capacity of mobile...
Mobile devices, systems, and methods enable individual mobile devices and network services to utilize idle mobile computer resources through virtualization and...
Short user messages in system control signaling
Short user messages can be conveyed in system management signaling for a data or telephony network. In one example, a first control message is sent from a first...
Dynamic RFI detection
Provided herein are different embodiments for performing radio frequency interference (RFI) detection in electronic devices such as mobile computing systems.
System and method capable of implicit feedback for the devices with an
unequal number of transmitter and...
An embodiment of the present invention provides a wireless station (STA) capable of implicit feedback in a wireless local area network, comprising at least one...
Method and apparatus for image quality control in video data
In one embodiment of the invention, a method for controlling video image quality may include receiving digital video data into a buffer that is coupled to a...
A system is disclosed for operating a plurality of receiver paths and/or a plurality of transmitter paths in a single mode or multiple mode configuration.
Dataport and methods thereof
A context-free (stateless) dataport may allow multiple processors to perform read and write operations on a shared memory. The operations may include, for...
Method and apparatus of subchannelization of wireless communication system
A method and apparatus to transmit pilot subcarriers over uplink channels. The pilot subcarriers includes symbols which hierarchically structured. The symbol...
Packet buffering based at least in part upon packet receipt time interval
weighted moving average
An embodiment may include circuitry to be comprised in a node. The node may be communicatively coupled to a network and may include a host processor to execute...
Low power termination for memory modules
An apparatus is provided that includes a memory controller to provide a first on-die termination (ODT) signal and a second ODT signal, a memory channel, a first...
Method and apparatus to support multi-channel reception
In accordance with various aspects of the disclosure, a method and apparatus for receiving multiple channels from a broadcast source and interfacing to multiple...
Video scaling techniques
A video scaler is disclosed. A polyphase filter can be used to generate interpolated pixels. The values of pixels adjacent an interpolated pixel are examined to...
Synchronized media processing
An electronic device comprises a central processing unit, a graphics processing unit, and a power control unit comprising logic to develop a predictive model of...
Microelectronic package and method for a compression-based mid-level
A microelectronic package includes first substrate (120) having first surface area (125) and second substrate (130) having second surface area (135). The first...
Sidewall photodetectors for integrated photonic devices and their method of manufacture. An embodiment includes a p-i-n film stack formed on a sidewall of a...
Stressed barrier plug slot contact structure for transistor performance
A method for forming a slot contact structure for transistor performance enhancement. A contact opening is formed to expose a contact region, and a slot contact...
Soft error reduction circuit and method
In some embodiments, complementary charge-collecting diffusions (transistor diffusions, e.g., drain or source areas) are disposed close to each other. In some...
Semiconductor heterostructures to reduce short channel effects
Semiconductor heterostructures to reduce short channel effects are generally described. In one example, an apparatus includes a semiconductor substrate, one or...
Fabricating current-confining structures in phase change memory switch
In one or more embodiments, methods of fabricating current-confining stack structures in a phase change memory switch (PCMS) cell are provided. One embodiment...
Through mold via polymer block package
Methods for forming an integrated circuit chip package having through mold vias in a polymer block, and such packages are described. For example, a first...
Method and apparatus to fabricate polymer arrays on patterned wafers using
A wafer having a plurality of dies (also called array chips) on the wafer, the die having an electrode to generate a deprotecting reagent, a working electrode...
Methods and device for analyte characterization
The methods and apparatus, disclosed herein are of use for sequencing and/or identifying proteins, polypeptides and/or peptides. Proteins containing labeled...
Dual epoxy dielectric and photosensitive solder mask coatings, and
processes of making same
A microelectronic device mounting substrate includes a bond pad with a side wall and an upper surface. A dielectric first layer is disposed on the mounting...
Magnetically coupled thin-wafer handling system
Aspects of the present disclosure may include an apparatus for enclosing a thin wafer to prevent damage during an on-going manufacture of integrated circuit...
Security-level enforcement in virtual-machine fail-over
Methods, systems, and articles to receive, by a fail-over computing device, a request to instantiate a virtual-machine in response to a virtual-machine failure...
Thread livelock reduction unit
Method, apparatus and system embodiments to assign priority to a thread when the thread is otherwise unable to proceed with instruction retirement. For at least...
Hardware support for thread scheduling on multi-core processors
A method, device, and system are disclosed. In one embodiment the method includes scheduling a thread to run on first core of a multi-core processor. The...
Devices, methods and computer program products for reverse execution of a
Devices, methods, and software program products for reverse execution of a simulation and/or tracing a value are provided. A state of a preceding checkpoint may...
Using error information from nearby locations to recover uncorrectable
data in non-volatile memory
In various embodiments, the reference voltage used for read operations in a non-volatile memory may be adjusted up or down in an attempt to read data from an...
Systems and methods for energy efficient load balancing at server clusters
Methods and systems to balance the load among a set of processing units, such as servers, in a manner that allows the servers periods of low power consumption....
Performance prioritization in multi-threaded processors
According to one embodiment of the invention, a method is disclosed for selecting a first subset of a plurality of cache ways in a cache for storing hardware...
Method of decreasing a total computation time for a visual simulation loop
in a virtual world application
A method of decreasing a total computation time for a visual simulation loop includes sharing a common data structure across each phase of the visual simulation...
Embedded bus emulation
A bus emulation device in accordance with one aspect of the present description includes an embedded microcontroller and a nonvolatile memory carried on a body....
Power measurement techniques of a system-on-chip (SOC)
A method and system to enable power measurements of a system-on-chip in various modes. In one embodiment of the invention, the system-on-chip has full...
Handover for cellular radio communications
An improved handover process is described for a cellular wireless network. In one example, a method includes registering a mobile station to a first base...
Methods and systems to estimate channel frequency response in
Methods and systems to determine channel frequency responses corresponding to multi-carrier signals, such as OFDM signals, including to filter or mask noise...
Advanced television systems committee (ATSC) digital television (DTV)
A computer system may comprise a receiver to perform equalization. The receiver comprises an equalizer. The equalizer may determine locations of a principal...
Quality of service packet processing without explicit control negotiations
Apparatuses, methods, systems, and computer program products to process QoS packets of wireless traffic without explicit control negotiations are disclosed. An...
Techniques to control self refresh display functionality
Techniques are described to monitor a level of graphics processing activity and control power usage based on the level. When no graphics processing activity is...
Automatic frequency control architecture with digital temperature
A mixed signal circuit architecture is disclosed for automatic frequency control and digital temperature compensation in an LC-PLL system. Some embodiments...
Method and apparatus for dynamic memory termination
Described herein are a method and an apparatus for dynamically switching between one or more finite termination impedance value settings to a memory...
Flow tube apparatus
A flow tube apparatus may include a flow tube having a first opening and a second opening, a corona electrode provided in the flow tube, a collecting electrode...
Nonplanar semiconductor device with partially or fully wrapped around gate
electrode and methods of fabrication
A nonplanar semiconductor device and its method of fabrication is described. The nonplanar semiconductor device includes a semiconductor body having a top...
Nanofabricated structures for electric field-assisted nucleic acid
Embodiments of the invention provide devices and methods for extracting nucleic acid molecules from solution using electric fields. The structures and methods...