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Patent # Description
US-8,958,302 Apparatus, system and method of controlling data flow over a wireless communication link with credit allocation
Some demonstrative embodiments include apparatuses, systems and/or methods of controlling data flow over a wireless communication link with credit allocation....
US-8,957,961 Method and sytem for telecine detection and restoration
A method and system are disclosed. The method includes receiving a video clip including a plurality of frames. The method further includes detecting a telecine...
US-8,957,776 Methods and arrangements for smart sensors
Generally, smart sensors, logic to process messages from smart sensors, and smart sensor systems are described herein. Embodiments may comprise logic such as...
US-8,957,740 Low power oscillator with negative resistance boosting
Representative implementations of devices and techniques provide increased negative resistance to an oscillator circuit. A capacitance divider and/or a feedback...
US-8,957,705 Phase frequency detector
Described is an apparatus comprising: a first phase frequency detector (PFD) to determine a coarse phase difference between a first clock signal and a second...
US-8,957,513 Semiconductor device with embedded interconnect pad
A semiconductor device comprising: a lower semiconductor package that comprises a first set of one or more semiconductor dies, an upper semiconductor package...
US-8,957,476 Conversion of thin transistor elements from silicon to silicon germanium
Embodiments of the present disclosure provide techniques and configurations associated with conversion of thin transistor elements from silicon (Si) to silicon...
US-8,956,193 Helicoil spring backing socket
Methods of forming a socket assembly and associated structures formed thereby are described. Those methods and structures may include forming a socket assembly...
US-8,955,746 Providing a locking technique for electronic displays
In one embodiment, the present invention includes a method for receiving in a persistent electronic display an authentication code from an end user, determining...
US-8,955,144 Protecting information processing system secrets from debug attacks
Embodiments of an invention for protecting information processing system secrets from debug attacks are disclosed. In one embodiment, a processor includes...
US-8,955,098 Establishing network security using internet protocol security policies
Techniques for configuring network security include obtaining non-packet flow information, evaluating a policy rule based on the obtained information, and...
US-8,955,045 Facilitating varied access based on authentication scoring
Systems and methods may provide for determining a composite false match rate for a plurality of authentication factors in a client device environment....
US-8,955,039 Mobile platform with sensor data security
Generally, this disclosure describes devices, methods and systems for securely providing context sensor data to mobile platform applications. The method may...
US-8,954,986 Systems and methods for data-parallel processing
Methods, systems, and mediums are described for scheduling data parallel tasks onto multiple thread execution units of processing system. Embodiments of a...
US-8,954,977 Software-based thread remapping for power savings
On a multi-core processor that supports simultaneous multi-threading, the power state for each logical processor is tracked. Upon indication that a logical...
US-8,954,941 Method and apparatus and record carrier
Method of generating respective instruction compaction schemes for subsets of instructions to be processed by a programmable processor, comprising the steps of...
US-8,954,790 Fault tolerance of multi-processor system with distributed cache
A semiconductor chip is described having different instances of cache agent logic circuitry for respective cache slices of a distributed cache. The...
US-8,954,775 Power gating functional units of a processor
In one embodiment, the present invention includes an apparatus having a core including functional units each to execute instructions of a target instruction set...
US-8,954,771 Split deep power down of I/O module
I/O logic can be separated into critical and non-critical portions, with the non-critical portions being powered down during processor idle. The I/O logic is...
US-8,954,770 Controlling temperature of multiple domains of a multi-domain processor using a cross domain margin
In one embodiment, the present invention includes a method for determining, in a controller of a multi-domain processor, whether a temperature of a second...
US-8,954,754 Method and apparatus to process SHA-1 secure hashing algorithm
A processor includes an instruction decoder to receive a first instruction to process a SHA-1 hash algorithm, the first instruction having a first operand to...
US-8,954,748 Systems and methods for controlling access to supplemental content integrated into existing content
Methods and systems to allow for selective access to supplemental content that is associated with more generally distributed original content. In an embodiment,...
US-8,954,747 Protecting keystrokes received from a keyboard in a platform containing embedded controllers
Systems and methods of managing keystroke data in embedded keyboard environments may involve transferring a mode request from a management controller to an...
US-8,954,735 Device, method, and system for secure trust anchor provisioning and protection using tamper-resistant hardware
A method and device for securely provisioning trust anchors includes generating a database wrapper key as a function of computing device hardware. The database...
US-8,954,674 Scatter-gather intelligent memory architecture for unstructured streaming data on multiprocessor systems
A scatter/gather technique optimizes unstructured streaming memory accesses, providing off-chip bandwidth efficiency by accessing only useful data at a fine...
US-8,954,661 Binary search pipeline
Efficient hardware implementations of a binary search algorithm are provided.
US-8,954,650 Apparatus, system, and method for improving read endurance for a non-volatile memory
Described are an apparatus, system, and method for improving read endurance for a non-volatile memory (NVM). The method comprises: determining a read count...
US-8,954,620 Techniques for using an assigned switch identification at an input/output device
Examples are disclosed for assigning a switch identification to data received at an input/output device coupled to a host device. In some examples, the data may...
US-8,954,562 Entropy-based (self-organizing) stability management
In some embodiments, the invention involves calculating entropy-based stability values to be used in a framework to build a new class of network control...
US-8,954,022 Feedback receiver for antenna tuner calculations
Some embodiments of the present disclosure relate to a feedback receiver comprising a threshold comparator configured to determine if the amplitude of a...
US-8,954,021 Group III-N transistors on nanoscale template structures
A III-N semiconductor channel is formed on a III-N transition layer formed on a (111) or (110) surface of a silicon template structure, such as a fin sidewall....
US-8,954,018 Tunable wideband distribution circuit
A tunable wideband distribution circuit for transmitting a wireless signal over a transmission line is disclosed. The tunable wideband distribution circuit may...
US-8,953,807 Method and apparatus for remotely provisioning software-based security coprocessors
A virtual security coprocessor is created in a first processing system. The virtual security coprocessor is then transferred to a second processing system, for...
US-8,953,806 Method and apparatus for remotely provisioning software-based security coprocessors
A virtual security coprocessor is created in a first processing system. The virtual security coprocessor is then transferred to a second processing system, for...
US-8,953,785 Instruction set for SKEIN256 SHA3 algorithm on a 128-bit processor
According to one embodiment, a processor includes an instruction decoder to receive a first instruction to perform first SKEIN256 MIX-PERMUTE operations, the...
US-8,953,696 Signal decoding systems
We describe an ultra wideband (UWB) orthogonal frequency division multiplexed (OFDM) modified dual carrier modulation (MDCM) decoder comprising: first and...
US-8,953,663 Calibration of quadrature imbalance via loopback phase shifts
Apparatuses, systems, and methods for calibration of quadrature imbalance in direct conversion transceivers are contemplated. A transceiver controller may...
US-8,953,644 Multi-protocol I/O interconnect time synchronization
Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for...
US-8,953,636 End-to-end feature support signaling
Techniques and mechanisms to communicate end-to-end feature compliance information. Network access requests may be accompanied by ...
US-8,953,634 Device, system and method of communicating data during an allocated time period
Some demonstrative embodiments include devices, systems and/or methods of communicating during an allocated time period. For example, an apparatus may include a...
US-8,953,631 Interruption, at least in part, of frame transmission
An embodiment may include circuitry to permit interruption, at least in part, of a first frame from a sender to an intended recipient in favor of transmitting,...
US-8,953,502 Receiver for receiving RF-signals in a plurality of different communication bands and transceiver
A receiver for receiving RF-signals in a plurality of different communication bands, each communication band including a receive frequency range and a transmit...
US-8,953,482 Methods and apparatuses to improve on-time throughput for integrated multi-rat heterogeneous networks
Methods and devices for optimizing on-time throughput in a wireless network. An enhanced node B (eNodeB) integrating two or more air interfaces schedules...
US-8,953,478 Evolved node B and method for coherent coordinated multipoint transmission with per CSI-RS feedback
An evolved Node B (eNB) and method for coherent coordinated multipoint transmission with per CSI-RS feedback are generally described herein. The eNB may...
US-8,953,313 Method and apparatus for enhanced cooling of mobile computing device surfaces
An apparatus with some embodiments is described having ducts positioned above and below a main device housing to provide cooling air flow to at least a portion...
US-8,952,761 System and method for supporting different types of oscillator circuits
In accordance with some embodiments of the present disclosure, an oscillator circuit comprises, a first pad associated with a first terminal of an oscillator...
US-8,952,571 Extendable wireless power delivery for small devices
In various embodiments, an electronic device such as a portable computer has a structure that extends from the device to wirelessly transfer electrical power...
US-8,952,550 Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method...
The invention relates to a ball-limiting metallurgy stack for an electrical device that contains at least one copper layer disposed upon a Ti adhesion metal...
US-8,952,541 Method of fabricating metal-insulator-semiconductor tunneling contacts using conformal deposition and thermal...
A contact may be fabricated by a method including depositing a dielectric layer on a substrate having a transistor, etching a first opening in the dielectric...
US-8,952,540 In situ-built pin-grid arrays for coreless substrates, and methods of making same
A coreless pin-grid array (PGA) substrate includes PGA pins that are integral to the PGA substrate without the use of solder. A process of making the coreless...
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