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Virtualizing interrupt priority and delivery
Embodiments of processors, methods, and systems for virtualizing interrupt prioritization and delivery are disclosed. In one embodiment, a processor includes...
Optimizing code using a bi-endian compiler
In one embodiment, a method includes identifying a byte swap operation, building a domain including the byte swap operation and other expressions, identifying...
An iterative decoder for decoding a code block comprises a computation unit configured to perform forward and backward recursions over a code block or a code...
Recoverable parity and residue error
An error recovery unit that may include error logic to detect an error in a dispatch port and timestamp logic configured to generate a timestamp for the error....
Method and device for decoding data
A method comprises predicting a workload required for decoding a code block using a turbo decoder and selecting a power mode of the turbo decoder, the selection...
Extensible pre-boot authentication
In one embodiment, the present invention includes a method for obtaining a pre-boot authentication (PBA) image from a non-volatile storage that is configured...
Multi-mode handheld wireless device with shared mode to support cross-mode
Various embodiments of the invention relate to a multi-function handheld user device that may have multiple selectable modes of operation for different areas of...
Systems, methods, and apparatuses to decompose a sequential program into
multiple threads, execute said...
Systems, methods, and apparatuses for decomposing a sequential program into multiple threads, executing these threads, and reconstructing the sequential...
Permute operations with flexible zero control
In one embodiment, the present invention includes logic to receive a permute instruction, first and second source operands, and control values, and to perform a...
Copy equivalent protection using secure page flipping for software
components within an execution environment
Embodiments of copy equivalent protection using secure page flipping for software components within an execution environment are generally described herein. An...
Method and apparatus for high bandwidth dictionary compression technique
using delayed dictionary update
Method, apparatus, and systems employing novel delayed dictionary update schemes for dictionary-based high-bandwidth lossless compression. A pair of...
Processing out of order transactions for mirrored subsystems using a cache
to track write operations
Methods and apparatus relating to processing out of order transactions for mirrored subsystems. A first device (that is mirroring data from a second device)...
Fast exit from self-refresh state of a memory device
A system provides for a signal to indicate when a memory device exits from self-refresh. Thus, substantially at the same time (before or after) the memory...
Methods and apparatus to share a thread to reclaim memory space in a
non-volatile memory file system
A disclosed example method involves associating a shared reclaim thread with an on-board flash memory device to reclaim first memory space in the on-board flash...
Pipeline architecture for scalable performance on memory
An apparatus for data storage is presented. In one embodiment, the apparatus includes a phase change memory device comprising phase change memory storage...
Systems and methods for dynamic access to program features
The multimedia client-server system provides a multimedia client program with a set of features and a server system that creates feature access information that...
Playlist compilation system and method
A method, computer program product and client electronic device for storing, in a memory of a client electronic device, a location of at least one remote media...
Mobile unit having internet protocol functionality
A mobile unit includes a handset and a removable storage module having a unique storage module identity, for storing information specific to a user, including...
Receiver, method and mobile communication device
A receiver includes a first amplifier and a second amplifier, a first mixer, a second mixer and a third mixer, a first baseband signal path and a second...
System and method to avoid saturation of an associating WiGig station
A system and method are provided to facilitate establishing WiGig communications links between WiGig-enabled wireless devices and WiGig PBSS Control Points and...
Adjustable delayer, method for delaying an input signal and polar
An adjustable delayer for adjustably delaying an input signal based on a delay adjustment input information describing a desired delay includes a plurality of...
Earpiece for an electronic device
A docking earpiece may be provided. The docking ear piece may include a body, an earpiece plug on the body, and a first bladder in the earpiece plug. The...
Systems and methods for implementing soft-decision Reed-Solomon decoding
to improve cable modem and cable...
A system and method are provided for implementing a soft Reed-Solomon (RS) decoding scheme, technique or algorithm to improve physical layer performance in...
Methods and apparatus for signaling on a differential link
Methods and apparatus are disclosed for transitioning a receiver from a first state to a second state using an in-band signal over a differential serial data link.
A phase interpolator is provided. The phase interpolator includes a plurality of capacitors, a first input for a clock signal, a second input for a phase shift...
Apparatus and methods using an efficient Golay correlator running at 1.5
the sampling rate in wireless...
An embodiment of the present invention provides an apparatus, comprising a transmitter operable to communicate in a wireless network and adapted to use an...
System and method for intracoding and decoding video data
A video system for coding a stream of video data that includes a stream of video frames divides each video frame into a matrix of a plurality of subblocks,...
Joint adaptive bias point adjustment and digital pre-distortion for power
One embodiment of the present invention relates to a method and apparatus are provided herein for reducing the power consumption of a transmission chain while...
Receiver with multi layer interference cancellation
A multi user receiver configured to receive a signal including multiple symbol streams assigned to various users is described. The multiple symbol streams...
Multicast support on a switch for PCIe endpoint devices
Devices and method with hardware configured to support phantom register programming. Where phantom register programming allows a device driver for an endpoint...
Dynamic bandwidth allocation for multiple access communications using
buffer urgency factor
A code division multiple access (CDMA) user device configured to dynamically allocating at least one wireless communication channel to permit a more efficient...
Maintenance of channel usage in a wireless communication system
Data is accessed from a network via a wireless communication link. A determination is made as to whether payload data has been received from a subscriber's...
Controlled interconnection of networks using virtual nodes
Methods, apparatuses, and systems for controlling interconnections between nodes using virtual nodes are described. A physical node--such as a router, bridge,...
Optical capacitive thumb control with pressure sensor
A small sensor surface designed to control a smart phone or Mobile Internet Device (MID). The sensor surface may be mounted on the side of the proposed device...
Edge-emitting antennas for ultra slim wireless mobile devices
Described herein are techniques related to near field coupling and wireless power transfers. A mobile device may include an edge-emitting antenna that offers...
Integrated antennas for near field coupling integration
Described herein are techniques related to near field coupling and wireless power transfers. In an implementation, a portable device may include full metallic...
Digital-to-analog converter comprising slow converter section and fast
A digital-to-analog converter for converting digital values to an analog output signal includes a first converter section and a second converter section...
Semiconductor package with air core inductor (ACI) having a metal-density
layer unit of fractal geometry
Semiconductor packages with air core inductors (ACIs) having metal-density layer units of fractal geometry are described. In an example, an inductor structure...
Apparatus, system and method for configuring signal modulation
Techniques and mechanisms for configuring logic to implement a signal modulation. In an embodiment, the logic includes a finite impulse response (FIR) module...
Pitch quartering to create pitch halved trenches and pitch halved air gaps
A silicon structure is fabricated determining a pattern for wire trenches and air gaps. The wire trenches are created, and certain trenches are used as air...
A chip arrangement may include: a first chip including a first contact, a second contact, and a redistribution structure electrically coupling the first contact...
Heat dissipation device embedded within a microelectronic die
The subject matter of the present application relates to a heat dissipation device that is embedded within a microelectronic die. The heat dissipation device...
Connector assembly and method
Connectors and methods to couple packages and dies are shown. Selected examples include plugs and receptacles having two or more terraces with contacts provided...
Method of placing a chip assembly in a socket housing
A land grid array (LGA) socket uses a series of inclined engagement features to transfer a lateral load into a normal load to retain the LGA package in the...
Location-based vehicle messaging system
A system may enable vehicle operators to request information automatically along the route of travel by transmitting information requests, tied to the vehicle's...
Pre-fetching data and overlapping data transfers in a HWA-DWA system
Data is managed in a Host Wireless Adapater (HWA)-Device Wireless Adapater (DWA) system by receiving at the HWA a wireless packet from the DWA which contains a...
Method and apparatus for testing I/O boundary scan chain for SoC's having
I/O's powered off by default
Methods and apparatus for testing Input/Output (I/O) boundary scan chains for Systems on a Chip (SoCs) having I/Os that are powered off by default. Some methods...
Visual indicator and adjustment of media and gaming attributes based on
Systems and methods may provide for identifying an amount of time associated with a user based activity with respect to a battery powered device, and...
Increasing power efficiency of turbo mode operation in a processor
In one embodiment, a processor has multiple cores to execute threads. The processor further includes a power control logic to enable entry into a turbo mode...
Multi-factor authentication process
Systems and methods may implement a multi-factor authentication process utilizing, among other things, a value known by a user and an item in the user's...