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Patent # Description
US-9,003,642 Method for making a magnetically coupled thin-wafer handling system
The present invention describes a method of and an apparatus for including: separating magnets and corresponding target plates; separating a lower support...
US-9,003,421 Acceleration threads on idle OS-visible thread execution units
Disclosed are embodiments of a system, methods and mechanism for using idle thread units to perform acceleration threads that are transparent to the operating...
US-9,003,375 Optional logging of debug activities in a real time instruction tracing log
In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for implementing optional logging...
US-9,003,246 Functional memory array testing with a transaction-level test engine
A memory subsystem includes a test engine coupled to a memory controller that can provide memory access transactions to the memory controller, bypassing a...
US-9,003,236 System and method for correct execution of software based on baseline and real time information
In an embodiment of the invention an application provider may include "tracing elements" in a target software application. While working with the application...
US-9,003,210 Dynamic voltage transitions
The operating voltage of an integrated circuit (e.g., a processor) is changed in response to one or more conditions (e.g., a laptop computer is connected to an...
US-9,003,209 Efficient integrated switching voltage regulator comprising switches coupled to bridge drivers to provide...
Described herein is an integrated circuit which comprises: a switching voltage regulator (SVR), having one or more bridge drivers, to provide regulated power...
US-9,003,170 Bit range isolation instructions, methods, and apparatus
Receiving an instruction indicating a source operand and a destination operand. Storing a result in the destination operand in response to the instruction. The...
US-9,003,164 Providing hardware support for shared virtual memory between local and remote physical memory
In one embodiment, the present invention includes a memory management unit (MMU) having entries to store virtual address to physical address translations, where...
US-9,003,126 Apparatus, system and method for adaptive cache replacement in a non-volatile main memory system
Techniques and mechanisms for adaptively changing between replacement policies for selecting lines of a cache for eviction. In an embodiment, evaluation logic...
US-9,002,914 Method, apparatus and instructions for parallel data conversions
Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding...
US-9,002,339 Consumption and capture of media content sensed from remote perspectives
Embodiments of apparatus, packages, computer-implemented methods, systems, devices, and computer-readable media (transitory and non-transitory) are described...
US-9,002,310 IP2 calibration methods and techniques
Some embodiments of the present disclosure relate to improved techniques for performing IP2 calibration in receivers having two complementary data paths (e.g.,...
US-9,002,281 Apparatus and method to enable device-to-device (D2D) communication in cellular networks
An apparatus and method of allowing user equipment to transmit information directly with other user equipment, using a device-to-device mode is disclosed...
US-9,002,052 Method, server, and computer-readable recording medium for assisting multiple users to perform collection...
The present invention relates to a method for assisting multiple users to perform a collection simultaneously. The method includes the steps of: (a) acquiring...
US-9,001,879 Apparatus, system and method of beam selection for beamformed diversity wireless communication
Some demonstrative embodiments include devices, systems and/or methods of beam selection for beamformed communication. For example, an apparatus may include a...
US-9,001,806 Method and apparatus for managing a probe response related to wireless medium access control
An approach is provided for managing a probe response related to wireless medium access control. The approach involves causing, at least in part, an active scan...
US-9,001,783 Dual base stations for wireless communications systems
A network apparatus comprises a controller to determine a first base station for transmitting data and to determine a second different base station for...
US-9,001,759 Base station and method for resource allocation in a 3GPP LTE network
Embodiments of a base station and methods for allocating uplink bandwidth using SDMA are generally described herein. In some embodiments, uplink bandwidth...
US-9,001,738 Message generating arrangement
A message generating arrangement determines whether a first communication terminal of a communication system can participate, by means of packet-switching...
US-9,001,721 Device, system and method of power management in a wireless area network
Device, system, and method of power management. In some demonstrative embodiments, a device may include a wireless communication unit to transmit to a control...
US-9,001,636 Method for signaling information by modifying modulation constellations
Methods and systems for communicating in a wireless network may distinguish different types of packet structures by modifying the phase of a modulation...
US-9,001,608 Coordinating power mode switching and refresh operations in a memory device
Provided are a memory system, device, and method for determining to send a refresh command to a memory module according to a refresh rate and incrementing a...
US-9,001,520 Microelectronic structures having laminated or embedded glass routing structures for high density packaging
Embodiments of the present description relate to the field of fabricating microelectronic structures. The microelectronic structures may include a glass routing...
US-9,001,138 2-D gather instruction and a 2-D cache
A processor may support a two-dimensional (2-D) gather instruction and a 2-D cache. The processor may perform the 2-D gather instruction to access one or more...
US-9,000,998 Tri-column adjustable azimuth beam width antenna for wireless network
A tri-column antenna array architecture, containing a plurality of active radiating elements that are spatially arranged on a modified reflector structure is...
US-9,000,843 Power management in transceivers
Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an...
US-9,000,599 Multichip integration with through silicon via (TSV) die embedded in package
Embodiments of the present disclosure are directed to integrated circuit (IC) package assemblies with three-dimensional (3D) integration of multiple dies, as...
US-9,000,577 Interlayer communications for 3D integrated circuit stack
Some embodiments provide capacitive AC coupling inter-layer communications for 3D stacked modules.
US-8,999,765 Methods to prevent filler entrapment in microelectronic device to microelectronic substrate interconnection...
Embodiments of the present description include methods for attaching a microelectronic device to a microelectronic substrate with interconnection structures...
US-8,999,724 Method and apparatus for match quality analysis of analyte binding
Described are devices and methods for detecting the match quality and concentration of analytes binding to an electrode surface. The devices utilize a clock to...
US-RE45,458 Dual function system and method for shuffling packed data elements
An apparatus and method for performing a shuffle operation on packed data using computer-implemented steps is described. In one embodiment, a first packed data...
US-8,997,121 Providing support for position-related applications
A method of providing position support to a main processor of a computing device is disclosed. The method may include receiving primary position data from a...
US-8,997,114 Language level support for shared virtual memory
Embodiments of the invention provide language support for CPU-GPU platforms. In one embodiment, code can be flexibly executed on both the CPU and GPU. CPU code...
US-8,997,113 Sharing virtual functions in a shared virtual memory between heterogeneous processors of a computing platform
A computing platform may include heterogeneous processors (e.g., CPU and a GPU) to support sharing of virtual functions between such processors. In one...
US-8,997,099 Virtualization event processing in a layered virtualization architecture
Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an...
US-8,996,948 Methods, systems, and apparatus for tail termination of turbo decoding
Methods and apparatus for tail termination are provided that include a decoder that includes a processor configured to a forward state metric and a backward...
US-8,996,934 Transaction-level testing of memory I/O and memory device
A memory subsystem includes a test engine coupled to a memory controller that can provide memory access transactions to the memory controller, bypassing a...
US-8,996,923 Apparatus and method to obtain information regarding suppressed faults
A processor includes an execution unit, a fault mask coupled to the execution unit, and a suppress mask coupled to the execution unit. The fault mask is to...
US-8,996,899 Independent power control of processing cores
Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least...
US-8,996,895 Method, apparatus, and system for energy efficiency and energy conservation including optimizing C-state...
A processor may include power management techniques to, dynamically, chose an optimal C-state for the processing core. The measurement of real workloads on the...
US-8,996,883 Securing inputs from malware
A series of touch panel key entries may be secured by shuffling touch entry coordinates. In one embodiment, the entries may be secured by applying a shuffling...
US-8,996,879 User identity attestation in mobile commerce
A method, apparatus, system, and computer program product for user identity attestation in mobile commerce. The method may include obtaining a photograph of a...
US-8,996,845 Vector compare-and-exchange operation
A vector compare-and-exchange operation is performed by: decoding by a decoder in a processing device, a single instruction specifying a vector ...
US-8,996,833 Multi latency configurable cache
Described herein are technologies for optimizing different cache configurations of a size-configurable cache. One configuration includes a base cache portion...
US-8,996,780 Method and apparatus to facilitate system to system protocol exchange in back to back non-transparent bridges
A dual host system and method with back to back non-transparent bridges and a proxy packet generating mechanism. The proxy packet generating mechanism enables...
US-8,996,774 Performing emulated message signaled interrupt handling
In an embodiment, a processor includes a logic to store a write transaction including an interrupt and data received from a device coupled to the processor to a...
US-8,996,765 Methods and apparatus to manage workload memory allocation
Methods, articles of manufacture, and apparatus are disclosed to manage workload memory allocation. An example method includes identifying a primary memory and...
US-8,996,760 Method to emulate message signaled interrupts with interrupt data
Methods to emulate a message signaled interrupt (MSI) with interrupt data are described herein. An embodiment of the invention includes a memory decoder to...
US-8,996,757 Method and apparatus to generate platform correctable TX-RX
A programmable link training and status state machine is disclosed. The programmable finite state machine includes extra states, or shadow states, which are...
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