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Patent # Description
US-9,035,960 Technique to share information among different cache coherency domains
A technique to enable information sharing among agents within different cache coherency domains. In one embodiment, a graphics device may use one or more caches...
US-9,035,959 Technique to share information among different cache coherency domains
A technique to enable information sharing among agents within different cache coherency domains. In one embodiment, a graphics device may use one or more caches...
US-9,035,686 Apparatus and method for low power fully-interruptible latches and master-slave flip-flops
Described is a latch which comprises: a first AND-OR-invert (AOI) logic gate; and a second AOI logic gate coupled to the first AOI logic gate, wherein the first...
US-9,035,627 Switched mode power supply employing first and second feedback signals and a method of operating thereof
A switched mode power supply includes a first switch, a second switch, an inductor, an output capacitor, and a driving circuit for driving the first switch and...
US-9,035,387 Multi-gate device
Embodiments of an apparatus and methods for improving multi-gate device performance are generally described herein. Other embodiments may be described and claimed.
US-9,035,194 Circuit board with integrated passive devices
Embodiments of the present disclosure are directed towards a circuit board having integrated passive devices such as inductors, capacitors, resistors and...
US-D729,791 At least partially transparent input device for an electronic computer
US-9,032,493 Connecting mobile devices, internet-connected vehicles, and cloud services
A three-way trust relationship is established between a mobile device, Internet-connected vehicle system, and a cloud-based service. Access rights are granted...
US-9,032,428 Validation of TV viewership utilizing methods, systems and computer control logic
A method, system and computer control logic to provide personalization of a viewer's usage of an Internet TV platform. The method includes tracking a viewer's...
US-9,032,381 State recovery methods and apparatus for computing platforms
State recovery methods and apparatus for computing platforms are disclosed. An example method includes inserting a first instruction into optimized code to...
US-9,032,246 Redundant file storage system with parity information
Some embodiments of the invention shift the responsibility for creating parity and error correction blocks from the hardware or software RAID units or modules...
US-9,032,232 Instruction for enabling a processor wait state
In one embodiment, the present invention includes a processor having a core with decode logic to decode an instruction prescribing an identification of a...
US-9,032,226 Providing per core voltage and frequency control
In one embodiment, the present invention includes a processor having a plurality of cores and a control logic to control provision of a voltage/frequency to a...
US-9,032,225 Determination of wake signal initiation on shared wake pins in computing devices
Embodiments of computer-implemented methods, systems, computing devices, and computer-readable media are described herein for transitioning a computing device...
US-9,032,223 Techniques to manage operational parameters for a processor
Techniques to manage operational parameters for a processor are described. For instance, a method includes monitoring performance values representing physical...
US-9,032,139 Memory allocation for fast platform hibernation and resumption of computing systems
Memory allocation for fast platform hibernation and resumption of computing systems. An embodiment of an apparatus includes logic at least partially implemented...
US-9,032,137 Flexible wear management for non-volatile memory
Systems and methods of memory cell wear management that can achieve a more uniform distribution of write cycles across a memory cell address space. The systems...
US-9,032,126 Increasing turbo mode residency of a processor
In one embodiment, the present invention includes a method for accessing a task stored in an entry of a task queue that identifies the task and a first core of...
US-9,032,125 Increasing turbo mode residency of a processor
In one embodiment, the present invention includes a method for accessing a task stored in an entry of a task queue that identifies the task and a first core of...
US-9,032,105 Scalable method and apparatus to configure a link
Disclosed herein axe reconfigurable ports and methods for doing the same.
US-9,032,103 Transaction re-ordering
A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is...
US-9,032,099 Writeback mechanisms for improving far memory utilization in multi-level memory architectures
Multi-level memory architecture technologies are described. One processor includes a requesting unit, a first memory interface to couple to a far memory (FM), a...
US-9,032,004 Method, apparatus and instructions for parallel data conversions
Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding...
US-9,032,003 Method, apparatus and instructions for parallel data conversions
Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding...
US-9,031,712 Remote management and control of vehicular functions via multiple networks
Certain embodiments herein relate to enabling remote activation of a vehicle's functions or features via multiple networks that may connect the vehicle to a...
US-9,031,612 Spatial alignment for D2D interference mitigation
Described are techniques for managing the interference produced by D2D (device-to-device) transmissions that may be used in conjunction with transmit power...
US-9,031,582 Disabling of wireless transmission of wireless communication devices using messages
Systems, methods, and apparatuses are directed to facilitating disabling of wireless transmission of wireless communication devices using messages. In one...
US-9,031,574 Location estimation based on adjusted distance values for a wireless device
Embodiments of techniques and systems for distance and location estimation in wireless systems are described. In embodiments, a wireless device may receive...
US-9,031,514 Self calibration method for radio equipment with receive and transmit circuitry
A self-calibration circuit and associated method for testing an RF device includes the RF device to be tested having transmit and receive sections, and a...
US-9,031,238 Data encryption and/or decryption by integrated circuit
In an embodiment, an apparatus is provided that may include an integrated circuit to be removably communicatively coupled to at least one storage device. The...
US-9,031,226 Multi-stream-multipoint-jack audio streaming
A method and device for streaming the output of one or more audio sources to one or more smart headsets includes establishing a secure connection with a smart...
US-9,031,093 EEE refresh and wake signaling for 100GBASE-KP4
Methods, apparatus and systems for implementing for implementing Energy-Efficient Ethernet (EEE) refresh and wake signaling for high-speed Ethernet links....
US-9,031,064 Providing a load/store communication protocol with a low power physical unit
In one embodiment, a converged protocol stack can be used to unify communications from a first communication protocol to a second communication protocol to...
US-9,030,984 Transmission power control schemes for D2D communications
Power control schemes for D2D communications are described. The schemes control the transmission power of a UE during D2D communications in a manner that...
US-9,030,981 Device power management in a wireless network
In various embodiments of the invention, a device in a wireless communications network may negotiate with a network controller to determine when the device may...
US-9,030,936 Flow control with reduced buffer usage for network devices
Methods and apparatus for implementing flow control with reduced buffer usage for network devices. In response to detection of flow control events, transmission...
US-9,030,906 Isolating, at least in part, local row or column circuitry of memory cell before establishing voltage...
An embodiment may include local row and column circuitry that are local to a memory cell of a memory device. Either the local row circuitry or the local column...
US-9,030,903 Method, apparatus and system for providing a memory refresh
A memory controller to implement targeted refreshes of potential victim rows of a row hammer event. In an embodiment, the memory controller receives an...
US-9,030,885 Extended select gate lifetime
A flash memory device may include two or more flash memory cells organized as a NAND string in a block of flash memory cells, and flash cells, coupled to the...
US-9,030,482 Hybrid display frame buffer for display subsystem
A hybrid display frame buffer for a display subsystem. An embodiment of an apparatus a first logic to split a video image into a first data portion and a second...
US-9,030,481 Method and apparatus for reducing power usage during video presentation on a display
An apparatus may include a link component and a display component. The link component may be operative to receive media content via data frames over a display...
US-9,030,367 Antenna array arrangement and a multi band antenna
Antenna array arrangement for a multi band antenna, comprising a plurality of first dual band antenna elements adapted for transmitting/receiving in a lower...
US-9,029,835 Epitaxial film on nanoscale structure
An embodiment of the invention includes an epitaxial layer that directly contacts, for example, a nanowire, fin, or pillar in a manner that allows the layer to...
US-9,029,221 Semiconductor devices having three-dimensional bodies with modulated heights
Semiconductor devices having three-dimensional bodies with modulated heights and methods to form such devices are described. For example, a semiconductor...
US-9,028,157 Efficient backside-emitting/collecting grating coupler
Photonic integrated circuit (PIC) chips with backside vertical optical coupler and packaging into an optical transmitter/receiver. A grating-based backside...
US-9,028,142 Integrated microelectronic package temperature sensor
Temperatures in microelectronic integrated circuit packages and components may be measured in situ using carbon nanotube networks. An array of carbon nanotubes...
US-9,027,148 Anti-malware protection operation with instruction included in an operand
Disclosed is a system and method for extending anti-malware protection to systems having multiple storage devices, such as RAID. In embodiments, a trusted...
US-9,027,104 Instructions processors, methods, and systems to process secure hash algorithms
A method of an aspect includes receiving an instruction. The instruction indicates a first source of a first packed data including state data elements a.sub.i,...
US-9,027,053 Method and apparatus for customized rendering of commercials
An entertainment system receives entertainment programming interposed with commercials. The entertainment system selectively renders the commercial in...
US-9,027,039 Methods for analyzing, limiting, and enhancing access to an internet API, web service, and data
The invention includes an API gateway server that monitors and controls the distribution of API elements from API sources to application developers based on a...
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