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Device, system and method of power management in a wireless area network
Device, system, and method of power management. In some demonstrative embodiments, a device may include a wireless communication unit to transmit to a control...
Method for signaling information by modifying modulation constellations
Methods and systems for communicating in a wireless network may distinguish different types of packet structures by modifying the phase of a modulation...
Coordinating power mode switching and refresh operations in a memory
Provided are a memory system, device, and method for determining to send a refresh command to a memory module according to a refresh rate and incrementing a...
Microelectronic structures having laminated or embedded glass routing
structures for high density packaging
Embodiments of the present description relate to the field of fabricating microelectronic structures. The microelectronic structures may include a glass routing...
2-D gather instruction and a 2-D cache
A processor may support a two-dimensional (2-D) gather instruction and a 2-D cache. The processor may perform the 2-D gather instruction to access one or more...
Tri-column adjustable azimuth beam width antenna for wireless network
A tri-column antenna array architecture, containing a plurality of active radiating elements that are spatially arranged on a modified reflector structure is...
Power management in transceivers
Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an...
Multichip integration with through silicon via (TSV) die embedded in
Embodiments of the present disclosure are directed to integrated circuit (IC) package assemblies with three-dimensional (3D) integration of multiple dies, as...
Interlayer communications for 3D integrated circuit stack
Some embodiments provide capacitive AC coupling inter-layer communications for 3D stacked modules.
Methods to prevent filler entrapment in microelectronic device to
microelectronic substrate interconnection...
Embodiments of the present description include methods for attaching a microelectronic device to a microelectronic substrate with interconnection structures...
Method and apparatus for match quality analysis of analyte binding
Described are devices and methods for detecting the match quality and concentration of analytes binding to an electrode surface. The devices utilize a clock to...
Dual function system and method for shuffling packed data elements
An apparatus and method for performing a shuffle operation on packed data using computer-implemented steps is described. In one embodiment, a first packed data...
Providing support for position-related applications
A method of providing position support to a main processor of a computing device is disclosed. The method may include receiving primary position data from a...
Language level support for shared virtual memory
Embodiments of the invention provide language support for CPU-GPU platforms. In one embodiment, code can be flexibly executed on both the CPU and GPU. CPU code...
Sharing virtual functions in a shared virtual memory between heterogeneous
processors of a computing platform
A computing platform may include heterogeneous processors (e.g., CPU and a GPU) to support sharing of virtual functions between such processors. In one...
Virtualization event processing in a layered virtualization architecture
Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an...
Methods, systems, and apparatus for tail termination of turbo decoding
Methods and apparatus for tail termination are provided that include a decoder that includes a processor configured to a forward state metric and a backward...
Transaction-level testing of memory I/O and memory device
A memory subsystem includes a test engine coupled to a memory controller that can provide memory access transactions to the memory controller, bypassing a...
Apparatus and method to obtain information regarding suppressed faults
A processor includes an execution unit, a fault mask coupled to the execution unit, and a suppress mask coupled to the execution unit. The fault mask is to...
Independent power control of processing cores
Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least...
Method, apparatus, and system for energy efficiency and energy
conservation including optimizing C-state...
A processor may include power management techniques to, dynamically, chose an optimal C-state for the processing core. The measurement of real workloads on the...
Securing inputs from malware
A series of touch panel key entries may be secured by shuffling touch entry coordinates. In one embodiment, the entries may be secured by applying a shuffling...
User identity attestation in mobile commerce
A method, apparatus, system, and computer program product for user identity attestation in mobile commerce. The method may include obtaining a photograph of a...
Vector compare-and-exchange operation
A vector compare-and-exchange operation is performed by: decoding by a decoder in a processing device, a single instruction specifying a vector ...
Multi latency configurable cache
Described herein are technologies for optimizing different cache configurations of a size-configurable cache. One configuration includes a base cache portion...
Method and apparatus to facilitate system to system protocol exchange in
back to back non-transparent bridges
A dual host system and method with back to back non-transparent bridges and a proxy packet generating mechanism. The proxy packet generating mechanism enables...
Performing emulated message signaled interrupt handling
In an embodiment, a processor includes a logic to store a write transaction including an interrupt and data received from a device coupled to the processor to a...
Methods and apparatus to manage workload memory allocation
Methods, articles of manufacture, and apparatus are disclosed to manage workload memory allocation. An example method includes identifying a primary memory and...
Method to emulate message signaled interrupts with interrupt data
Methods to emulate a message signaled interrupt (MSI) with interrupt data are described herein. An embodiment of the invention includes a memory decoder to...
Method and apparatus to generate platform correctable TX-RX
A programmable link training and status state machine is disclosed. The programmable finite state machine includes extra states, or shadow states, which are...
Facilitating, at least in part, by circuitry, accessing of at least one
controller command interface
An embodiment may include circuitry to facilitate, at least in part, a first network interface controller (NIC) in a client to be capable of accessing, via a...
System and method for caching data
A method of obtaining radio content from a remote electronic device for a user electronic device includes transmitting a request for radio media content to a...
Customized travel route system
An embodiment of the invention includes (a) acquiring a tour start location, a tour constraint, and a first user travel preference for a first user; and (b)...
IMT and non-IMT wireless communication device
A communication apparatus associated with a system that uses two or more wireless standard in IMT and non-IMT bands. The invention is a wireless device with the...
Emergency call capable wireless device provisioning
The present disclosure relates provisioning a wireless capable device as an emergency call apparatus. In one implementation, a wireless capable device or...
Embedding service provider information in a wireless call
In one embodiment, a method includes receiving, in a mobile station of a terminating party, an incoming call and an identifier of a service provider of an...
Optical transceiver interface with planar alignment and securing
An optical lens connector includes alignment features for passive connection alignment. The alignment features have generally planar surfaces to interface with...
Techniques for improved image disparity estimation
Techniques for improved image disparity estimation are described. In one embodiment, for example, an apparatus may comprise a processor circuit and an imaging...
Baseband cancellation of platform radio interference
Briefly, in accordance with one or more embodiments, a platform may comprise a receiver to receive a signal that includes an error in the received signal due to...
Systems and methods for implementing improved frequency estimation
A system and method are provided for implementing improved frequency estimation for wireless communication that involves lower power transmissions with reduced...
Method and device for channel estimation with colliding interference
The method comprises receiving a signal comprising a symbol-carrier matrix, the symbol-carrier matrix comprising a predetermined pattern of reference symbols,...
Techniques for broadcast/multicast delivery in wireless networks
An embodiment of the present invention provides an apparatus including a transceiver operable for broadcast/multicast traffic delivery in a wireless network,...
Coverage adjustment in E-UTRA networks
Embodiments of systems and techniques for coverage adjustment in evolved universal terrain radio access networks (E-UTRANs) are described. In some embodiments,...
Control of video processing algorithms based on measured perceptual
Systems and methods may provide for conducting a real-time perceptual quality analysis of a video, wherein the perceptual quality analysis includes at least one...
Image processing devices and image processing methods of moving objects
In an embodiment, an image processing device is provided. The image processing device may include: a first image acquirer configured to acquire a first image of...
Model-based multi-hypothesis target tracker
The present disclosure describes a target tracker that evaluates frames of data of one or more targets, such as a body part, body, and/or object, acquired by a...
Digital-to-time converter and calibration of digital-to-time converter
A digital-to-time converter (DTC) comprises a gate controller configured to generate a gate enable signal based on first and second digital values so that the...
Electronic circuit and electronic circuit arrangement
In accordance with one exemplary embodiment, an electronic circuit is provided, wherein the electronic circuit comprises a first transistor and also a second...
Multiphase transformer for a multiphase DC-DC converter
A multiphase DC-DC converter is provided that includes a multiphase transformer, the multiphase transformer including a plurality of input voltage terminals and...
Real time composition of a composite window from content maintaining
unique security domains
In general, in one aspect, a multi-content composition pipeline encrypts protected video streams that may be utilized as part of a composite window using...