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Patent # Description
US-9,571,242 Methods and devices for mitigating interference
A method includes receiving a signal including a two-dimensional signal pattern in a time-frequency representation, wherein the two-dimensional signal pattern...
US-9,571,215 Measuring time offsets between devices with independent silicon clocks
Methods and apparatus relating to measuring time offsets between devices with independent silicon clocks are described. In some embodiments, logic is provided...
US-9,571,135 Adjusting power amplifier stimuli based on output signals
Compensation for one or more effects of impedance mismatch between a power amplifier (PA) and at least one filter is discussed. One example system that...
US-9,571,120 Digital to analog converter circuits, apparatus and method for generating a high frequency transmission signal...
A digital to analog converter circuit includes a plurality of digital to analog converter cells. The digital to analog converter circuit further includes a...
US-9,571,107 High-order sigma delta for a divider-less digital phase-locked loop
Described herein are technologies related to an implementation of a divider-less digital phase-locked loop (DPLL) that includes a loop response matching a...
US-9,571,059 Parallel via to improve the impedance match for embedded common mode filter design
A parallel via design is disclosed to improve the impedance match for embedded common mode choke filter designs. Particularly suited to such designs on...
US-9,570,883 Photonic package architecture
A photonic package includes a photonic device having a photon emitter on the front side of the die. A beam of photons from the photon emitter passing from the...
US-9,570,796 Antenna for mobile device having metallic surface
An antenna having a plurality of ports coupled to at least one radiator opening or protuberance formed on a metallic surface. A plurality of modulators are...
US-9,570,614 Ge and III-V channel semiconductor devices having maximized compliance and free surface relaxation
Ge and III-V channel semiconductor devices having maximized compliance and free surface relaxation and methods of fabricating such Ge and III-V channel...
US-9,570,467 High voltage three-dimensional devices having dielectric liners
High voltage three-dimensional devices having dielectric liners and methods of forming high voltage three-dimensional devices having dielectric liners are...
US-9,570,386 Flexible package-to-socket interposer
A flexible interposer for the attachment of a microelectronic package to a microelectronic socket, wherein a first portion of the flexible substrate may be...
US-9,570,349 Non-lithographically patterned directed self assembly alignment promotion layers
A method of an aspect includes forming a directed self assembly alignment promotion layer over a surface of a substrate having a first patterned region and a...
US-9,570,159 Methods and apparatus to preserve data of a solid state drive during a power loss event
Methods, apparatus, systems and articles of manufacture to preserve data of a solid state drive during a power loss event are disclosed. An example method...
US-9,570,139 Magnetic state element and circuits
Described is an apparatus, for spin state element device, which comprises: a variable resistive magnetic (VRM) device to receive a magnetic control signal to...
US-9,569,886 Variable shading
In some embodiments, a given frame or picture may have different shading rates. In one embodiment in some areas of the frame or picture the shading rate may be...
US-9,569,883 Decoupled shading pipeline
In some embodiments, a given frame or picture may have different shading rates. In one embodiment in some areas of the frame or picture the shading rate may be...
US-9,569,882 Four corner high performance depth test
One or more apparatus and method for multi-pixel/sample level depth testing in a graphics processor is described. In embodiments, a bounding-box of variable...
US-9,569,880 Adaptive anisotropic filtering
A method, graphics processing unit, and system are described herein. The method for adaptive anisotropic filtering includes calculating a number of ways of...
US-9,569,879 Culling using linear bounds for stochastic rasterization
We present a new culling test for rasterization of simultaneous depth of field and motion blur, which efficiently reduces the set of (x, y, u, v, t) samples...
US-9,569,878 Sample culling based on linearized 5D edge equations
Thin invention introduces a five-dimensional rasterization technique that uses a test based on triangle edges in order to obtain high efficiency. A compact...
US-9,569,642 Always-available embedded theft reaction subsystem
A system comprising a platform protected by an always-on always-available security system is described. In one embodiment, the system includes a risk behavior...
US-9,569,637 Enhanced privacy for provision of computer vision
Methods, apparatuses and storage medium associated with providing enhanced privacy during usage of computer vision are disclosed. In embodiments, an apparatus...
US-9,569,633 Device, system, and method for processor-based data protection
A device, system, and method for providing processor-based data protection on a mobile computing device includes accessing data stored in memory with a central...
US-9,569,613 Techniques for enforcing control flow integrity using binary translation
Various embodiments are generally directed to an apparatus, method and other techniques to determine a valid target address for a branch instruction from...
US-9,569,372 Redirection communication
A method and system of communicating data to or from a remote computer. The remote computer is accessed by a CPU as though it were a local IDE controller...
US-9,569,309 Managing error data and resetting a computing system
Various techniques for managing a system reset of a computing system to maintain error data are described herein. In one example, a computing system configured...
US-9,569,278 Asymmetric performance multicore architecture with same instruction set architecture
A method is described that entails operating enabled cores of a multi-core processor such that both cores support respective software routines with a same...
US-9,569,267 Hardware-based inter-device resource sharing
The present disclosure is directed to hardware-based inter-device resource sharing. For example, a remote orchestrator (RO) may provide instructions to cause a...
US-9,569,218 Decomposing operations in more than one dimension into one dimensional point operations
A processing architecture uses stationary operands and opcodes common on a plurality of processors. Only data moves through the processors. The same opcode and...
US-9,569,212 Instruction and logic for a memory ordering buffer
A processor includes an allocator with logic assigning alias hardware resources to instructions within an atomic region of instructions. The atomic region...
US-9,569,210 Apparatus and method of execution unit for calculating multiple rounds of a skein hashing algorithm
An apparatus is described that includes an execution unit within an instruction pipeline. The execution unit has multiple stages of a circuit that includes a)...
US-9,569,208 Compressed instruction format
A technique for decoding an instruction in a variable-length instruction set. In one embodiment, an instruction encoding is described, in which legacy, present,...
US-9,569,141 Hash map support in a storage device
In an embodiment, a storage device may include device processing logic. The device processing logic may acquire a command associated with a key-value pair...
US-9,568,978 Controlling power consumption in processor-based systems and components thereof
Since the maximum power consumption is largely a concern at the power supply domain, a limited number of nodes may be allowed to consume their maximum power...
US-9,568,977 Context sensing for computing devices
A method and system for context sensing is described herein. The method includes determining if sensor data obtained via a number of sensors exceed a...
US-9,568,975 Power balancing to increase workload density and improve energy efficiency
Technologies for adjusting server power consumption include a computing device to receive resource utilization data from a plurality of servers. The computing...
US-9,568,972 Coordinated multi-device power management
Techniques related to coordinating power management for multiple devices are discussed. Such techniques may include establishing communications between devices,...
US-9,568,956 Apparatus, system and method for a collapsing keyboard
Some embodiments of an apparatus, system and method are described for a collapsible keyboard apparatus and computing system. A collapsible keyboard apparatus...
US-9,568,929 Bandgap reference circuit with beta-compensation
Described are apparatuses and methods for generating a temperature-stabilized reference voltage on a semiconductor chip. An apparatus may include a differential...
US-9,568,547 Method, apparatus and system for dynamic bandwidth management in systems
In one embodiment, a bandwidth management controller is coupled to a debug interconnect to dynamically allocate buffer space of a plurality of data buffers to...
US-9,568,530 Active cable testing
Embodiments of the present disclosure provide configurations for testing arrangements for testing multi-lane active cables. In one embodiment, a testing...
US-9,568,521 Distortion estimation apparatus and method
A distortion estimation apparatus for estimating distortion includes a feedback element, a nonlinearity determiner, and a distortion simulator. The feedback...
US-9,568,432 Sensor apparatus to determine a value of a chemical parameter based on a color shade and methods thereof
Apparatus and methods may provide for determining a value of chemical parameter. One or more light emitters may be positioned within a housing to emit light...
US-9,566,158 Hardware protection of virtual machine monitor runtime integrity watcher
An apparatus and method for hardware protection of a virtual machine monitor (VMM) runtime integrity watcher is described. A set of one or more hardware range...
US-9,565,787 Heat dissipation device loading mechanisms
The present description relates to the field of microelectronic assemblies, wherein a heat dissipation device may be incorporated into the microelectronic...
US-9,565,766 Formation of DRAM capacitor among metal interconnect
Techniques are disclosed for integrating capacitors among the metal interconnect for embedded DRAM applications. In some embodiments, the technique uses a wet...
US-9,565,684 Systems and methods for avoiding interference for a peer-to-peer network connection
Systems and methods are described herein for avoiding interfering with 5GHZ frequency band signals with a peer-to-peer wireless local area network connection. A...
US-9,565,681 Low power and fast application service transmission
An apparatus, method and system are provided to allow a low power and fast application service transmission (LP-FAST) engine to enhance the quality of service...
US-9,565,672 Techniques for improved multicast content delivery
Techniques for improved multicast content delivery are described. In some embodiments, for example, an apparatus includes a processor circuit, a communication...
US-9,565,658 Dynamic selection of spectrum access in a spectrum sharing context
Briefly, in accordance with one or more embodiments, a wireless system may be controlled to operate via time-division duplexing (TDD) in a first mode and...
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