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Patent # Description
US-9,893,787 MIMO beamforming method and method of constructing a differential codebook for a wireless network
A MIMO beamforming method comprises receiving at a base station information regarding a difference between an ideal beamforming matrix and an averaged...
US-9,893,786 Multi-link beamforming training techniques for 60 GHz wireless networks
Various embodiments may be generally directed to multi-link beamforming training techniques for 60 GHz wireless networks. In some embodiments, a 60 GHz-capable...
US-9,893,785 Enhanced beamforming training in a wireless local area networks
Apparatus, computer readable media, and methods for enhanced beamforming training in a wireless local area network are disclosed. An apparatus of a access point...
US-9,893,761 Signal routing with reduced crosstalk
Generally, this disclosure provides systems and devices for reduction of crosstalk between routed signals. A system may include a first pair of signal lines and...
US-9,893,746 Energy efficient polynomial kernel generation in full-duplex radio communication
A polynomial kernel generator is configured to mitigate nonlinearity in a receiver path from a transmitter path comprising a nonlinear component in a...
US-9,893,732 Techniques for bypassing defects in rows of circuits
An integrated circuit includes rows of circuits. A first region of the integrated circuit includes a first portion of each of the rows of circuits, and a second...
US-9,893,444 Board-edge interconnection module with integrated capacitive coupling for enabling ultra-mobile computing devices
A board-edge interconnection module features integrated capacitive coupling, which enables a board design employing the module to avoid having AC capacitors and...
US-9,893,438 Electrical connectors for high density attach to stretchable boards
A system can include a first portion of a fabric fastener, a second portion of the fabric fastener, wherein the first portion and the second portion are...
US-9,893,167 Integration methods to fabricate internal spacers for nanowire devices
A nanowire device having a plurality of internal spacers and a method for forming said internal spacers are disclosed. In an embodiment, a semiconductor device...
US-9,893,149 High mobility strained channels for fin-based transistors
Techniques are disclosed for incorporating high mobility strained channels into fin-based transistors (e.g., FinFETs such as double-gate, trigate, etc), wherein...
US-9,892,967 Self-aligned contacts
A transistor comprises a substrate, a pair of spacers on the substrate, a gate dielectric layer on the substrate and between the pair of spacers, a gate...
US-9,892,785 Multistage set procedure for phase change memory
Phase change material can be set with a multistage set process. Set control logic can heat a phase change semiconductor material (PM) to a first temperature for...
US-9,892,775 Destructive reads from spin transfer torque memory under read-write conditions
Systems, apparatuses and methods may provide for detecting a read-write condition in which a read operation from a location in magnetoresistive memory such as...
US-9,892,712 Filtering hot plug detect signals
Techniques related to filtering hot plug signals are described herein. The techniques include receiving a first hot plug detect (HPD) signals and a second HPD...
US-9,892,544 Method and apparatus for load balancing in a ray tracing architecture
An apparatus and method for load balancing in a ray tracing architecture. For example, one embodiment of a graphics processing apparatus comprises: an...
US-9,892,482 Processing video content
Technologies may provide for processing video content. A request to process video content may be received at a user mode driver. In response, the user mode...
US-9,892,481 CPU/GPU synchronization mechanism
A thread on one processor may be used to enable another processor to lock or release a mutex. For example, a central processing unit thread may be used by a...
US-9,892,480 Aborting graphics processor workload execution
According to some embodiments, a graphics processor may abort a workload without requiring changes to the kernel code compilation or intruding upon graphics...
US-9,892,395 System and method for the distribution of software products
A system and method for selling software products over a network. The system includes a server computer with access to software products. The system is...
US-9,892,394 System and method for the distribution of software products
A system and method for selling software products over a network. The system includes a server computer with access to software products. The system is...
US-9,892,393 System and method for the distribution of software products
A system and method for selling software products over a network. The system includes a server computer with access to software products. The system is...
US-9,892,392 System and method for the distribution of software products
A system and method for selling software products over a network. The system includes a server computer with access to software products. The system is...
US-9,892,391 System and method for the distribution of software products
A system and method for selling software products over a network. The system includes a server computer with access to software products. The system is...
US-9,892,098 HTML tag for improving page navigation user experience
Various systems and methods for navigating paginated items results are described herein. A web browser receives, from a server, a markup language document...
US-9,892,086 High performance interconnect physical layer
A serial data link is to be adapted during initialization of the link. Adaptation of the link is to include receiving a pseudorandom binary sequence (PRBS) from...
US-9,892,081 Split transaction protocol for a bus system
A method of and apparatus for communicating between a host and an agent. The method includes the step of performing a first transaction between a host...
US-9,892,069 Posting interrupts to virtual processors
Embodiments of systems, apparatuses, and methods for posting interrupts to virtual processors are disclosed. In one embodiment, an apparatus includes look-up...
US-9,892,059 Multi-core shared page miss handler
Methods and apparatus are disclosed for using a shared page miss handler device to satisfy page miss requests of a plurality of devices in a multi-core system....
US-9,892,056 Multi-core shared page miss handler
Methods and apparatus are disclosed for using a shared page miss handler device to satisfy page miss requests of a plurality of devices in a multi-core system....
US-9,892,053 Compaction for memory hierarchies
In accordance with some embodiments, compaction, as contrasted with compression, is used to reduce the footprint of a near memory. In compaction, the density of...
US-9,891,980 Aggregated page fault signaling and handline
A processor of an aspect includes an instruction pipeline to process a multiple memory address instruction that indicates multiple memory addresses. The...
US-9,891,936 Method and apparatus for page-level monitoring
An apparatus and method for page level monitoring are described. For example, one embodiment of a method for monitoring memory pages comprises storing...
US-9,891,929 System and method for redirecting input/output (I/O) sequences
A method for redirecting I/O (Input/Output) sequences. A computer platform is initialized. If the computer platform is enabled for command packet rerouting, the...
US-9,891,924 Method for implementing a reduced size register view data structure in a microprocessor
A method for implementing a reduced size register view data structure in a microprocessor. The method includes receiving an incoming instruction sequence using...
US-9,891,915 Method and apparatus to increase the speed of the load access and data return speed path using early lower...
A microprocessor implemented method for resolving dependencies for a load instruction in a load store queue (LSQ) is disclosed. The method comprises initiating...
US-9,891,914 Method and apparatus for performing an efficient scatter
An apparatus and method for performing an efficient scatter operation. For example, one embodiment of a processor comprises: an allocator unit to receive a...
US-9,891,913 Method and apparatus for performing conflict detection using vector comparison operations
An apparatus and method are described for performing conflict detection operations. For example, one embodiment of a processor comprises: a first source vector...
US-9,891,698 Audio processing during low-power operation
A system may configure at least a low power engine (LPE) and network interface circuitry when transitioning from an active state to a low-power state. The...
US-9,891,695 Flushing and restoring core memory content to external memory
A method and apparatus for flushing and restoring core memory content to and from, respectively, external memory are described. In one embodiment, the apparatus...
US-9,891,691 Reducing pin count requirements for implementation of interconnect idle states
Methods and apparatus relating to reducing pin count requirements for implementation of interconnect idle state(s) are described. In one embodiment, logic...
US-9,891,686 Throttling device power
An apparatus and system for throttling I/O devices in a computer system is provided. In an example, a method for throttling device power demand during critical...
US-9,891,681 Adaptive graphics subsystem power and performance management
Examples are disclosed for adaptive graphics subsystem power and performance management including adjusting one or more power management or performance...
US-9,891,318 Location detection system
Various embodiments are directed to a location detection system. The location detection system may utilize one or more light sources in a fixed and known...
US-9,891,282 Chip fabric interconnect quality on silicon
Described is a signature accumulator with a first set of logic devices, a second set of logic devices, and a memory device. The first set of logic devices...
US-9,891,269 Pulsed testing of through-body-vias
An integrated circuit die has one or more through-body-vias and a testing circuit on board the die which tests for defects in a through-body-via by driving of...
US-9,891,069 Location based haptic direction finding
Methods and apparatus relating to location-based haptic direction finding are described. In an embodiment, logic (e.g., included in a mobile computing device)...
US-9,889,859 Dynamic sensor range in advanced driver assistance systems
Various systems and methods for implementing dynamic sensor range in advanced driver assistance systems are described herein. A system for managing an...
US-9,889,559 Robotic system for updating devices
In one embodiment the present disclosure provides a robotic updating apparatus that includes mapping circuitry to provide movement instructions, the mapping...
US-D810,031 Protective cover for an electronic connector
US-9,888,577 Passive electrical devices with a polymer carrier
Passive electrical devices are described with a polymer carrier. In one example, a conductive layer is formed over a polymer substrate in a pattern to form a...
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