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Patent # Description
US-9,032,103 Transaction re-ordering
A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is...
US-9,032,099 Writeback mechanisms for improving far memory utilization in multi-level memory architectures
Multi-level memory architecture technologies are described. One processor includes a requesting unit, a first memory interface to couple to a far memory (FM), a...
US-9,032,004 Method, apparatus and instructions for parallel data conversions
Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding...
US-9,032,003 Method, apparatus and instructions for parallel data conversions
Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding...
US-9,031,712 Remote management and control of vehicular functions via multiple networks
Certain embodiments herein relate to enabling remote activation of a vehicle's functions or features via multiple networks that may connect the vehicle to a...
US-9,031,612 Spatial alignment for D2D interference mitigation
Described are techniques for managing the interference produced by D2D (device-to-device) transmissions that may be used in conjunction with transmit power...
US-9,031,582 Disabling of wireless transmission of wireless communication devices using messages
Systems, methods, and apparatuses are directed to facilitating disabling of wireless transmission of wireless communication devices using messages. In one...
US-9,031,574 Location estimation based on adjusted distance values for a wireless device
Embodiments of techniques and systems for distance and location estimation in wireless systems are described. In embodiments, a wireless device may receive...
US-9,031,514 Self calibration method for radio equipment with receive and transmit circuitry
A self-calibration circuit and associated method for testing an RF device includes the RF device to be tested having transmit and receive sections, and a...
US-9,031,238 Data encryption and/or decryption by integrated circuit
In an embodiment, an apparatus is provided that may include an integrated circuit to be removably communicatively coupled to at least one storage device. The...
US-9,031,226 Multi-stream-multipoint-jack audio streaming
A method and device for streaming the output of one or more audio sources to one or more smart headsets includes establishing a secure connection with a smart...
US-9,031,093 EEE refresh and wake signaling for 100GBASE-KP4
Methods, apparatus and systems for implementing for implementing Energy-Efficient Ethernet (EEE) refresh and wake signaling for high-speed Ethernet links....
US-9,031,064 Providing a load/store communication protocol with a low power physical unit
In one embodiment, a converged protocol stack can be used to unify communications from a first communication protocol to a second communication protocol to...
US-9,030,984 Transmission power control schemes for D2D communications
Power control schemes for D2D communications are described. The schemes control the transmission power of a UE during D2D communications in a manner that...
US-9,030,981 Device power management in a wireless network
In various embodiments of the invention, a device in a wireless communications network may negotiate with a network controller to determine when the device may...
US-9,030,936 Flow control with reduced buffer usage for network devices
Methods and apparatus for implementing flow control with reduced buffer usage for network devices. In response to detection of flow control events, transmission...
US-9,030,906 Isolating, at least in part, local row or column circuitry of memory cell before establishing voltage...
An embodiment may include local row and column circuitry that are local to a memory cell of a memory device. Either the local row circuitry or the local column...
US-9,030,903 Method, apparatus and system for providing a memory refresh
A memory controller to implement targeted refreshes of potential victim rows of a row hammer event. In an embodiment, the memory controller receives an...
US-9,030,885 Extended select gate lifetime
A flash memory device may include two or more flash memory cells organized as a NAND string in a block of flash memory cells, and flash cells, coupled to the...
US-9,030,482 Hybrid display frame buffer for display subsystem
A hybrid display frame buffer for a display subsystem. An embodiment of an apparatus a first logic to split a video image into a first data portion and a second...
US-9,030,481 Method and apparatus for reducing power usage during video presentation on a display
An apparatus may include a link component and a display component. The link component may be operative to receive media content via data frames over a display...
US-9,030,367 Antenna array arrangement and a multi band antenna
Antenna array arrangement for a multi band antenna, comprising a plurality of first dual band antenna elements adapted for transmitting/receiving in a lower...
US-9,029,835 Epitaxial film on nanoscale structure
An embodiment of the invention includes an epitaxial layer that directly contacts, for example, a nanowire, fin, or pillar in a manner that allows the layer to...
US-9,029,221 Semiconductor devices having three-dimensional bodies with modulated heights
Semiconductor devices having three-dimensional bodies with modulated heights and methods to form such devices are described. For example, a semiconductor...
US-9,028,157 Efficient backside-emitting/collecting grating coupler
Photonic integrated circuit (PIC) chips with backside vertical optical coupler and packaging into an optical transmitter/receiver. A grating-based backside...
US-9,028,142 Integrated microelectronic package temperature sensor
Temperatures in microelectronic integrated circuit packages and components may be measured in situ using carbon nanotube networks. An array of carbon nanotubes...
US-9,027,148 Anti-malware protection operation with instruction included in an operand
Disclosed is a system and method for extending anti-malware protection to systems having multiple storage devices, such as RAID. In embodiments, a trusted...
US-9,027,104 Instructions processors, methods, and systems to process secure hash algorithms
A method of an aspect includes receiving an instruction. The instruction indicates a first source of a first packed data including state data elements a.sub.i,...
US-9,027,053 Method and apparatus for customized rendering of commercials
An entertainment system receives entertainment programming interposed with commercials. The entertainment system selectively renders the commercial in...
US-9,027,039 Methods for analyzing, limiting, and enhancing access to an internet API, web service, and data
The invention includes an API gateway server that monitors and controls the distribution of API elements from API sources to application developers based on a...
US-9,027,009 Protecting the integrity of binary translated code
The technologies provided herein relate to protecting the integrity of original code that has been optimized. For example, a processor may perform a fetch...
US-9,026,888 Method, system and apparatus for providing access to error correction information
Techniques and mechanisms to facilitate data error detection by a memory controller. In an embodiment, the memory controller calculates, for each of a plurality...
US-9,026,885 Method and apparatus for processing a downlink shared channel
Embodiments include a method and apparatus for processing a downlink shared channel. In one embodiment, a Node-B includes circuitry configured to process...
US-9,026,829 Package level power state optimization
Methods and apparatus to optimize package level power state usage are described. In one embodiment, a processor control logic receives a request to enter a...
US-9,026,820 Communication link and network connectivity management in low power mode
Methods and apparatus relating to communication link and network connectivity management in low power mode are described. In one embodiment, logic manages one...
US-9,026,817 Joint optimization of processor frequencies and system sleep states
Systems and methods may provide for identifying a workload cycle for a computing platform, wherein the workload cycle is to include a busy duration and an idle...
US-9,026,816 Method and system for determining an energy-efficient operating point of a platform
A method and system for determining an energy-efficient operating point of the platform or system. The platform has logic to dynamically manage setting(s) of...
US-9,026,815 Controlling operating frequency of a core domain via a non-core domain of a multi-domain processor
In one embodiment, the present invention includes a method for determining that a non-core domain of a multi-domain processor is not operating at a frequency...
US-9,026,773 Providing a secure execution mode in a pre-boot environment
In one embodiment, the present invention includes a method to establish a secure pre-boot environment in a computer system; and perform at least one secure...
US-9,026,767 Adaptive address mapping with dynamic runtime memory mapping selection
A system monitors and dynamically changes memory mapping in a runtime of a computing system. The computing system has various memory resources, and multiple...
US-9,026,725 Training for command/address/control/clock delays under uncertain initial conditions and for mapping swizzled...
Data pin mapping and delay training techniques. Valid values are detected on a command/address (CA) bus at a memory device. A first part of the pattern (high...
US-9,026,712 USB device control using endpoint type detection during enumeration
Described herein are embodiments of USB device control using endpoint type detection during enumeration. An apparatus configured for USB device control using...
US-9,026,698 Apparatus, system and method for providing access to a device function
Techniques and mechanisms for providing access to a function with an input/output (I/O) device. In an embodiment, a main memory of a computer system including...
US-9,026,682 Prefectching in PCI express
A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is...
US-9,026,570 Method, apparatus and instructions for parallel data conversions
Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding...
US-9,026,569 Method, apparatus and instructions for parallel data conversions
Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding...
US-9,026,565 Real-time data transformation to access foreign data sources
A method for providing access to a file by a requestor including creating an empty file in a format understood by the requestor, intercepting one or more reads...
US-9,026,391 Distortion estimation apparatus and method
A distortion estimation apparatus for estimating distortion includes a feedback element, a nonlinearity determiner, and a distortion simulator. The feedback...
US-9,026,387 Battery voltage measurement
An apparatus is provided that includes a first circuit to determine when a battery current falls below a threshold, a second circuit to measure a battery...
US-9,026,163 Methods and arrangements to offload scans of a large scan list
Embodiments describe arrangements related to offload scanning of large scan lists. Embodiments may comprise logic such as hardware and/or code to facilitate...
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