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Patent # Description
US-1,039,6815 RFDAC (RF (radio frequency) DAC (digital-to-analog converter)) with improved efficiency and output power
High efficiency amplitude DACs (Digital-to-Analog Converters) and RFDACs (Radio Frequency DACs) employing such amplitude DACs are discussed. One exemplary...
US-1,039,6211 Functional metal oxide based microelectronic devices
A microelectronic device having a functional metal oxide channel may be fabricated on a microelectronic substrate that can be utilized in very large scale...
US-1,039,6203 Pre-sculpting of Si fin elements prior to cladding for transistor channel applications
Transistor fin elements (e.g., fin or tri gate) may be modified by radio frequency (RF) plasma and/or thermal processing for purpose of dimensional sculpting....
US-1,039,6201 Methods of forming dislocation enhanced strain in NMOS structures
Methods of forming a strained channel device utilizing dislocations disposed in source/drain structures are described. Those methods and structures may include...
US-1,039,6176 Selective gate spacers for semiconductor devices
Techniques related to forming selective gate spacers for semiconductor devices and transistor structures and devices formed using such techniques are discussed....
US-1,039,6079 Non-planar semiconductor device having doped sub-fin region and method to fabricate same
Non-planar semiconductor devices having doped sub-fin regions and methods of fabricating non-planar semiconductor devices having doped sub-fin regions are...
US-1,039,6055 Method, apparatus and system to interconnect packaged integrated circuit dies
Techniques and mechanisms for interconnecting stacked integrated circuit (IC) dies. In an embodiment, a first end of a wire is coupled to a first IC die of a...
US-1,039,6047 Semiconductor package with package components disposed on a package substrate within a footprint of a die
Embodiments of the present disclosure provide a semiconductor package configured to provide for a disposition of one or more package components on a substrate...
US-1,039,6046 Substrate assembly with magnetic feature
Apparatuses, systems and methods associated with substrate design with a magnetic feature for fully integrated voltage regulator are disclosed herein. In...
US-1,039,6045 Metal on both sides of the transistor integrated with magnetic inductors
An apparatus and a system including an apparatus including a circuit structure including a device stratum including a plurality of transistor devices each...
US-1,039,6038 Flexible packaging architecture
A flexible packaging architecture is described that is suitable for curved package shapes. In one example a package has a first die, a first mold compound layer...
US-1,039,6036 Rlink-ground shielding attachment structures and shadow voiding for data signal contacts of package devices;...
A vertically ground isolated package device can include (1) ground shielding attachment structures and shadow voiding for data signal contacts; (2) vertical...
US-1,039,6022 Ground via clustering for crosstalk mitigation
Embodiments of the present disclosure are directed towards techniques and configurations for ground via clustering for crosstalk mitigation in integrated...
US-1,039,5883 Aperture size modulation to enhance ebeam patterning resolution
Lithographic apparatuses suitable for complementary e-beam lithography (CEBL) are described. In an example, a blanker aperture array (BAA) for an e-beam tool...
US-1,039,5728 Demarcation voltage determination via write and read temperature stamps
A non-volatile memory receives a request from a controller to read data stored in the memory. Moving read references are adjusted as a function of the...
US-1,039,5722 Reading from a mode register having different read and write timing
A system provides a mailbox communication register for communication between a host and a mode register. The mode register is to store configuration...
US-1,039,5707 Amorphous seed layer for improved stability in perpendicular STTM stack
A material layer stack for a magnetic tunneling junction, the material layer stack including a fixed magnetic layer; a dielectric layer; a free magnetic layer;...
US-1,039,5623 Handling surface level coherency without reliance on fencing
Systems, apparatuses and methods may provide for technology that detects a memory fence in a thread, adds a group identifier to one or more memory operations in...
US-1,039,5588 Micro LED display pixel architecture
A Light Emitting Diode (LED) display is described. The LED display includes a plurality of pixel circuits, each including an LED and a non-volatile memory cell...
US-1,039,5515 Sensor aggregation and virtual sensors
A sensor aggregator is disclosed that may instantiate virtual sensors providing virtual sensor data. Virtual sensor data may be based at least in part on data...
US-1,039,5423 Apparatus and method for rendering adaptive mesh refinement (AMR) data
An apparatus and method are described for rendering adaptive mesh refinement data. For example, one embodiment of a graphics processing apparatus comprises: a...
US-1,039,5414 Dynamic kernel modification for graphics processing units
Techniques to patch a shader program after the shader has been compiled and/or while the shader is in an execution pipeline are described. The shader may be...
US-1,039,5263 Interestingness scoring of areas of interest included in a display element
Examples are disclosed for determining an interestingness score for one or more areas of interest included in a display element such as a static image or a...
US-1,039,5035 Photon emission attack resistance driver circuits
Some embodiments include apparatuses having diffusion regions located adjacent each other in a substrate, and connections coupled to the diffusion regions. The...
US-1,039,5033 System, apparatus and method for performing on-demand binary analysis for detecting code reuse attacks
In one embodiment, a binary translator to perform binary translation of code is to: perform a first binary analysis of a first code block to determine whether a...
US-1,039,5028 Virtualization based intra-block workload isolation
Generally, this disclosure provides systems, devices, methods and computer readable media for virtualization-based intra-block workload isolation. The system...
US-1,039,4954 Natural language intent and location determination method and apparatus
Methods, apparatus, and system to parse an unstructured, natural language input of a user, infer a semantic meaning of an intent of the user, and determine a...
US-1,039,4930 Binary vector factorization
There is disclosed in an example, a processor, having: decode circuitry to decode instructions from an instruction stream; a data cache unit including circuitry...
US-1,039,4784 Technologies for management of lookup tables
Technologies for managing lookup tables are described. The lookup tables may be used for a two-level lookup scheme for packet processing. When the tables need...
US-1,039,4738 Technologies for scalable hierarchical interconnect topologies
Technologies for a system of communicatively coupled network switches in a hierarchical interconnect network topology include two or more groups that each...
US-1,039,4728 Emulated MSI interrupt handling
A processor includes a core and an interrupt controller. The interrupt controller includes logic to read interrupt data from a memory, the interrupt data...
US-1,039,4678 Wait and poll instructions for monitoring a plurality of addresses
A processor core includes a decode circuit to decode an instruction. The processor core further includes a monitor circuit, where the monitor circuit includes a...
US-1,039,4654 Method and apparatus for hybrid firmware boot
A computer boot apparatus and related method use a primary boot component (PBC) that is fixedly mounted in the computer. The PBC has a firmware element that is...
US-1,039,4634 Drive-based storage scrubbing
Apparatuses, systems and methods are disclosed herein that generally relate to distributed storage, such as for big data, distributed databases, large datasets,...
US-1,039,4623 Techniques for processing custom events
Various embodiments are generally directed an apparatus and method for receiving an interrupt to cause a system event on a platform processing device from a...
US-1,039,4595 Method to manage guest address space trusted by virtual machine monitor
A processor comprises a register to store a first reference to a context data structure specifying a virtual machine context, the context data structure...
US-1,039,4564 Local closed loop efficiency control using IP metrics
According to one embodiment, a processor includes an instruction decoder to decode instruction and a execution unit to execute instructions, the execution unit...
US-1,039,4563 Hardware accelerated conversion system using pattern matching
A method for converting guest instructions into native instructions is disclosed. The method comprises accessing a guest instruction and performing a first...
US-1,039,4561 Mechanism for facilitating dynamic and efficient management of instruction atomicity volations in software...
A mechanism is described for facilitating dynamic and efficient management of instruction atomicity violations in software programs according to one embodiment....
US-1,039,4556 Hardware apparatuses and methods to switch shadow stack pointers
Methods and apparatuses relating to switching of a shadow stack pointer are described. In one embodiment, a hardware processor includes a hardware decode unit...
US-1,039,4309 Power gated communication controller
A method includes detecting a communication event over a communication bus 130 coupled to a device, and in response to detecting the communication event,...
US-1,039,4300 Controlling operating voltage of a processor
In an embodiment, a processor includes a core domain with a plurality of cores and a power controller having a first logic to receive a first request to...
US-1,039,4295 Streamlined physical restart of servers method and apparatus
Apparatuses, methods and storage medium associated with streamlined physical reset are described herein. In embodiments, an apparatus for computing, including...
US-1,039,4280 Wearable electronic devices and components thereof
Embodiments of wearable electronic devices, components thereof, and related systems and techniques are disclosed herein. For example, a wearable electronic...
US-1,039,3850 Apparatus, system and method of angle of departure (AOD) estimation
Devices and methods of estimating the AoD of a STA are generally described. The STA receives and stores an association between tone and transmission angle for...
US-1,039,3799 Electronic device package
Electronic device package technology is disclosed. An electronic device package in accordance with the present disclosure can include a substrate. The...
US-1,039,3592 Systems and methods for measuring surface temperature
Disclosed is a system for measuring a surface temperature. The system may comprise a printed circuit board, an insulator block, a conductive probe, a plurality...
US-1,039,3540 Technologies for pedestrian dead reckoning
Technologies for determining a user's location include a mobile computing device (100) to determine, based on sensed inertial characteristics of the device, a...
US-D857,648 Speaker
US-1,039,0438 Integrated circuit package substrate
Embodiments of the present disclosure are directed towards techniques and configurations for dual surface finish package substrate assemblies. In one embodiment...
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