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Patent # Description
US-9,820,390 Process for forming a semiconductor device substrate
A semiconductor device substrate includes a front section and back section that are laminated cores disposed on a front- and back surfaces of a first core. The...
US-9,820,386 Plasma etching of solder resist openings
A method of forming an electronic assembly. The method includes covering a patterned conductive layer that is on a dielectric layer with a solder resist;...
US-9,820,384 Flexible electronic assembly method
This disclosure relates generally to devices, systems, and methods for making a flexible microelectronic assembly. In an example, a polymer is molded over a...
US-9,820,328 Apparatuses, methods, and systems to reduce handover latency in an integrated wireless local area network and...
Embodiments include apparatuses, methods, and systems to reduce handover latency in an integrated wireless local area network (WLAN) and wireless cellular...
US-9,820,320 Docking station and method to connect to a docking station
A docking station and a method for establishing a wireless connection to a device in which the docking station is configured to use the distance between the...
US-9,820,306 Apparatuses, systems, and methods for access configurations
A mobile communication device including a wireless module and a controller module is provided, and the mobile communication device is coupled to a cellular...
US-9,820,272 Methods and devices for performing duplex mode detection
A circuit arrangement may include a first detection circuit configured to evaluate signal data of a carrier channel to identify a timing location of a...
US-9,820,260 Spectrum sharing based on self-organizing networks
Embodiments use the principles of self-organizing networks to allocate resources to allow spectrum owners to share spectrum with wireless carriers according to...
US-9,820,256 Apparatus, system and method of time-of-flight positioning via neighbor list
Systems and methods are directed to use of a neighbor list for wireless indoor navigation. The neighbor list may include related information regarding all...
US-9,820,250 Support for asynchronous time division duplexing in adjacent cells of a wireless communication system
Technology is discussed for mitigating interference in a wireless communication environment where adjacent cells can have asynchronous Time Division Duplexing...
US-9,820,247 Enhanced node B (ENB) and method for MTC coexistence
Embodiments of a machine-type communication (MTC) User Equipment (UE) and methods for configuring a MTC UE using an evolved Node B (eNB) are generally described...
US-9,820,236 Power compensation in multi-carrier transmitters
A transmitter and method for transmitting a communication signal having at least a first carrier and a second carrier. The transmitter includes a scaling factor...
US-9,820,187 Apparatus, system and method of providing offloadability information to a user-equipment (UE)
Some demonstrative embodiments include devices, systems and methods of providing offloadability information to a User Equipment (UE). For example, a core...
US-9,820,167 Method and apparatus of multiband communication
A system and method for multiband rate scaling for communication, particularly wireless communication. A band is used as a parameter for wireless communication...
US-9,820,115 Notification generation via a docking interface
Notification methods and devices are described. In notification method, a notification template corresponding to a notification is generated. The notification...
US-9,820,080 Mechanism to prevent load in 3GPP network due to MTC device triggers
Embodiments of methods and apparatus to manage MTC device trigger load in a wireless network are described herein. Other embodiments may be described and claimed.
US-9,820,048 Technologies for location-dependent wireless speaker configuration
Technologies for location-dependent wireless speaker configuration include a mobile computing device wirelessly coupled to a plurality of speakers. The mobile...
US-9,820,018 Low power sensing apparatus and method using a combination of virtual machine and dedicated hardware...
Described is an apparatus comprising: a processor operable to execute a virtual machine manager (VMM) which is to manage a virtual machine (VM) for a hardware...
US-9,820,008 Capture and recall of home entertainment system session
Various embodiments are directed to systems and methods for determining the current state of multiple devices that form the basis of a home entertainment...
US-9,819,965 Content adaptive transform coding for next generation video
Techniques related to applying content adaptive and fixed transforms to prediction error data partitions for coding video are discussed. Such techniques may...
US-9,819,929 Calibration of a three-dimensional acquisition system
Embodiments of the present disclosure provide techniques and configurations for an optoelectronic three-dimensional object acquisition assembly configured to...
US-9,819,875 Multi-camera sync pulse synchronization
Techniques for image synchronization are described herein. The techniques may include a device having logic, at least partially including hardware logic, to...
US-9,819,806 Multimode multicarrier modem system and method of communication over the same
An alternative approach to coping with the ever increasing demand for faster communications hardware is to design modems that are capable of operating its...
US-9,819,717 Video adaptation for content-aware wireless streaming
Described herein are techniques related to wirelessly streaming content to a remote display device. Parameters are selected for the streaming based on content...
US-9,819,557 Multi-rate high-speed bus with statistical aggregator
A single high-speed bus accommodates both low-rate and high-rate bi-directional signal traffic by interleaving the traffic at the two rates sequentially so that...
US-9,819,527 Transmitter for spatial modulation in a high-efficiency wireless local-area network
A transmitter for spatial modulation in a high-efficiency wireless local-area network is disclosed. An apparatus is disclosed that comprises memory and...
US-9,819,479 Digitally controlled two-points edge interpolator
Described herein are technologies related to an implementation of a digital-to-time converter (DTC) circuitry that utilizes a first interpolation and a second...
US-9,819,452 Efficient link layer retry protocol utilizing implicit acknowledgements
Methods, apparatus, and systems for implementing a link layer retry protocol utilizing implicit ACKnowledgements (ACKs). Peer link interfaces are configured to...
US-9,819,442 Internal interference signaling
In accordance with an illustrative embodiment, a method and device are provided. The method, system, and device comprise an information module and a...
US-9,819,401 Highly selective low-power card detector for near field communications (NFC)
Described herein are architectures, platforms and methods for implementing low-power detection of a near field communication (NFC) card or tags. In particular,...
US-9,819,386 Methods and arrangements to increase transmission range
Logic may transmit or receive communications that hop frequencies in response to trigger events across a large bandwidth. Logic may generate a communication...
US-9,819,362 Apparatus and method for detecting and mitigating bit-line opens in flash memory
Described is a method which comprises performing a first read from a portion of a non-volatile memory, the first read to provide a first codeword; decoding the...
US-9,819,356 Injection locked ring oscillator based digital-to-time converter and method for providing a filtered...
Apparatus and methods for a digital-to-time converter (DTC) are provided. In an example, a DTC can include a phase interpolator and a ring oscillator. The phase...
US-9,819,327 Bulk acoustic wave resonator tuner circuits
Techniques and configurations are disclosed for bulk acoustic wave resonator (BAWR) tuner circuits and their use in integrated circuit (IC) packages and mobile...
US-9,819,311 Apparatus and a method for providing a supply control signal for a supply unit
An apparatus for providing a supply control signal for a supply unit, the supply unit being configured to provide a variable controlled power supply to the...
US-9,819,266 Digitally controlled zero current switching
Generally, this disclosure describes an apparatus. The apparatus includes switch controller circuitry and zero crossing logic circuitry. The switch controller...
US-9,819,258 Systems and methods for latch-up detection and mitigation
Systems and methods for latch-up detection and mitigation. One aspect includes a method implemented in a system divided into a plurality of power blocks, where...
US-9,819,253 MEMS device
According to the present invention there is provided a device comprising a MEMS die and, a single magnet, wherein the MEMS die cooperates with the magnet, such...
US-9,819,122 Apparel compute device connection
System and techniques for an apparel compute device connection are described herein. A base for a removable apparel compute device is bonded to a garment. The...
US-9,819,079 Modular antenna for near field coupling integration into metallic chassis devices
Described herein are techniques related to near field communication and wireless power transfers. A portable device may include a modular antenna that offers...
US-9,818,933 6F2 non-volatile memory bitcell
An apparatus including an array of memory cells arranged in a grid defined by word lines and bit lines in a generally orthogonal orientation relative to one...
US-9,818,884 Strain compensation in transistors
An embodiment includes a device comprising: a first epitaxial layer, coupled to a substrate, having a first lattice constant; a second epitaxial layer, on the...
US-9,818,870 Transistor structure with variable clad/core dimension for stress and bandgap
An apparatus including a heterostructure disposed on a substrate and defining a channel region, the heterostructure including a first material having a first...
US-9,818,864 Vertical nanowire transistor with axially engineered semiconductor and gate metallization
Vertically oriented nanowire transistors including semiconductor layers or gate electrodes having compositions that vary over a length of the transistor. In...
US-9,818,847 Non-planar III-V field effect transistors with conformal metal gate electrode and nitrogen doping of gate...
A high-k gate dielectric interface with a group III-V semiconductor surface of a non-planar transistor channel region is non-directionally doped with nitrogen....
US-9,818,751 Methods of forming buried vertical capacitors and structures formed thereby
Methods of forming passive elements under a device layer are described. Those methods and structures may include forming at least one passive structure, such as...
US-9,818,719 Bumpless build-up layer package design with an interposer
The present disclosure relates to the field of integrated circuit package design and, more particularly, to packages using a bumpless build-up layer (BBUL)...
US-9,818,710 Anchored interconnect
An embodiment includes a semiconductor structure comprising: a backend portion including a plurality of metal layers between bottom and top metal layers; the...
US-9,818,672 Flow diversion devices
Embodiments of flow diversion devices (FDDs) are disclosed herein. An FDD may include a body formed of a body material and a plurality of thermally deformable...
US-9,818,460 Negative bitline write assist circuit and method for operating the same
A negative bitline write assist circuit includes a bias capacitor configured to facilitate driving the capacitance of a bitline. The negative bitline write...
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